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nsphy.c revision 1.59
      1 /*	$NetBSD: nsphy.c,v 1.59 2014/06/16 16:48:16 msaitoh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  *
     45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     55  */
     56 
     57 /*
     58  * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
     59  * Data Sheet available from www.national.com
     60  */
     61 
     62 #include <sys/cdefs.h>
     63 __KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.59 2014/06/16 16:48:16 msaitoh Exp $");
     64 
     65 #include <sys/param.h>
     66 #include <sys/systm.h>
     67 #include <sys/kernel.h>
     68 #include <sys/device.h>
     69 #include <sys/socket.h>
     70 #include <sys/errno.h>
     71 
     72 #include <net/if.h>
     73 #include <net/if_media.h>
     74 
     75 #include <dev/mii/mii.h>
     76 #include <dev/mii/miivar.h>
     77 #include <dev/mii/miidevs.h>
     78 
     79 #include <dev/mii/nsphyreg.h>
     80 
     81 static int	nsphymatch(device_t, cfdata_t, void *);
     82 static void	nsphyattach(device_t, device_t, void *);
     83 
     84 CFATTACH_DECL_NEW(nsphy, sizeof(struct mii_softc),
     85     nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate);
     86 
     87 static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
     88 static void	nsphy_status(struct mii_softc *);
     89 static void	nsphy_reset(struct mii_softc *sc);
     90 
     91 static const struct mii_phy_funcs nsphy_funcs = {
     92 	nsphy_service, nsphy_status, nsphy_reset,
     93 };
     94 
     95 static const struct mii_phydesc nsphys[] = {
     96 	{ MII_OUI_xxNATSEMI,		MII_MODEL_xxNATSEMI_DP83840,
     97 	  MII_STR_xxNATSEMI_DP83840 },
     98 
     99 	{ 0,				0,
    100 	  NULL },
    101 };
    102 
    103 static int
    104 nsphymatch(device_t parent, cfdata_t match, void *aux)
    105 {
    106 	struct mii_attach_args *ma = aux;
    107 
    108 	if (mii_phy_match(ma, nsphys) != NULL)
    109 		return (10);
    110 
    111 	return (0);
    112 }
    113 
    114 static void
    115 nsphyattach(device_t parent, device_t self, void *aux)
    116 {
    117 	struct mii_softc *sc = device_private(self);
    118 	struct mii_attach_args *ma = aux;
    119 	struct mii_data *mii = ma->mii_data;
    120 	const struct mii_phydesc *mpd;
    121 
    122 	mpd = mii_phy_match(ma, nsphys);
    123 	aprint_naive(": Media interface\n");
    124 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
    125 
    126 	sc->mii_dev = self;
    127 	sc->mii_inst = mii->mii_instance;
    128 	sc->mii_phy = ma->mii_phyno;
    129 	sc->mii_funcs = &nsphy_funcs;
    130 	sc->mii_pdata = mii;
    131 	sc->mii_flags = ma->mii_flags;
    132 	sc->mii_anegticks = MII_ANEGTICKS;
    133 
    134 	PHY_RESET(sc);
    135 
    136 	sc->mii_capabilities =
    137 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
    138 	aprint_normal_dev(self, "");
    139 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
    140 		aprint_error("no media present");
    141 	else
    142 		mii_phy_add_media(sc);
    143 	aprint_normal("\n");
    144 }
    145 
    146 static int
    147 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
    148 {
    149 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    150 	int reg;
    151 
    152 	switch (cmd) {
    153 	case MII_POLLSTAT:
    154 		/*
    155 		 * If we're not polling our PHY instance, just return.
    156 		 */
    157 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    158 			return (0);
    159 		break;
    160 
    161 	case MII_MEDIACHG:
    162 		/*
    163 		 * If the media indicates a different PHY instance,
    164 		 * isolate ourselves.
    165 		 */
    166 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
    167 			reg = PHY_READ(sc, MII_BMCR);
    168 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    169 			return (0);
    170 		}
    171 
    172 		/*
    173 		 * If the interface is not up, don't do anything.
    174 		 */
    175 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
    176 			break;
    177 
    178 		reg = PHY_READ(sc, MII_NSPHY_PCR);
    179 
    180 		/*
    181 		 * Set up the PCR to use LED4 to indicate full-duplex
    182 		 * in both 10baseT and 100baseTX modes.
    183 		 */
    184 		reg |= PCR_LED4MODE;
    185 
    186 		/*
    187 		 * Make sure Carrier Integrity Monitor function is
    188 		 * disabled (normal for Node operation, but sometimes
    189 		 * it's not set?!)
    190 		 */
    191 		reg |= PCR_CIMDIS;
    192 
    193 		/*
    194 		 * Make sure "force link good" is set to normal mode.
    195 		 * It's only intended for debugging.
    196 		 */
    197 		reg |= PCR_FLINK100;
    198 
    199 		/*
    200 		 * Mystery bits which are supposedly `reserved',
    201 		 * but we seem to need to set them when the PHY
    202 		 * is connected to some interfaces:
    203 		 *
    204 		 * 0x0400 is needed for fxp
    205 		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
    206 		 *        (nsphy with a DP83840 chip)
    207 		 * 0x0100 may be needed for some other card
    208 		 */
    209 		reg |= 0x0100 | 0x0400;
    210 
    211 		PHY_WRITE(sc, MII_NSPHY_PCR, reg);
    212 
    213 		mii_phy_setmedia(sc);
    214 		break;
    215 
    216 	case MII_TICK:
    217 		/*
    218 		 * If we're not currently selected, just return.
    219 		 */
    220 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    221 			return (0);
    222 
    223 		if (mii_phy_tick(sc) == EJUSTRETURN)
    224 			return (0);
    225 		break;
    226 
    227 	case MII_DOWN:
    228 		mii_phy_down(sc);
    229 		return (0);
    230 	}
    231 
    232 	/* Update the media status. */
    233 	mii_phy_status(sc);
    234 
    235 	/* Callback if something changed. */
    236 	mii_phy_update(sc, cmd);
    237 	return (0);
    238 }
    239 
    240 static void
    241 nsphy_status(struct mii_softc *sc)
    242 {
    243 	struct mii_data *mii = sc->mii_pdata;
    244 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    245 	int bmsr, bmcr, par, anlpar;
    246 
    247 	mii->mii_media_status = IFM_AVALID;
    248 	mii->mii_media_active = IFM_ETHER;
    249 
    250 	bmsr = PHY_READ(sc, MII_BMSR) |
    251 	    PHY_READ(sc, MII_BMSR);
    252 	if (bmsr & BMSR_LINK)
    253 		mii->mii_media_status |= IFM_ACTIVE;
    254 
    255 	bmcr = PHY_READ(sc, MII_BMCR);
    256 	if (bmcr & BMCR_ISO) {
    257 		mii->mii_media_active |= IFM_NONE;
    258 		mii->mii_media_status = 0;
    259 		return;
    260 	}
    261 
    262 	if (bmcr & BMCR_LOOP)
    263 		mii->mii_media_active |= IFM_LOOP;
    264 
    265 	if (bmcr & BMCR_AUTOEN) {
    266 		/*
    267 		 * The PAR status bits are only valid if autonegotiation
    268 		 * has completed (or it's disabled).
    269 		 */
    270 		if ((bmsr & BMSR_ACOMP) == 0) {
    271 			/* Erg, still trying, I guess... */
    272 			mii->mii_media_active |= IFM_NONE;
    273 			return;
    274 		}
    275 
    276 		/*
    277 		 * Argh.  The PAR doesn't seem to indicate duplex mode
    278 		 * properly!  Determine media based on link partner's
    279 		 * advertised capabilities.
    280 		 */
    281 		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
    282 			anlpar = PHY_READ(sc, MII_ANAR) &
    283 			    PHY_READ(sc, MII_ANLPAR);
    284 			if (anlpar & ANLPAR_TX_FD)
    285 				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
    286 			else if (anlpar & ANLPAR_T4)
    287 				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
    288 			else if (anlpar & ANLPAR_TX)
    289 				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
    290 			else if (anlpar & ANLPAR_10_FD)
    291 				mii->mii_media_active |= IFM_10_T|IFM_FDX;
    292 			else if (anlpar & ANLPAR_10)
    293 				mii->mii_media_active |= IFM_10_T|IFM_HDX;
    294 			else
    295 				mii->mii_media_active |= IFM_NONE;
    296 			return;
    297 		}
    298 
    299 		/*
    300 		 * Link partner is not capable of autonegotiation.
    301 		 * We will never be in full-duplex mode if this is
    302 		 * the case, so reading the PAR is OK.
    303 		 */
    304 		par = PHY_READ(sc, MII_NSPHY_PAR);
    305 		if (par & PAR_10)
    306 			mii->mii_media_active |= IFM_10_T;
    307 		else
    308 			mii->mii_media_active |= IFM_100_TX;
    309 		mii->mii_media_active |= IFM_HDX;
    310 	} else
    311 		mii->mii_media_active = ife->ifm_media;
    312 }
    313 
    314 static void
    315 nsphy_reset(struct mii_softc *sc)
    316 {
    317 	int reg, i;
    318 
    319 	if (sc->mii_flags & MIIF_NOISOLATE)
    320 		reg = BMCR_RESET;
    321 	else
    322 		reg = BMCR_RESET | BMCR_ISO;
    323 	PHY_WRITE(sc, MII_BMCR, reg);
    324 
    325 	/*
    326 	 * Give it a little time to settle in case we just got power.
    327 	 * The DP83840A data sheet suggests that a soft reset not happen
    328 	 * within 500us of power being applied.  Be conservative.
    329 	 */
    330 	delay(1000);
    331 
    332 	/*
    333 	 * Wait another 2s for it to complete.
    334 	 * This is only a little overkill as under normal circumstances
    335 	 * the PHY can take up to 1s to complete reset.
    336 	 * This is also a bit odd because after a reset, the BMCR will
    337 	 * clear the reset bit and simply reports 0 even though the reset
    338 	 * is not yet complete.
    339 	 */
    340 	for (i = 0; i < 1000; i++) {
    341 		reg = PHY_READ(sc, MII_BMCR);
    342 		if (reg && ((reg & BMCR_RESET) == 0))
    343 			break;
    344 		delay(2000);
    345 	}
    346 
    347 	if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) {
    348 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    349 	}
    350 }
    351