nsphy.c revision 1.64
1 /* $NetBSD: nsphy.c,v 1.64 2019/03/25 09:20:46 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY 59 * Data Sheet available from www.national.com 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.64 2019/03/25 09:20:46 msaitoh Exp $"); 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/device.h> 69 #include <sys/socket.h> 70 #include <sys/errno.h> 71 72 #include <net/if.h> 73 #include <net/if_media.h> 74 75 #include <dev/mii/mii.h> 76 #include <dev/mii/miivar.h> 77 #include <dev/mii/miidevs.h> 78 79 #include <dev/mii/nsphyreg.h> 80 81 static int nsphymatch(device_t, cfdata_t, void *); 82 static void nsphyattach(device_t, device_t, void *); 83 84 CFATTACH_DECL_NEW(nsphy, sizeof(struct mii_softc), 85 nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate); 86 87 static int nsphy_service(struct mii_softc *, struct mii_data *, int); 88 static void nsphy_status(struct mii_softc *); 89 static void nsphy_reset(struct mii_softc *sc); 90 91 static const struct mii_phy_funcs nsphy_funcs = { 92 nsphy_service, nsphy_status, nsphy_reset, 93 }; 94 95 static const struct mii_phydesc nsphys[] = { 96 MII_PHY_DESC(xxNATSEMI, DP83840), 97 MII_PHY_END, 98 }; 99 100 static int 101 nsphymatch(device_t parent, cfdata_t match, void *aux) 102 { 103 struct mii_attach_args *ma = aux; 104 105 if (mii_phy_match(ma, nsphys) != NULL) 106 return 10; 107 108 return 0; 109 } 110 111 static void 112 nsphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct mii_softc *sc = device_private(self); 115 struct mii_attach_args *ma = aux; 116 struct mii_data *mii = ma->mii_data; 117 const struct mii_phydesc *mpd; 118 119 mpd = mii_phy_match(ma, nsphys); 120 aprint_naive(": Media interface\n"); 121 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 122 123 sc->mii_dev = self; 124 sc->mii_inst = mii->mii_instance; 125 sc->mii_phy = ma->mii_phyno; 126 sc->mii_funcs = &nsphy_funcs; 127 sc->mii_pdata = mii; 128 sc->mii_flags = ma->mii_flags; 129 sc->mii_anegticks = MII_ANEGTICKS; 130 131 PHY_RESET(sc); 132 133 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 134 sc->mii_capabilities &= ma->mii_capmask; 135 aprint_normal_dev(self, ""); 136 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0) 137 aprint_error("no media present"); 138 else 139 mii_phy_add_media(sc); 140 aprint_normal("\n"); 141 } 142 143 static int 144 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 145 { 146 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 147 uint16_t reg; 148 149 switch (cmd) { 150 case MII_POLLSTAT: 151 /* If we're not polling our PHY instance, just return. */ 152 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 153 return 0; 154 break; 155 156 case MII_MEDIACHG: 157 /* 158 * If the media indicates a different PHY instance, 159 * isolate ourselves. 160 */ 161 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) { 162 PHY_READ(sc, MII_BMCR, ®); 163 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 164 return 0; 165 } 166 167 /* If the interface is not up, don't do anything. */ 168 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 169 break; 170 171 PHY_READ(sc, MII_NSPHY_PCR, ®); 172 173 /* 174 * Set up the PCR to use LED4 to indicate full-duplex 175 * in both 10baseT and 100baseTX modes. 176 */ 177 reg |= PCR_LED4MODE; 178 179 /* 180 * Make sure Carrier Integrity Monitor function is 181 * disabled (normal for Node operation, but sometimes 182 * it's not set?!) 183 */ 184 reg |= PCR_CIMDIS; 185 186 /* 187 * Make sure "force link good" is set to normal mode. 188 * It's only intended for debugging. 189 */ 190 reg |= PCR_FLINK100; 191 192 /* 193 * Mystery bits which are supposedly `reserved', 194 * but we seem to need to set them when the PHY 195 * is connected to some interfaces: 196 * 197 * 0x0400 is needed for fxp 198 * (Intel EtherExpress Pro 10+/100B, 82557 chip) 199 * (nsphy with a DP83840 chip) 200 * 0x0100 may be needed for some other card 201 */ 202 reg |= 0x0100 | 0x0400; 203 204 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 205 206 mii_phy_setmedia(sc); 207 break; 208 209 case MII_TICK: 210 /* If we're not currently selected, just return. */ 211 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 212 return 0; 213 214 if (mii_phy_tick(sc) == EJUSTRETURN) 215 return 0; 216 break; 217 218 case MII_DOWN: 219 mii_phy_down(sc); 220 return 0; 221 } 222 223 /* Update the media status. */ 224 mii_phy_status(sc); 225 226 /* Callback if something changed. */ 227 mii_phy_update(sc, cmd); 228 return 0; 229 } 230 231 static void 232 nsphy_status(struct mii_softc *sc) 233 { 234 struct mii_data *mii = sc->mii_pdata; 235 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 236 uint16_t bmsr, bmcr, aner, anar, par, anlpar, result; 237 238 mii->mii_media_status = IFM_AVALID; 239 mii->mii_media_active = IFM_ETHER; 240 241 PHY_READ(sc, MII_BMSR, &bmsr); 242 PHY_READ(sc, MII_BMSR, &bmsr); 243 if (bmsr & BMSR_LINK) 244 mii->mii_media_status |= IFM_ACTIVE; 245 246 PHY_READ(sc, MII_BMCR, &bmcr); 247 if (bmcr & BMCR_ISO) { 248 mii->mii_media_active |= IFM_NONE; 249 mii->mii_media_status = 0; 250 return; 251 } 252 253 if (bmcr & BMCR_LOOP) 254 mii->mii_media_active |= IFM_LOOP; 255 256 if (bmcr & BMCR_AUTOEN) { 257 /* 258 * The PAR status bits are only valid if autonegotiation 259 * has completed (or it's disabled). 260 */ 261 if ((bmsr & BMSR_ACOMP) == 0) { 262 /* Erg, still trying, I guess... */ 263 mii->mii_media_active |= IFM_NONE; 264 return; 265 } 266 267 /* 268 * Argh. The PAR doesn't seem to indicate duplex mode 269 * properly! Determine media based on link partner's 270 * advertised capabilities. 271 */ 272 PHY_READ(sc, MII_ANER, &aner); 273 if (aner & ANER_LPAN) { 274 PHY_READ(sc, MII_ANAR, &anar); 275 PHY_READ(sc, MII_ANLPAR, &anlpar); 276 result = anar & anlpar; 277 if (result & ANLPAR_TX_FD) 278 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 279 else if (result & ANLPAR_T4) 280 mii->mii_media_active |= IFM_100_T4 | IFM_HDX; 281 else if (result & ANLPAR_TX) 282 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 283 else if (result & ANLPAR_10_FD) 284 mii->mii_media_active |= IFM_10_T | IFM_FDX; 285 else if (result & ANLPAR_10) 286 mii->mii_media_active |= IFM_10_T | IFM_HDX; 287 else 288 mii->mii_media_active |= IFM_NONE; 289 return; 290 } 291 292 /* 293 * Link partner is not capable of autonegotiation. 294 * We will never be in full-duplex mode if this is 295 * the case, so reading the PAR is OK. 296 */ 297 PHY_READ(sc, MII_NSPHY_PAR, &par); 298 if (par & PAR_10) 299 mii->mii_media_active |= IFM_10_T; 300 else 301 mii->mii_media_active |= IFM_100_TX; 302 mii->mii_media_active |= IFM_HDX; 303 } else 304 mii->mii_media_active = ife->ifm_media; 305 } 306 307 static void 308 nsphy_reset(struct mii_softc *sc) 309 { 310 int i; 311 uint16_t reg; 312 313 if (sc->mii_flags & MIIF_NOISOLATE) 314 reg = BMCR_RESET; 315 else 316 reg = BMCR_RESET | BMCR_ISO; 317 PHY_WRITE(sc, MII_BMCR, reg); 318 319 /* 320 * Give it a little time to settle in case we just got power. 321 * The DP83840A data sheet suggests that a soft reset not happen 322 * within 500us of power being applied. Be conservative. 323 */ 324 delay(1000); 325 326 /* 327 * Wait another 2s for it to complete. 328 * This is only a little overkill as under normal circumstances 329 * the PHY can take up to 1s to complete reset. 330 * This is also a bit odd because after a reset, the BMCR will 331 * clear the reset bit and simply reports 0 even though the reset 332 * is not yet complete. 333 */ 334 for (i = 0; i < 1000; i++) { 335 PHY_READ(sc, MII_BMCR, ®); 336 if (reg && ((reg & BMCR_RESET) == 0)) 337 break; 338 delay(2000); 339 } 340 341 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 342 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 343 } 344
Indexes created Sun Oct 26 13:09:57 GMT 2025