nsphy.c revision 1.65
1 /* $NetBSD: nsphy.c,v 1.65 2019/11/27 10:19:20 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55 */ 56 57 /* 58 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY 59 * Data Sheet available from www.national.com 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.65 2019/11/27 10:19:20 msaitoh Exp $"); 64 65 #include <sys/param.h> 66 #include <sys/systm.h> 67 #include <sys/kernel.h> 68 #include <sys/device.h> 69 #include <sys/socket.h> 70 #include <sys/errno.h> 71 72 #include <net/if.h> 73 #include <net/if_media.h> 74 75 #include <dev/mii/mii.h> 76 #include <dev/mii/miivar.h> 77 #include <dev/mii/miidevs.h> 78 79 #include <dev/mii/nsphyreg.h> 80 81 static int nsphymatch(device_t, cfdata_t, void *); 82 static void nsphyattach(device_t, device_t, void *); 83 84 CFATTACH_DECL_NEW(nsphy, sizeof(struct mii_softc), 85 nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate); 86 87 static int nsphy_service(struct mii_softc *, struct mii_data *, int); 88 static void nsphy_status(struct mii_softc *); 89 static void nsphy_reset(struct mii_softc *sc); 90 91 static const struct mii_phy_funcs nsphy_funcs = { 92 nsphy_service, nsphy_status, nsphy_reset, 93 }; 94 95 static const struct mii_phydesc nsphys[] = { 96 MII_PHY_DESC(xxNATSEMI, DP83840), 97 MII_PHY_END, 98 }; 99 100 static int 101 nsphymatch(device_t parent, cfdata_t match, void *aux) 102 { 103 struct mii_attach_args *ma = aux; 104 105 if (mii_phy_match(ma, nsphys) != NULL) 106 return 10; 107 108 return 0; 109 } 110 111 static void 112 nsphyattach(device_t parent, device_t self, void *aux) 113 { 114 struct mii_softc *sc = device_private(self); 115 struct mii_attach_args *ma = aux; 116 struct mii_data *mii = ma->mii_data; 117 const struct mii_phydesc *mpd; 118 119 mpd = mii_phy_match(ma, nsphys); 120 aprint_naive(": Media interface\n"); 121 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 122 123 sc->mii_dev = self; 124 sc->mii_inst = mii->mii_instance; 125 sc->mii_phy = ma->mii_phyno; 126 sc->mii_funcs = &nsphy_funcs; 127 sc->mii_pdata = mii; 128 sc->mii_flags = ma->mii_flags; 129 130 PHY_RESET(sc); 131 132 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 133 sc->mii_capabilities &= ma->mii_capmask; 134 135 mii_phy_add_media(sc); 136 } 137 138 static int 139 nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 140 { 141 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 142 uint16_t reg; 143 144 switch (cmd) { 145 case MII_POLLSTAT: 146 /* If we're not polling our PHY instance, just return. */ 147 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 148 return 0; 149 break; 150 151 case MII_MEDIACHG: 152 /* 153 * If the media indicates a different PHY instance, 154 * isolate ourselves. 155 */ 156 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) { 157 PHY_READ(sc, MII_BMCR, ®); 158 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 159 return 0; 160 } 161 162 /* If the interface is not up, don't do anything. */ 163 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 164 break; 165 166 PHY_READ(sc, MII_NSPHY_PCR, ®); 167 168 /* 169 * Set up the PCR to use LED4 to indicate full-duplex 170 * in both 10baseT and 100baseTX modes. 171 */ 172 reg |= PCR_LED4MODE; 173 174 /* 175 * Make sure Carrier Integrity Monitor function is 176 * disabled (normal for Node operation, but sometimes 177 * it's not set?!) 178 */ 179 reg |= PCR_CIMDIS; 180 181 /* 182 * Make sure "force link good" is set to normal mode. 183 * It's only intended for debugging. 184 */ 185 reg |= PCR_FLINK100; 186 187 /* 188 * Mystery bits which are supposedly `reserved', 189 * but we seem to need to set them when the PHY 190 * is connected to some interfaces: 191 * 192 * 0x0400 is needed for fxp 193 * (Intel EtherExpress Pro 10+/100B, 82557 chip) 194 * (nsphy with a DP83840 chip) 195 * 0x0100 may be needed for some other card 196 */ 197 reg |= 0x0100 | 0x0400; 198 199 PHY_WRITE(sc, MII_NSPHY_PCR, reg); 200 201 mii_phy_setmedia(sc); 202 break; 203 204 case MII_TICK: 205 /* If we're not currently selected, just return. */ 206 if (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst) 207 return 0; 208 209 if (mii_phy_tick(sc) == EJUSTRETURN) 210 return 0; 211 break; 212 213 case MII_DOWN: 214 mii_phy_down(sc); 215 return 0; 216 } 217 218 /* Update the media status. */ 219 mii_phy_status(sc); 220 221 /* Callback if something changed. */ 222 mii_phy_update(sc, cmd); 223 return 0; 224 } 225 226 static void 227 nsphy_status(struct mii_softc *sc) 228 { 229 struct mii_data *mii = sc->mii_pdata; 230 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 231 uint16_t bmsr, bmcr, aner, anar, par, anlpar, result; 232 233 mii->mii_media_status = IFM_AVALID; 234 mii->mii_media_active = IFM_ETHER; 235 236 PHY_READ(sc, MII_BMSR, &bmsr); 237 PHY_READ(sc, MII_BMSR, &bmsr); 238 if (bmsr & BMSR_LINK) 239 mii->mii_media_status |= IFM_ACTIVE; 240 241 PHY_READ(sc, MII_BMCR, &bmcr); 242 if (bmcr & BMCR_ISO) { 243 mii->mii_media_active |= IFM_NONE; 244 mii->mii_media_status = 0; 245 return; 246 } 247 248 if (bmcr & BMCR_LOOP) 249 mii->mii_media_active |= IFM_LOOP; 250 251 if (bmcr & BMCR_AUTOEN) { 252 /* 253 * The PAR status bits are only valid if autonegotiation 254 * has completed (or it's disabled). 255 */ 256 if ((bmsr & BMSR_ACOMP) == 0) { 257 /* Erg, still trying, I guess... */ 258 mii->mii_media_active |= IFM_NONE; 259 return; 260 } 261 262 /* 263 * Argh. The PAR doesn't seem to indicate duplex mode 264 * properly! Determine media based on link partner's 265 * advertised capabilities. 266 */ 267 PHY_READ(sc, MII_ANER, &aner); 268 if (aner & ANER_LPAN) { 269 PHY_READ(sc, MII_ANAR, &anar); 270 PHY_READ(sc, MII_ANLPAR, &anlpar); 271 result = anar & anlpar; 272 if (result & ANLPAR_TX_FD) 273 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 274 else if (result & ANLPAR_T4) 275 mii->mii_media_active |= IFM_100_T4 | IFM_HDX; 276 else if (result & ANLPAR_TX) 277 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 278 else if (result & ANLPAR_10_FD) 279 mii->mii_media_active |= IFM_10_T | IFM_FDX; 280 else if (result & ANLPAR_10) 281 mii->mii_media_active |= IFM_10_T | IFM_HDX; 282 else 283 mii->mii_media_active |= IFM_NONE; 284 return; 285 } 286 287 /* 288 * Link partner is not capable of autonegotiation. 289 * We will never be in full-duplex mode if this is 290 * the case, so reading the PAR is OK. 291 */ 292 PHY_READ(sc, MII_NSPHY_PAR, &par); 293 if (par & PAR_10) 294 mii->mii_media_active |= IFM_10_T; 295 else 296 mii->mii_media_active |= IFM_100_TX; 297 mii->mii_media_active |= IFM_HDX; 298 } else 299 mii->mii_media_active = ife->ifm_media; 300 } 301 302 static void 303 nsphy_reset(struct mii_softc *sc) 304 { 305 int i; 306 uint16_t reg; 307 308 if (sc->mii_flags & MIIF_NOISOLATE) 309 reg = BMCR_RESET; 310 else 311 reg = BMCR_RESET | BMCR_ISO; 312 PHY_WRITE(sc, MII_BMCR, reg); 313 314 /* 315 * Give it a little time to settle in case we just got power. 316 * The DP83840A data sheet suggests that a soft reset not happen 317 * within 500us of power being applied. Be conservative. 318 */ 319 delay(1000); 320 321 /* 322 * Wait another 2s for it to complete. 323 * This is only a little overkill as under normal circumstances 324 * the PHY can take up to 1s to complete reset. 325 * This is also a bit odd because after a reset, the BMCR will 326 * clear the reset bit and simply reports 0 even though the reset 327 * is not yet complete. 328 */ 329 for (i = 0; i < 1000; i++) { 330 PHY_READ(sc, MII_BMCR, ®); 331 if (reg && ((reg & BMCR_RESET) == 0)) 332 break; 333 delay(2000); 334 } 335 336 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) 337 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 338 } 339
Indexes created Thu Oct 23 18:09:57 GMT 2025