qsphy.c revision 1.5 1 /* $NetBSD: qsphy.c,v 1.5 1998/11/04 22:15:41 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Manuel Bouyer.
54 * 4. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 /*
70 * driver for Quality Semiconductor's QS6612 ethernet 10/100 PHY
71 * datasheet from www.qualitysemi.com
72 */
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/device.h>
78 #include <sys/malloc.h>
79 #include <sys/socket.h>
80
81 #include <net/if.h>
82 #include <net/if_media.h>
83
84 #include <dev/mii/mii.h>
85 #include <dev/mii/miivar.h>
86 #include <dev/mii/miidevs.h>
87
88 #include <dev/mii/qsphyreg.h>
89
90 struct qsphy_softc {
91 struct mii_softc sc_mii; /* generic PHY */
92 int sc_capabilities;
93 int sc_active;
94 };
95
96 int qsphymatch __P((struct device *, struct cfdata *, void *));
97 void qsphyattach __P((struct device *, struct device *, void *));
98
99 struct cfattach qsphy_ca = {
100 sizeof(struct qsphy_softc), qsphymatch, qsphyattach
101 };
102
103 int qsphy_service __P((struct mii_softc *, struct mii_data *, int));
104 void qsphy_reset __P((struct qsphy_softc *));
105 void qsphy_auto __P((struct qsphy_softc *));
106 void qsphy_status __P((struct qsphy_softc *));
107
108 int
109 qsphymatch(parent, match, aux)
110 struct device *parent;
111 struct cfdata *match;
112 void *aux;
113 {
114 struct mii_attach_args *ma = aux;
115
116 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_QUALSEMI &&
117 MII_MODEL(ma->mii_id2) == MII_MODEL_QUALSEMI_QS6612)
118 return (1);
119
120 return (0);
121 }
122
123 void
124 qsphyattach(parent, self, aux)
125 struct device *parent, *self;
126 void *aux;
127 {
128 struct qsphy_softc *sc = (struct qsphy_softc *)self;
129 struct mii_attach_args *ma = aux;
130 struct mii_data *mii = ma->mii_data;
131
132 printf(": %s, rev. %d\n", MII_STR_QUALSEMI_QS6612,
133 MII_REV(ma->mii_id2));
134
135 sc->sc_mii.mii_inst = mii->mii_instance;
136 sc->sc_mii.mii_phy = ma->mii_phyno;
137 sc->sc_mii.mii_service = qsphy_service;
138 sc->sc_mii.mii_pdata = mii;
139
140 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
141
142 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->sc_mii.mii_inst),
143 BMCR_ISO);
144 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->sc_mii.mii_inst),
145 BMCR_LOOP|BMCR_S100);
146
147 qsphy_reset(sc);
148
149 sc->sc_capabilities = PHY_READ(&sc->sc_mii, MII_BMSR) & ma->mii_capmask;
150 printf("%s: ", sc->sc_mii.mii_dev.dv_xname);
151 if ((sc->sc_capabilities & BMSR_MEDIAMASK) == 0)
152 printf("no media present");
153 else
154 mii_add_media(mii, sc->sc_capabilities, sc->sc_mii.mii_inst);
155 printf("\n");
156 #undef ADD
157 }
158
159 int
160 qsphy_service(self, mii, cmd)
161 struct mii_softc *self;
162 struct mii_data *mii;
163 int cmd;
164 {
165 struct qsphy_softc *sc = (struct qsphy_softc *)self;
166 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
167 int reg;
168
169 switch (cmd) {
170 case MII_POLLSTAT:
171 /*
172 * If we're not polling our PHY instance, just return.
173 */
174 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
175 return (0);
176 break;
177
178 case MII_MEDIACHG:
179 /*
180 * If the media indicates a different PHY instance,
181 * isolate ourselves.
182 */
183 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst) {
184 reg = PHY_READ(&sc->sc_mii, MII_BMCR);
185 PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
186 return (0);
187 }
188
189 /*
190 * If the interface is not up, don't do anything.
191 */
192 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
193 break;
194
195 switch (IFM_SUBTYPE(ife->ifm_media)) {
196 case IFM_AUTO:
197 /*
198 * If we're already in auto mode, just return.
199 */
200 if (PHY_READ(&sc->sc_mii, MII_BMCR) & BMCR_AUTOEN)
201 return (0);
202 qsphy_auto(sc);
203 break;
204 case IFM_100_T4:
205 /*
206 * XXX Not supported as a manual setting right now.
207 */
208 return (EINVAL);
209 default:
210 /*
211 * BMCR data is stored in the ifmedia entry.
212 */
213 PHY_WRITE(&sc->sc_mii, MII_ANAR,
214 mii_anar(ife->ifm_media));
215 PHY_WRITE(&sc->sc_mii, MII_BMCR, ife->ifm_data);
216 }
217 break;
218
219 case MII_TICK:
220 /*
221 * If we're not currently selected, just return.
222 */
223 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
224 return (0);
225
226 /*
227 * Only used for autonegotiation.
228 */
229 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
230 return (0);
231
232 /*
233 * Is the interface even up?
234 */
235 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
236 return (0);
237
238 /*
239 * The QS6612's autonegotiation doesn't need to be
240 * kicked; it continues in the background.
241 */
242 break;
243 }
244
245 /* Update the media status. */
246 qsphy_status(sc);
247
248 /* Callback if something changed. */
249 if (sc->sc_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
250 (*mii->mii_statchg)(sc->sc_mii.mii_dev.dv_parent);
251 sc->sc_active = mii->mii_media_active;
252 }
253 return (0);
254 }
255
256 void
257 qsphy_status(sc)
258 struct qsphy_softc *sc;
259 {
260 struct mii_data *mii = sc->sc_mii.mii_pdata;
261 int bmsr, bmcr, pctl;
262
263 mii->mii_media_status = IFM_AVALID;
264 mii->mii_media_active = IFM_ETHER;
265
266 bmsr = PHY_READ(&sc->sc_mii, MII_BMSR) |
267 PHY_READ(&sc->sc_mii, MII_BMSR);
268 if (bmsr & BMSR_LINK)
269 mii->mii_media_status |= IFM_ACTIVE;
270
271 bmcr = PHY_READ(&sc->sc_mii, MII_BMCR);
272 if (bmcr & BMCR_ISO) {
273 mii->mii_media_active |= IFM_NONE;
274 mii->mii_media_status = 0;
275 return;
276 }
277
278 if (bmcr & BMCR_LOOP)
279 mii->mii_media_active |= IFM_LOOP;
280
281 if ((bmcr & BMCR_AUTOEN) && (bmsr & BMSR_ACOMP) == 0) {
282 /* Erg, still trying, I guess... */
283 mii->mii_media_active |= IFM_NONE;
284 return;
285 }
286
287 pctl = PHY_READ(&sc->sc_mii, MII_QSPHY_PCTL) |
288 PHY_READ(&sc->sc_mii, MII_QSPHY_PCTL);
289 switch (pctl & PCTL_OPMASK) {
290 case PCTL_10_T:
291 mii->mii_media_active |= IFM_10_T;
292 break;
293 case PCTL_10_T_FDX:
294 mii->mii_media_active |= IFM_10_T|IFM_FDX;
295 break;
296 case PCTL_100_TX:
297 mii->mii_media_active |= IFM_100_TX;
298 break;
299 case PCTL_100_TX_FDX:
300 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
301 break;
302 case PCTL_100_T4:
303 mii->mii_media_active |= IFM_100_T4;
304 break;
305 default:
306 /* Erg... this shouldn't happen. */
307 mii->mii_media_active |= IFM_NONE;
308 break;
309 }
310 }
311
312 void
313 qsphy_auto(sc)
314 struct qsphy_softc *sc;
315 {
316 int bmsr, i;
317
318 PHY_WRITE(&sc->sc_mii, MII_ANAR,
319 BMSR_MEDIA_TO_ANAR(sc->sc_capabilities) | ANAR_CSMA);
320 PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
321
322 /* Wait 500ms for it to complete. */
323 for (i = 0; i < 500; i++) {
324 if ((bmsr = PHY_READ(&sc->sc_mii, MII_BMSR)) & BMSR_ACOMP)
325 return;
326 delay(1000);
327 }
328 #if 0
329 if ((bmsr & BMSR_ACOMP) == 0)
330 printf("%s: autonegotiation failed to complete\n",
331 sc->sc_mii.mii_dev.dv_xname);
332 #endif
333 }
334
335 void
336 qsphy_reset(sc)
337 struct qsphy_softc *sc;
338 {
339 int reg, i;
340
341 PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_RESET|BMCR_ISO);
342
343 /* Wait 100ms for it to complete. */
344 for (i = 0; i < 100; i++) {
345 reg = PHY_READ(&sc->sc_mii, MII_BMCR);
346 if ((reg & BMCR_RESET) == 0)
347 break;
348 delay(1000);
349 }
350
351 /* Make sure the PHY is isolated. */
352 if (sc->sc_mii.mii_inst != 0)
353 PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
354
355 PHY_WRITE(&sc->sc_mii, MII_QSPHY_IMASK, 0);
356 }
357