rlphy.c revision 1.39 1 1.39 thorpej /* $NetBSD: rlphy.c,v 1.39 2020/03/15 23:04:50 thorpej Exp $ */
2 1.1 xtraeme /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */
3 1.1 xtraeme
4 1.1 xtraeme /*
5 1.1 xtraeme * Copyright (c) 1998, 1999 Jason L. Wright (jason (at) thought.net)
6 1.1 xtraeme * All rights reserved.
7 1.1 xtraeme *
8 1.1 xtraeme * Redistribution and use in source and binary forms, with or without
9 1.1 xtraeme * modification, are permitted provided that the following conditions
10 1.1 xtraeme * are met:
11 1.1 xtraeme * 1. Redistributions of source code must retain the above copyright
12 1.1 xtraeme * notice, this list of conditions and the following disclaimer.
13 1.1 xtraeme * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 xtraeme * notice, this list of conditions and the following disclaimer in the
15 1.1 xtraeme * documentation and/or other materials provided with the distribution.
16 1.1 xtraeme *
17 1.1 xtraeme * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 xtraeme * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 1.1 xtraeme * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 1.1 xtraeme * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 1.1 xtraeme * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 1.1 xtraeme * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 1.1 xtraeme * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 xtraeme * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 1.1 xtraeme * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 1.1 xtraeme * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 xtraeme * POSSIBILITY OF SUCH DAMAGE.
28 1.1 xtraeme */
29 1.1 xtraeme
30 1.1 xtraeme /*
31 1.1 xtraeme * Driver for the internal PHY found on RTL8139 based nics, based
32 1.1 xtraeme * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
33 1.1 xtraeme * (National Semiconductor DP83840).
34 1.1 xtraeme */
35 1.1 xtraeme
36 1.1 xtraeme /*
37 1.1 xtraeme * Ported to NetBSD by Juan Romero Pardines <xtraeme (at) NetBSD.org>
38 1.1 xtraeme */
39 1.1 xtraeme
40 1.1 xtraeme #include <sys/cdefs.h>
41 1.39 thorpej __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.39 2020/03/15 23:04:50 thorpej Exp $");
42 1.1 xtraeme
43 1.1 xtraeme #include <sys/param.h>
44 1.1 xtraeme #include <sys/systm.h>
45 1.1 xtraeme #include <sys/kernel.h>
46 1.1 xtraeme #include <sys/device.h>
47 1.1 xtraeme #include <sys/socket.h>
48 1.1 xtraeme #include <sys/errno.h>
49 1.1 xtraeme
50 1.1 xtraeme #include <net/if.h>
51 1.1 xtraeme #include <net/if_media.h>
52 1.1 xtraeme
53 1.1 xtraeme #include <dev/mii/mii.h>
54 1.1 xtraeme #include <dev/mii/miivar.h>
55 1.1 xtraeme #include <dev/mii/miidevs.h>
56 1.17 ad #include <sys/bus.h>
57 1.1 xtraeme #include <dev/ic/rtl81x9reg.h>
58 1.1 xtraeme
59 1.14 tsutsui struct rlphy_softc {
60 1.14 tsutsui struct mii_softc sc_mii;
61 1.33 rin int sc_rtl8201;
62 1.14 tsutsui };
63 1.14 tsutsui
64 1.35 msaitoh static int rlphymatch(device_t, cfdata_t, void *);
65 1.35 msaitoh static void rlphyattach(device_t, device_t, void *);
66 1.1 xtraeme
67 1.22 xtraeme CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc),
68 1.1 xtraeme rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
69 1.1 xtraeme
70 1.35 msaitoh static int rlphy_service(struct mii_softc *, struct mii_data *, int);
71 1.35 msaitoh static void rlphy_status(struct mii_softc *);
72 1.35 msaitoh static void rlphy_reset(struct mii_softc *);
73 1.13 tsutsui
74 1.1 xtraeme const struct mii_phy_funcs rlphy_funcs = {
75 1.13 tsutsui rlphy_service, rlphy_status, rlphy_reset,
76 1.1 xtraeme };
77 1.1 xtraeme
78 1.7 chs static const struct mii_phydesc rlphys[] = {
79 1.34 christos MII_PHY_DESC(yyREALTEK, RTL8201L),
80 1.34 christos MII_PHY_DESC(REALTEK, RTL8201E),
81 1.37 msaitoh MII_PHY_DESC(xxICPLUS, IP101),
82 1.34 christos MII_PHY_END,
83 1.7 chs };
84 1.7 chs
85 1.35 msaitoh static int
86 1.22 xtraeme rlphymatch(device_t parent, cfdata_t match, void *aux)
87 1.1 xtraeme {
88 1.1 xtraeme struct mii_attach_args *ma = aux;
89 1.27 pooka struct mii_data *mii = ma->mii_data;
90 1.27 pooka
91 1.27 pooka if (mii->mii_instance != 0)
92 1.27 pooka return 0;
93 1.1 xtraeme
94 1.7 chs if (mii_phy_match(ma, rlphys) != NULL)
95 1.36 msaitoh return 10;
96 1.1 xtraeme
97 1.1 xtraeme if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
98 1.1 xtraeme MII_MODEL(ma->mii_id2) != 0)
99 1.1 xtraeme return 0;
100 1.1 xtraeme
101 1.11 tsutsui if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
102 1.1 xtraeme return 0;
103 1.1 xtraeme
104 1.1 xtraeme /*
105 1.1 xtraeme * A "real" phy should get preference, but on the 8139 there
106 1.1 xtraeme * is no phyid register.
107 1.1 xtraeme */
108 1.1 xtraeme return 5;
109 1.1 xtraeme }
110 1.1 xtraeme
111 1.35 msaitoh static void
112 1.22 xtraeme rlphyattach(device_t parent, device_t self, void *aux)
113 1.1 xtraeme {
114 1.14 tsutsui struct rlphy_softc *rsc = device_private(self);
115 1.14 tsutsui struct mii_softc *sc = &rsc->sc_mii;
116 1.1 xtraeme struct mii_attach_args *ma = aux;
117 1.1 xtraeme struct mii_data *mii = ma->mii_data;
118 1.1 xtraeme
119 1.18 uwe aprint_naive("\n");
120 1.1 xtraeme if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
121 1.33 rin rsc->sc_rtl8201 = 1;
122 1.1 xtraeme aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
123 1.1 xtraeme MII_REV(ma->mii_id2));
124 1.33 rin } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_REALTEK_RTL8201E) {
125 1.33 rin rsc->sc_rtl8201 = 1;
126 1.33 rin aprint_normal(": %s, rev. %d\n", MII_STR_REALTEK_RTL8201E,
127 1.33 rin MII_REV(ma->mii_id2));
128 1.37 msaitoh } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_xxICPLUS_IP101) {
129 1.37 msaitoh aprint_normal(": %s, rev. %d\n", MII_STR_xxICPLUS_IP101,
130 1.37 msaitoh MII_REV(ma->mii_id2));
131 1.1 xtraeme } else
132 1.1 xtraeme aprint_normal(": Realtek internal PHY\n");
133 1.1 xtraeme
134 1.22 xtraeme sc->mii_dev = self;
135 1.1 xtraeme sc->mii_inst = mii->mii_instance;
136 1.1 xtraeme sc->mii_phy = ma->mii_phyno;
137 1.1 xtraeme sc->mii_funcs = &rlphy_funcs;
138 1.1 xtraeme sc->mii_pdata = mii;
139 1.1 xtraeme sc->mii_flags = ma->mii_flags;
140 1.1 xtraeme
141 1.1 xtraeme sc->mii_flags |= MIIF_NOISOLATE;
142 1.1 xtraeme
143 1.39 thorpej mii_lock(mii);
144 1.39 thorpej
145 1.1 xtraeme PHY_RESET(sc);
146 1.1 xtraeme
147 1.32 msaitoh PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
148 1.32 msaitoh sc->mii_capabilities &= ma->mii_capmask;
149 1.38 msaitoh
150 1.39 thorpej mii_unlock(mii);
151 1.39 thorpej
152 1.38 msaitoh mii_phy_add_media(sc);
153 1.1 xtraeme }
154 1.1 xtraeme
155 1.35 msaitoh static int
156 1.1 xtraeme rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
157 1.1 xtraeme {
158 1.1 xtraeme struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
159 1.1 xtraeme
160 1.36 msaitoh /* Can't isolate the RTL8139 phy, so it has to be the only one. */
161 1.1 xtraeme if (IFM_INST(ife->ifm_media) != sc->mii_inst)
162 1.1 xtraeme panic("rlphy_service: attempt to isolate phy");
163 1.1 xtraeme
164 1.39 thorpej KASSERT(mii_locked(mii));
165 1.39 thorpej
166 1.1 xtraeme switch (cmd) {
167 1.1 xtraeme case MII_POLLSTAT:
168 1.1 xtraeme break;
169 1.1 xtraeme
170 1.1 xtraeme case MII_MEDIACHG:
171 1.36 msaitoh /* If the interface is not up, don't do anything. */
172 1.1 xtraeme if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
173 1.1 xtraeme break;
174 1.1 xtraeme
175 1.26 mlelstv mii_phy_setmedia(sc);
176 1.1 xtraeme break;
177 1.1 xtraeme
178 1.1 xtraeme case MII_TICK:
179 1.36 msaitoh /* Is the interface even up? */
180 1.1 xtraeme if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
181 1.36 msaitoh return 0;
182 1.1 xtraeme
183 1.36 msaitoh /* Only used for autonegotiation. */
184 1.1 xtraeme if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
185 1.1 xtraeme break;
186 1.1 xtraeme
187 1.1 xtraeme /*
188 1.1 xtraeme * The RealTek PHY's autonegotiation doesn't need to be
189 1.1 xtraeme * kicked; it continues in the background.
190 1.1 xtraeme */
191 1.1 xtraeme break;
192 1.1 xtraeme
193 1.1 xtraeme case MII_DOWN:
194 1.1 xtraeme mii_phy_down(sc);
195 1.36 msaitoh return 0;
196 1.1 xtraeme }
197 1.1 xtraeme
198 1.1 xtraeme /* Update the media status. */
199 1.1 xtraeme mii_phy_status(sc);
200 1.1 xtraeme
201 1.1 xtraeme /* Callback if something changed. */
202 1.1 xtraeme mii_phy_update(sc, cmd);
203 1.36 msaitoh return 0;
204 1.1 xtraeme }
205 1.1 xtraeme
206 1.35 msaitoh static void
207 1.1 xtraeme rlphy_status(struct mii_softc *sc)
208 1.1 xtraeme {
209 1.14 tsutsui struct rlphy_softc *rsc = (void *)sc;
210 1.1 xtraeme struct mii_data *mii = sc->mii_pdata;
211 1.1 xtraeme struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212 1.32 msaitoh uint16_t bmsr, bmcr, anar, anlpar, result, reg;
213 1.1 xtraeme
214 1.39 thorpej KASSERT(mii_locked(mii));
215 1.39 thorpej
216 1.1 xtraeme mii->mii_media_status = IFM_AVALID;
217 1.1 xtraeme mii->mii_media_active = IFM_ETHER;
218 1.1 xtraeme
219 1.32 msaitoh PHY_READ(sc, MII_BMSR, &bmsr);
220 1.32 msaitoh PHY_READ(sc, MII_BMSR, &bmsr);
221 1.1 xtraeme if (bmsr & BMSR_LINK)
222 1.1 xtraeme mii->mii_media_status |= IFM_ACTIVE;
223 1.1 xtraeme
224 1.32 msaitoh PHY_READ(sc, MII_BMCR, &bmcr);
225 1.1 xtraeme if (bmcr & BMCR_ISO) {
226 1.1 xtraeme mii->mii_media_active |= IFM_NONE;
227 1.1 xtraeme mii->mii_media_status = 0;
228 1.1 xtraeme return;
229 1.1 xtraeme }
230 1.1 xtraeme
231 1.1 xtraeme if (bmcr & BMCR_LOOP)
232 1.1 xtraeme mii->mii_media_active |= IFM_LOOP;
233 1.1 xtraeme
234 1.1 xtraeme if (bmcr & BMCR_AUTOEN) {
235 1.1 xtraeme /*
236 1.1 xtraeme * NWay autonegotiation takes the highest-order common
237 1.1 xtraeme * bit of the ANAR and ANLPAR (i.e. best media advertised
238 1.1 xtraeme * both by us and our link partner).
239 1.1 xtraeme */
240 1.1 xtraeme if ((bmsr & BMSR_ACOMP) == 0) {
241 1.1 xtraeme /* Erg, still trying, I guess... */
242 1.1 xtraeme mii->mii_media_active |= IFM_NONE;
243 1.1 xtraeme return;
244 1.1 xtraeme }
245 1.1 xtraeme
246 1.32 msaitoh PHY_READ(sc, MII_ANAR, &anar);
247 1.32 msaitoh PHY_READ(sc, MII_ANLPAR, &anlpar);
248 1.31 msaitoh result = anar & anlpar;
249 1.31 msaitoh if (result != 0) {
250 1.31 msaitoh if (result & ANLPAR_TX_FD)
251 1.36 msaitoh mii->mii_media_active |= IFM_100_TX | IFM_FDX;
252 1.31 msaitoh else if (result & ANLPAR_T4)
253 1.36 msaitoh mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
254 1.31 msaitoh else if (result & ANLPAR_TX)
255 1.36 msaitoh mii->mii_media_active |= IFM_100_TX | IFM_HDX;
256 1.31 msaitoh else if (result & ANLPAR_10_FD)
257 1.36 msaitoh mii->mii_media_active |= IFM_10_T | IFM_FDX;
258 1.31 msaitoh else if (result & ANLPAR_10)
259 1.36 msaitoh mii->mii_media_active |= IFM_10_T | IFM_HDX;
260 1.1 xtraeme else
261 1.1 xtraeme mii->mii_media_active |= IFM_NONE;
262 1.1 xtraeme return;
263 1.1 xtraeme }
264 1.1 xtraeme
265 1.1 xtraeme /*
266 1.1 xtraeme * If the other side doesn't support NWAY, then the
267 1.1 xtraeme * best we can do is determine if we have a 10Mbps or
268 1.28 msaitoh * 100Mbps link. There's no way to know if the link
269 1.1 xtraeme * is full or half duplex, so we default to half duplex
270 1.1 xtraeme * and hope that the user is clever enough to manually
271 1.1 xtraeme * change the media settings if we're wrong.
272 1.1 xtraeme */
273 1.1 xtraeme
274 1.1 xtraeme /*
275 1.1 xtraeme * The RealTek PHY supports non-NWAY link speed
276 1.1 xtraeme * detection, however it does not report the link
277 1.1 xtraeme * detection results via the ANLPAR or BMSR registers.
278 1.1 xtraeme * (What? RealTek doesn't do things the way everyone
279 1.1 xtraeme * else does? I'm just shocked, shocked I tell you.)
280 1.1 xtraeme * To determine the link speed, we have to do one
281 1.1 xtraeme * of two things:
282 1.1 xtraeme *
283 1.33 rin * - If this is a standalone RealTek RTL8201 PHY,
284 1.1 xtraeme * we can determine the link speed by testing bit 0
285 1.1 xtraeme * in the magic, vendor-specific register at offset
286 1.1 xtraeme * 0x19.
287 1.1 xtraeme *
288 1.1 xtraeme * - If this is a RealTek MAC with integrated PHY, we
289 1.1 xtraeme * can test the 'SPEED10' bit of the MAC's media status
290 1.1 xtraeme * register.
291 1.1 xtraeme */
292 1.33 rin if (rsc->sc_rtl8201) {
293 1.32 msaitoh PHY_READ(sc, 0x0019, ®);
294 1.32 msaitoh if (reg & 0x01)
295 1.14 tsutsui mii->mii_media_active |= IFM_100_TX;
296 1.14 tsutsui else
297 1.14 tsutsui mii->mii_media_active |= IFM_10_T;
298 1.14 tsutsui } else {
299 1.32 msaitoh PHY_READ(sc, RTK_MEDIASTAT, ®);
300 1.32 msaitoh if (reg & RTK_MEDIASTAT_SPEED10)
301 1.1 xtraeme mii->mii_media_active |= IFM_10_T;
302 1.1 xtraeme else
303 1.1 xtraeme mii->mii_media_active |= IFM_100_TX;
304 1.1 xtraeme }
305 1.29 msaitoh mii->mii_media_active |= IFM_HDX;
306 1.1 xtraeme } else
307 1.1 xtraeme mii->mii_media_active = ife->ifm_media;
308 1.1 xtraeme }
309 1.13 tsutsui
310 1.13 tsutsui static void
311 1.13 tsutsui rlphy_reset(struct mii_softc *sc)
312 1.13 tsutsui {
313 1.13 tsutsui
314 1.39 thorpej KASSERT(mii_locked(sc->mii_pdata));
315 1.39 thorpej
316 1.13 tsutsui mii_phy_reset(sc);
317 1.13 tsutsui
318 1.13 tsutsui /*
319 1.13 tsutsui * XXX RealTek PHY doesn't set the BMCR properly after
320 1.13 tsutsui * XXX reset, which breaks autonegotiation.
321 1.13 tsutsui */
322 1.13 tsutsui PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
323 1.13 tsutsui }
324