rlphy.c revision 1.12.10.1
1 /* $NetBSD: rlphy.c,v 1.12.10.1 2007/04/10 13:24:33 ad Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason (at) thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme (at) NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.12.10.1 2007/04/10 13:24:33 ad Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <machine/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 struct rlphy_softc { 60 struct mii_softc sc_mii; 61 int sc_rtl8201l; 62 }; 63 64 int rlphymatch(struct device *, struct cfdata *, void *); 65 void rlphyattach(struct device *, struct device *, void *); 66 67 CFATTACH_DECL(rlphy, sizeof(struct mii_softc), 68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 69 70 int rlphy_service(struct mii_softc *, struct mii_data *, int); 71 void rlphy_status(struct mii_softc *); 72 73 static void rlphy_reset(struct mii_softc *); 74 75 const struct mii_phy_funcs rlphy_funcs = { 76 rlphy_service, rlphy_status, rlphy_reset, 77 }; 78 79 static const struct mii_phydesc rlphys[] = { 80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, 81 MII_STR_yyREALTEK_RTL8201L }, 82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, 83 MII_STR_ICPLUS_IP101 }, 84 85 { 0, 0, 86 NULL }, 87 }; 88 89 int 90 rlphymatch(struct device *parent, struct cfdata *match, void *aux) 91 { 92 struct mii_attach_args *ma = aux; 93 94 if (mii_phy_match(ma, rlphys) != NULL) 95 return (10); 96 97 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 98 MII_MODEL(ma->mii_id2) != 0) 99 return 0; 100 101 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re")) 102 return 0; 103 104 /* 105 * A "real" phy should get preference, but on the 8139 there 106 * is no phyid register. 107 */ 108 return 5; 109 } 110 111 void 112 rlphyattach(struct device *parent, struct device *self, void *aux) 113 { 114 struct rlphy_softc *rsc = device_private(self); 115 struct mii_softc *sc = &rsc->sc_mii; 116 struct mii_attach_args *ma = aux; 117 struct mii_data *mii = ma->mii_data; 118 119 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 120 rsc->sc_rtl8201l = 1; 121 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 122 MII_REV(ma->mii_id2)); 123 } else 124 aprint_normal(": Realtek internal PHY\n"); 125 126 sc->mii_inst = mii->mii_instance; 127 sc->mii_phy = ma->mii_phyno; 128 sc->mii_funcs = &rlphy_funcs; 129 sc->mii_pdata = mii; 130 sc->mii_flags = ma->mii_flags; 131 132 sc->mii_flags |= MIIF_NOISOLATE; 133 134 PHY_RESET(sc); 135 136 aprint_normal("%s: ", sc->mii_dev.dv_xname); 137 sc->mii_capabilities = 138 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 139 if (sc->mii_capabilities & BMSR_MEDIAMASK) 140 mii_phy_add_media(sc); 141 aprint_normal("\n"); 142 } 143 144 int 145 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 146 { 147 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 148 149 int rv; 150 151 if (!device_is_active(&sc->mii_dev)) 152 return ENXIO; 153 154 /* 155 * Can't isolate the RTL8139 phy, so it has to be the only one. 156 */ 157 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 158 panic("rlphy_service: attempt to isolate phy"); 159 160 switch (cmd) { 161 case MII_POLLSTAT: 162 break; 163 164 case MII_MEDIACHG: 165 /* 166 * If the interface is not up, don't do anything. 167 */ 168 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 169 break; 170 171 switch (IFM_SUBTYPE(ife->ifm_media)) { 172 case IFM_AUTO: 173 /* 174 * If we're already in auto mode, just return. 175 */ 176 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 177 return (0); 178 (void) mii_phy_auto(sc, 0); 179 break; 180 case IFM_100_T4: 181 /* 182 * XXX Not supported as a manual setting right now. 183 */ 184 return (EINVAL); 185 default: 186 /* 187 * BMCR data is stored in the ifmedia entry. 188 */ 189 switch (ife->ifm_media & 190 (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 191 case IFM_ETHER|IFM_10_T: 192 rv = ANAR_10|ANAR_CSMA; 193 break; 194 case IFM_ETHER|IFM_10_T|IFM_FDX: 195 rv = ANAR_10_FD|ANAR_CSMA; 196 break; 197 case IFM_ETHER|IFM_100_TX: 198 rv = ANAR_TX|ANAR_CSMA; 199 break; 200 case IFM_ETHER|IFM_100_TX|IFM_FDX: 201 rv = ANAR_TX_FD|ANAR_CSMA; 202 break; 203 case IFM_ETHER|IFM_100_T4: 204 rv = ANAR_T4|ANAR_CSMA; 205 break; 206 default: 207 rv = 0; 208 break; 209 } 210 211 PHY_WRITE(sc, MII_ANAR, rv); 212 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 213 } 214 break; 215 216 case MII_TICK: 217 /* 218 * Is the interface even up? 219 */ 220 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 221 return (0); 222 223 /* 224 * Only used for autonegotiation. 225 */ 226 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 227 break; 228 229 /* 230 * The RealTek PHY's autonegotiation doesn't need to be 231 * kicked; it continues in the background. 232 */ 233 break; 234 235 case MII_DOWN: 236 mii_phy_down(sc); 237 return (0); 238 } 239 240 /* Update the media status. */ 241 mii_phy_status(sc); 242 243 /* Callback if something changed. */ 244 mii_phy_update(sc, cmd); 245 return (0); 246 } 247 248 void 249 rlphy_status(struct mii_softc *sc) 250 { 251 struct rlphy_softc *rsc = (void *)sc; 252 struct mii_data *mii = sc->mii_pdata; 253 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 254 int bmsr, bmcr, anlpar; 255 256 mii->mii_media_status = IFM_AVALID; 257 mii->mii_media_active = IFM_ETHER; 258 259 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 260 if (bmsr & BMSR_LINK) 261 mii->mii_media_status |= IFM_ACTIVE; 262 263 bmcr = PHY_READ(sc, MII_BMCR); 264 if (bmcr & BMCR_ISO) { 265 mii->mii_media_active |= IFM_NONE; 266 mii->mii_media_status = 0; 267 return; 268 } 269 270 if (bmcr & BMCR_LOOP) 271 mii->mii_media_active |= IFM_LOOP; 272 273 if (bmcr & BMCR_AUTOEN) { 274 /* 275 * NWay autonegotiation takes the highest-order common 276 * bit of the ANAR and ANLPAR (i.e. best media advertised 277 * both by us and our link partner). 278 */ 279 if ((bmsr & BMSR_ACOMP) == 0) { 280 /* Erg, still trying, I guess... */ 281 mii->mii_media_active |= IFM_NONE; 282 return; 283 } 284 285 if ((anlpar = PHY_READ(sc, MII_ANAR) & 286 PHY_READ(sc, MII_ANLPAR))) { 287 if (anlpar & ANLPAR_T4) 288 mii->mii_media_active |= IFM_100_T4; 289 else if (anlpar & ANLPAR_TX_FD) 290 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 291 else if (anlpar & ANLPAR_TX) 292 mii->mii_media_active |= IFM_100_TX; 293 else if (anlpar & ANLPAR_10_FD) 294 mii->mii_media_active |= IFM_10_T|IFM_FDX; 295 else if (anlpar & ANLPAR_10) 296 mii->mii_media_active |= IFM_10_T; 297 else 298 mii->mii_media_active |= IFM_NONE; 299 return; 300 } 301 302 /* 303 * If the other side doesn't support NWAY, then the 304 * best we can do is determine if we have a 10Mbps or 305 * 100Mbps link. There's no way to know if the link 306 * is full or half duplex, so we default to half duplex 307 * and hope that the user is clever enough to manually 308 * change the media settings if we're wrong. 309 */ 310 311 /* 312 * The RealTek PHY supports non-NWAY link speed 313 * detection, however it does not report the link 314 * detection results via the ANLPAR or BMSR registers. 315 * (What? RealTek doesn't do things the way everyone 316 * else does? I'm just shocked, shocked I tell you.) 317 * To determine the link speed, we have to do one 318 * of two things: 319 * 320 * - If this is a standalone RealTek RTL8201(L) PHY, 321 * we can determine the link speed by testing bit 0 322 * in the magic, vendor-specific register at offset 323 * 0x19. 324 * 325 * - If this is a RealTek MAC with integrated PHY, we 326 * can test the 'SPEED10' bit of the MAC's media status 327 * register. 328 */ 329 if (rsc->sc_rtl8201l) { 330 if (PHY_READ(sc, 0x0019) & 0x01) 331 mii->mii_media_active |= IFM_100_TX; 332 else 333 mii->mii_media_active |= IFM_10_T; 334 } else { 335 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 336 mii->mii_media_active |= IFM_10_T; 337 else 338 mii->mii_media_active |= IFM_100_TX; 339 } 340 341 } else 342 mii->mii_media_active = ife->ifm_media; 343 } 344 345 static void 346 rlphy_reset(struct mii_softc *sc) 347 { 348 349 mii_phy_reset(sc); 350 351 /* 352 * XXX RealTek PHY doesn't set the BMCR properly after 353 * XXX reset, which breaks autonegotiation. 354 */ 355 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN); 356 } 357
Indexes created Wed Oct 22 13:09:56 GMT 2025