rlphy.c revision 1.27.28.1 1 /* $NetBSD: rlphy.c,v 1.27.28.1 2014/08/10 06:54:53 tls Exp $ */
2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */
3
4 /*
5 * Copyright (c) 1998, 1999 Jason L. Wright (jason (at) thought.net)
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 /*
31 * Driver for the internal PHY found on RTL8139 based nics, based
32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
33 * (National Semiconductor DP83840).
34 */
35
36 /*
37 * Ported to NetBSD by Juan Romero Pardines <xtraeme (at) NetBSD.org>
38 */
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.27.28.1 2014/08/10 06:54:53 tls Exp $");
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/device.h>
47 #include <sys/socket.h>
48 #include <sys/errno.h>
49
50 #include <net/if.h>
51 #include <net/if_media.h>
52
53 #include <dev/mii/mii.h>
54 #include <dev/mii/miivar.h>
55 #include <dev/mii/miidevs.h>
56 #include <sys/bus.h>
57 #include <dev/ic/rtl81x9reg.h>
58
59 struct rlphy_softc {
60 struct mii_softc sc_mii;
61 int sc_rtl8201l;
62 };
63
64 int rlphymatch(device_t, cfdata_t, void *);
65 void rlphyattach(device_t, device_t, void *);
66
67 CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc),
68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
69
70 int rlphy_service(struct mii_softc *, struct mii_data *, int);
71 void rlphy_status(struct mii_softc *);
72
73 static void rlphy_reset(struct mii_softc *);
74
75 const struct mii_phy_funcs rlphy_funcs = {
76 rlphy_service, rlphy_status, rlphy_reset,
77 };
78
79 static const struct mii_phydesc rlphys[] = {
80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L,
81 MII_STR_yyREALTEK_RTL8201L },
82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101,
83 MII_STR_ICPLUS_IP101 },
84
85 { 0, 0,
86 NULL },
87 };
88
89 int
90 rlphymatch(device_t parent, cfdata_t match, void *aux)
91 {
92 struct mii_attach_args *ma = aux;
93 struct mii_data *mii = ma->mii_data;
94
95 if (mii->mii_instance != 0)
96 return 0;
97
98 if (mii_phy_match(ma, rlphys) != NULL)
99 return (10);
100
101 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
102 MII_MODEL(ma->mii_id2) != 0)
103 return 0;
104
105 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
106 return 0;
107
108 /*
109 * A "real" phy should get preference, but on the 8139 there
110 * is no phyid register.
111 */
112 return 5;
113 }
114
115 void
116 rlphyattach(device_t parent, device_t self, void *aux)
117 {
118 struct rlphy_softc *rsc = device_private(self);
119 struct mii_softc *sc = &rsc->sc_mii;
120 struct mii_attach_args *ma = aux;
121 struct mii_data *mii = ma->mii_data;
122
123 aprint_naive("\n");
124 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
125 rsc->sc_rtl8201l = 1;
126 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
127 MII_REV(ma->mii_id2));
128 } else
129 aprint_normal(": Realtek internal PHY\n");
130
131 sc->mii_dev = self;
132 sc->mii_inst = mii->mii_instance;
133 sc->mii_phy = ma->mii_phyno;
134 sc->mii_funcs = &rlphy_funcs;
135 sc->mii_pdata = mii;
136 sc->mii_flags = ma->mii_flags;
137
138 sc->mii_flags |= MIIF_NOISOLATE;
139
140 PHY_RESET(sc);
141
142 aprint_normal_dev(self, "");
143 sc->mii_capabilities =
144 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
145 if (sc->mii_capabilities & BMSR_MEDIAMASK)
146 mii_phy_add_media(sc);
147 aprint_normal("\n");
148 }
149
150 int
151 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
152 {
153 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
154
155 /*
156 * Can't isolate the RTL8139 phy, so it has to be the only one.
157 */
158 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
159 panic("rlphy_service: attempt to isolate phy");
160
161 switch (cmd) {
162 case MII_POLLSTAT:
163 break;
164
165 case MII_MEDIACHG:
166 /*
167 * If the interface is not up, don't do anything.
168 */
169 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
170 break;
171
172 mii_phy_setmedia(sc);
173 break;
174
175 case MII_TICK:
176 /*
177 * Is the interface even up?
178 */
179 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
180 return (0);
181
182 /*
183 * Only used for autonegotiation.
184 */
185 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
186 break;
187
188 /*
189 * The RealTek PHY's autonegotiation doesn't need to be
190 * kicked; it continues in the background.
191 */
192 break;
193
194 case MII_DOWN:
195 mii_phy_down(sc);
196 return (0);
197 }
198
199 /* Update the media status. */
200 mii_phy_status(sc);
201
202 /* Callback if something changed. */
203 mii_phy_update(sc, cmd);
204 return (0);
205 }
206
207 void
208 rlphy_status(struct mii_softc *sc)
209 {
210 struct rlphy_softc *rsc = (void *)sc;
211 struct mii_data *mii = sc->mii_pdata;
212 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
213 int bmsr, bmcr, anlpar;
214
215 mii->mii_media_status = IFM_AVALID;
216 mii->mii_media_active = IFM_ETHER;
217
218 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
219 if (bmsr & BMSR_LINK)
220 mii->mii_media_status |= IFM_ACTIVE;
221
222 bmcr = PHY_READ(sc, MII_BMCR);
223 if (bmcr & BMCR_ISO) {
224 mii->mii_media_active |= IFM_NONE;
225 mii->mii_media_status = 0;
226 return;
227 }
228
229 if (bmcr & BMCR_LOOP)
230 mii->mii_media_active |= IFM_LOOP;
231
232 if (bmcr & BMCR_AUTOEN) {
233 /*
234 * NWay autonegotiation takes the highest-order common
235 * bit of the ANAR and ANLPAR (i.e. best media advertised
236 * both by us and our link partner).
237 */
238 if ((bmsr & BMSR_ACOMP) == 0) {
239 /* Erg, still trying, I guess... */
240 mii->mii_media_active |= IFM_NONE;
241 return;
242 }
243
244 if ((anlpar = PHY_READ(sc, MII_ANAR) &
245 PHY_READ(sc, MII_ANLPAR))) {
246 if (anlpar & ANLPAR_TX_FD)
247 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
248 else if (anlpar & ANLPAR_T4)
249 mii->mii_media_active |= IFM_100_T4|IFM_HDX;
250 else if (anlpar & ANLPAR_TX)
251 mii->mii_media_active |= IFM_100_TX|IFM_HDX;
252 else if (anlpar & ANLPAR_10_FD)
253 mii->mii_media_active |= IFM_10_T|IFM_FDX;
254 else if (anlpar & ANLPAR_10)
255 mii->mii_media_active |= IFM_10_T|IFM_HDX;
256 else
257 mii->mii_media_active |= IFM_NONE;
258 return;
259 }
260
261 /*
262 * If the other side doesn't support NWAY, then the
263 * best we can do is determine if we have a 10Mbps or
264 * 100Mbps link. There's no way to know if the link
265 * is full or half duplex, so we default to half duplex
266 * and hope that the user is clever enough to manually
267 * change the media settings if we're wrong.
268 */
269
270 /*
271 * The RealTek PHY supports non-NWAY link speed
272 * detection, however it does not report the link
273 * detection results via the ANLPAR or BMSR registers.
274 * (What? RealTek doesn't do things the way everyone
275 * else does? I'm just shocked, shocked I tell you.)
276 * To determine the link speed, we have to do one
277 * of two things:
278 *
279 * - If this is a standalone RealTek RTL8201(L) PHY,
280 * we can determine the link speed by testing bit 0
281 * in the magic, vendor-specific register at offset
282 * 0x19.
283 *
284 * - If this is a RealTek MAC with integrated PHY, we
285 * can test the 'SPEED10' bit of the MAC's media status
286 * register.
287 */
288 if (rsc->sc_rtl8201l) {
289 if (PHY_READ(sc, 0x0019) & 0x01)
290 mii->mii_media_active |= IFM_100_TX;
291 else
292 mii->mii_media_active |= IFM_10_T;
293 } else {
294 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10)
295 mii->mii_media_active |= IFM_10_T;
296 else
297 mii->mii_media_active |= IFM_100_TX;
298 }
299 mii->mii_media_active |= IFM_HDX;
300 } else
301 mii->mii_media_active = ife->ifm_media;
302 }
303
304 static void
305 rlphy_reset(struct mii_softc *sc)
306 {
307
308 mii_phy_reset(sc);
309
310 /*
311 * XXX RealTek PHY doesn't set the BMCR properly after
312 * XXX reset, which breaks autonegotiation.
313 */
314 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
315 }
316