rlphy.c revision 1.9
1 /* $NetBSD: rlphy.c,v 1.9 2006/03/29 07:05:24 thorpej Exp $ */ 2 /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 Jason L. Wright (jason (at) thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for the internal PHY found on RTL8139 based nics, based 32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy' 33 * (National Semiconductor DP83840). 34 */ 35 36 /* 37 * Ported to NetBSD by Juan Romero Pardines <xtraeme (at) NetBSD.org> 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.9 2006/03/29 07:05:24 thorpej Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/socket.h> 48 #include <sys/errno.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <dev/mii/mii.h> 54 #include <dev/mii/miivar.h> 55 #include <dev/mii/miidevs.h> 56 #include <machine/bus.h> 57 #include <dev/ic/rtl81x9reg.h> 58 59 int rlphymatch(struct device *, struct cfdata *, void *); 60 void rlphyattach(struct device *, struct device *, void *); 61 62 CFATTACH_DECL(rlphy, sizeof(struct mii_softc), 63 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate); 64 65 int rlphy_service(struct mii_softc *, struct mii_data *, int); 66 void rlphy_status(struct mii_softc *); 67 68 const struct mii_phy_funcs rlphy_funcs = { 69 rlphy_service, rlphy_status, mii_phy_reset, 70 }; 71 72 static const struct mii_phydesc rlphys[] = { 73 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L, 74 MII_STR_yyREALTEK_RTL8201L }, 75 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, 76 MII_STR_ICPLUS_IP101 }, 77 78 { 0, 0, 79 NULL }, 80 }; 81 82 int 83 rlphymatch(struct device *parent, struct cfdata *match, void *aux) 84 { 85 struct mii_attach_args *ma = aux; 86 87 if (mii_phy_match(ma, rlphys) != NULL) 88 return (10); 89 90 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 || 91 MII_MODEL(ma->mii_id2) != 0) 92 return 0; 93 94 if (!device_is_a(parent, "rtk")) 95 return 0; 96 97 /* 98 * A "real" phy should get preference, but on the 8139 there 99 * is no phyid register. 100 */ 101 return 5; 102 } 103 104 void 105 rlphyattach(struct device *parent, struct device *self, void *aux) 106 { 107 struct mii_softc *sc = device_private(self); 108 struct mii_attach_args *ma = aux; 109 struct mii_data *mii = ma->mii_data; 110 111 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) { 112 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L, 113 MII_REV(ma->mii_id2)); 114 } else 115 aprint_normal(": Realtek internal PHY\n"); 116 117 sc->mii_inst = mii->mii_instance; 118 sc->mii_phy = ma->mii_phyno; 119 sc->mii_funcs = &rlphy_funcs; 120 sc->mii_pdata = mii; 121 sc->mii_flags = ma->mii_flags; 122 123 sc->mii_flags |= MIIF_NOISOLATE; 124 125 PHY_RESET(sc); 126 127 aprint_normal("%s: ", sc->mii_dev.dv_xname); 128 sc->mii_capabilities = 129 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 130 if (sc->mii_capabilities & BMSR_MEDIAMASK) 131 mii_phy_add_media(sc); 132 aprint_normal("\n"); 133 } 134 135 int 136 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 137 { 138 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 139 140 int rv; 141 142 if (!device_is_active(&sc->mii_dev)) 143 return ENXIO; 144 145 /* 146 * Can't isolate the RTL8139 phy, so it has to be the only one. 147 */ 148 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 149 panic("rlphy_service: attempt to isolate phy"); 150 151 switch (cmd) { 152 case MII_POLLSTAT: 153 break; 154 155 case MII_MEDIACHG: 156 /* 157 * If the interface is not up, don't do anything. 158 */ 159 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 160 break; 161 162 switch (IFM_SUBTYPE(ife->ifm_media)) { 163 case IFM_AUTO: 164 /* 165 * If we're already in auto mode, just return. 166 */ 167 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) 168 return (0); 169 (void) mii_phy_auto(sc, 0); 170 break; 171 case IFM_100_T4: 172 /* 173 * XXX Not supported as a manual setting right now. 174 */ 175 return (EINVAL); 176 default: 177 /* 178 * BMCR data is stored in the ifmedia entry. 179 */ 180 switch (ife->ifm_media & 181 (IFM_TMASK|IFM_NMASK|IFM_FDX)) { 182 case IFM_ETHER|IFM_10_T: 183 rv = ANAR_10|ANAR_CSMA; 184 break; 185 case IFM_ETHER|IFM_10_T|IFM_FDX: 186 rv = ANAR_10_FD|ANAR_CSMA; 187 break; 188 case IFM_ETHER|IFM_100_TX: 189 rv = ANAR_TX|ANAR_CSMA; 190 break; 191 case IFM_ETHER|IFM_100_TX|IFM_FDX: 192 rv = ANAR_TX_FD|ANAR_CSMA; 193 break; 194 case IFM_ETHER|IFM_100_T4: 195 rv = ANAR_T4|ANAR_CSMA; 196 break; 197 default: 198 rv = 0; 199 break; 200 } 201 202 PHY_WRITE(sc, MII_ANAR, rv); 203 PHY_WRITE(sc, MII_BMCR, ife->ifm_data); 204 } 205 break; 206 207 case MII_TICK: 208 /* 209 * Is the interface even up? 210 */ 211 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 212 return (0); 213 214 /* 215 * Only used for autonegotiation. 216 */ 217 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 218 break; 219 220 /* 221 * The RealTek PHY's autonegotiation doesn't need to be 222 * kicked; it continues in the background. 223 */ 224 break; 225 226 case MII_DOWN: 227 mii_phy_down(sc); 228 return (0); 229 } 230 231 /* Update the media status. */ 232 mii_phy_status(sc); 233 234 /* Callback if something changed. */ 235 mii_phy_update(sc, cmd); 236 return (0); 237 } 238 239 void 240 rlphy_status(struct mii_softc *sc) 241 { 242 struct mii_data *mii = sc->mii_pdata; 243 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 244 int bmsr, bmcr, anlpar; 245 246 mii->mii_media_status = IFM_AVALID; 247 mii->mii_media_active = IFM_ETHER; 248 249 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 250 if (bmsr & BMSR_LINK) 251 mii->mii_media_status |= IFM_ACTIVE; 252 253 bmcr = PHY_READ(sc, MII_BMCR); 254 if (bmcr & BMCR_ISO) { 255 mii->mii_media_active |= IFM_NONE; 256 mii->mii_media_status = 0; 257 return; 258 } 259 260 if (bmcr & BMCR_LOOP) 261 mii->mii_media_active |= IFM_LOOP; 262 263 if (bmcr & BMCR_AUTOEN) { 264 /* 265 * NWay autonegotiation takes the highest-order common 266 * bit of the ANAR and ANLPAR (i.e. best media advertised 267 * both by us and our link partner). 268 */ 269 if ((bmsr & BMSR_ACOMP) == 0) { 270 /* Erg, still trying, I guess... */ 271 mii->mii_media_active |= IFM_NONE; 272 return; 273 } 274 275 if ((anlpar = PHY_READ(sc, MII_ANAR) & 276 PHY_READ(sc, MII_ANLPAR))) { 277 if (anlpar & ANLPAR_T4) 278 mii->mii_media_active |= IFM_100_T4; 279 else if (anlpar & ANLPAR_TX_FD) 280 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 281 else if (anlpar & ANLPAR_TX) 282 mii->mii_media_active |= IFM_100_TX; 283 else if (anlpar & ANLPAR_10_FD) 284 mii->mii_media_active |= IFM_10_T|IFM_FDX; 285 else if (anlpar & ANLPAR_10) 286 mii->mii_media_active |= IFM_10_T; 287 else 288 mii->mii_media_active |= IFM_NONE; 289 return; 290 } 291 292 /* 293 * If the other side doesn't support NWAY, then the 294 * best we can do is determine if we have a 10Mbps or 295 * 100Mbps link. There's no way to know if the link 296 * is full or half duplex, so we default to half duplex 297 * and hope that the user is clever enough to manually 298 * change the media settings if we're wrong. 299 */ 300 301 /* 302 * The RealTek PHY supports non-NWAY link speed 303 * detection, however it does not report the link 304 * detection results via the ANLPAR or BMSR registers. 305 * (What? RealTek doesn't do things the way everyone 306 * else does? I'm just shocked, shocked I tell you.) 307 * To determine the link speed, we have to do one 308 * of two things: 309 * 310 * - If this is a standalone RealTek RTL8201(L) PHY, 311 * we can determine the link speed by testing bit 0 312 * in the magic, vendor-specific register at offset 313 * 0x19. 314 * 315 * - If this is a RealTek MAC with integrated PHY, we 316 * can test the 'SPEED10' bit of the MAC's media status 317 * register. 318 */ 319 if (device_is_a(device_parent(&sc->mii_dev), "rtk")) { 320 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10) 321 mii->mii_media_active |= IFM_10_T; 322 else 323 mii->mii_media_active |= IFM_100_TX; 324 } else { 325 if (PHY_READ(sc, 0x0019) & 0x01) 326 mii->mii_media_active |= IFM_100_TX; 327 else 328 mii->mii_media_active |= IFM_10_T; 329 } 330 331 } else 332 mii->mii_media_active = ife->ifm_media; 333 } 334
Indexes created Wed Oct 22 13:09:56 GMT 2025