clock_pcctwo.c revision 1.1
1 /* $NetBSD: clock_pcctwo.c,v 1.1 2002/02/12 20:38:40 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Glue for the Peripheral Channel Controller Two (PCCChip2) timers, 41 * the Memory Controller ASIC (MCchip, and the Mostek clock chip found 42 * on the MVME-1[67]7, MVME-1[67]2 and MVME-187 series of boards. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/kernel.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 50 #include <machine/psl.h> 51 #include <machine/bus.h> 52 53 #include <dev/mvme/clockvar.h> 54 #include <dev/mvme/pcctwovar.h> 55 #include <dev/mvme/pcctworeg.h> 56 57 58 int clock_pcctwo_match __P((struct device *, struct cfdata *, void *)); 59 void clock_pcctwo_attach __P((struct device *, struct device *, void *)); 60 61 struct clock_pcctwo_softc { 62 struct device sc_dev; 63 struct clock_attach_args sc_clock_args; 64 u_char sc_clock_lvl; 65 }; 66 67 struct cfattach clock_pcctwo_ca = { 68 sizeof(struct device), clock_pcctwo_match, clock_pcctwo_attach 69 }; 70 71 extern struct cfdriver clock_cd; 72 73 static int clock_pcctwo_profintr __P((void *)); 74 static int clock_pcctwo_statintr __P((void *)); 75 static void clock_pcctwo_initclocks __P((void *, int, int)); 76 static long clock_pcctwo_microtime __P((void *)); 77 static void clock_pcctwo_shutdown __P((void *)); 78 79 static struct clock_pcctwo_softc *clock_pcctwo_sc; 80 81 /* ARGSUSED */ 82 int 83 clock_pcctwo_match(parent, cf, aux) 84 struct device *parent; 85 struct cfdata *cf; 86 void *aux; 87 { 88 struct pcctwo_attach_args *pa = aux; 89 90 /* Only one clock, please. */ 91 if (clock_pcctwo_sc) 92 return (0); 93 94 if (strcmp(pa->pa_name, clock_cd.cd_name)) 95 return (0); 96 97 pa->pa_ipl = cf->pcctwocf_ipl; 98 99 return (1); 100 } 101 102 /* ARGSUSED */ 103 void 104 clock_pcctwo_attach(parent, self, aux) 105 struct device *parent; 106 struct device *self; 107 void *aux; 108 { 109 struct clock_pcctwo_softc *sc; 110 struct pcctwo_attach_args *pa; 111 112 sc = clock_pcctwo_sc = (struct clock_pcctwo_softc *) self; 113 pa = aux; 114 115 if (pa->pa_ipl != CLOCK_LEVEL) 116 panic("clock_pcctwo_attach: wrong interrupt level"); 117 118 sc->sc_clock_args.ca_arg = sc; 119 sc->sc_clock_args.ca_initfunc = clock_pcctwo_initclocks; 120 sc->sc_clock_args.ca_microtime = clock_pcctwo_microtime; 121 122 /* Do common portions of clock config. */ 123 clock_config(self, &sc->sc_clock_args, pcctwointr_evcnt(pa->pa_ipl)); 124 125 /* Ensure our interrupts get disabled at shutdown time. */ 126 (void) shutdownhook_establish(clock_pcctwo_shutdown, NULL); 127 128 sc->sc_clock_lvl = (pa->pa_ipl & PCCTWO_ICR_LEVEL_MASK) | 129 PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN; 130 131 /* Attach the interrupt handlers. */ 132 pcctwointr_establish(PCCTWOV_TIMER1, clock_pcctwo_profintr, 133 pa->pa_ipl, NULL, &clock_profcnt); 134 pcctwointr_establish(PCCTWOV_TIMER2, clock_pcctwo_statintr, 135 pa->pa_ipl, NULL, &clock_statcnt); 136 } 137 138 void 139 clock_pcctwo_initclocks(arg, proftick, stattick) 140 void *arg; 141 int proftick; 142 int stattick; 143 { 144 struct clock_pcctwo_softc *sc; 145 146 sc = arg; 147 148 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF); 149 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COUNTER, 0); 150 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COMPARE, 151 PCCTWO_US2LIM(proftick)); 152 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, 153 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 154 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, sc->sc_clock_lvl); 155 156 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 157 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0); 158 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE, 159 PCCTWO_US2LIM(stattick)); 160 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, 161 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 162 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, sc->sc_clock_lvl); 163 } 164 165 /* ARGSUSED */ 166 long 167 clock_pcctwo_microtime(arg) 168 void *arg; 169 { 170 static int ovfl_adj[] = { 171 0, 10000, 20000, 30000, 172 40000, 50000, 60000, 70000, 173 80000, 90000, 100000, 110000, 174 120000, 130000, 140000, 150000}; 175 u_int8_t cr; 176 u_int32_t tc, tc2; 177 178 /* 179 * There's no way to latch the counter and overflow registers 180 * without pausing the clock, so compensate for the possible 181 * race by checking for counter wrap-around and re-reading the 182 * overflow counter if necessary. 183 * 184 * Note: This only works because we're called at splhigh(). 185 */ 186 tc = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER); 187 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 188 if (tc > (tc2 = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER))) { 189 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 190 tc = tc2; 191 } 192 193 return ((long) PCCTWO_LIM2US(tc) + ovfl_adj[PCCTWO_TT_CTRL_OVF(cr)]); 194 } 195 196 int 197 clock_pcctwo_profintr(frame) 198 void *frame; 199 { 200 u_int8_t cr; 201 u_int32_t tc; 202 int s; 203 204 s = splhigh(); 205 tc = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER); 206 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 207 if (tc > pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER)) 208 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 209 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, 210 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 211 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, 212 clock_pcctwo_sc->sc_clock_lvl); 213 splx(s); 214 215 for (cr = PCCTWO_TT_CTRL_OVF(cr); cr; cr--) 216 hardclock(frame); 217 218 return (1); 219 } 220 221 int 222 clock_pcctwo_statintr(frame) 223 void *frame; 224 { 225 226 /* Disable the timer interrupt while we handle it. */ 227 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0); 228 229 statclock((struct clockframe *) frame); 230 231 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 232 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0); 233 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE, 234 PCCTWO_US2LIM(CLOCK_NEWINT(clock_statvar, clock_statmin))); 235 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, 236 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 237 238 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 239 clock_pcctwo_sc->sc_clock_lvl); 240 241 return (1); 242 } 243 244 /* ARGSUSED */ 245 void 246 clock_pcctwo_shutdown(arg) 247 void *arg; 248 { 249 250 /* Make sure the timer interrupts are turned off. */ 251 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF); 252 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, 0); 253 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 254 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0); 255 } 256
Indexes created Thu Sep 25 16:09:42 GMT 2025