if_ie_mvme.c revision 1.14 1 1.14 dsl /* $NetBSD: if_ie_mvme.c,v 1.14 2009/03/14 15:36:19 dsl Exp $ */
2 1.1 scw
3 1.1 scw /*-
4 1.1 scw * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.1 scw * by Steve C. Woodford.
9 1.1 scw *
10 1.1 scw * Redistribution and use in source and binary forms, with or without
11 1.1 scw * modification, are permitted provided that the following conditions
12 1.1 scw * are met:
13 1.1 scw * 1. Redistributions of source code must retain the above copyright
14 1.1 scw * notice, this list of conditions and the following disclaimer.
15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 scw * notice, this list of conditions and the following disclaimer in the
17 1.1 scw * documentation and/or other materials provided with the distribution.
18 1.1 scw *
19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
30 1.1 scw */
31 1.6 lukem
32 1.6 lukem #include <sys/cdefs.h>
33 1.14 dsl __KERNEL_RCSID(0, "$NetBSD: if_ie_mvme.c,v 1.14 2009/03/14 15:36:19 dsl Exp $");
34 1.1 scw
35 1.1 scw #include <sys/param.h>
36 1.1 scw #include <sys/systm.h>
37 1.1 scw #include <sys/mbuf.h>
38 1.1 scw #include <sys/errno.h>
39 1.1 scw #include <sys/device.h>
40 1.1 scw #include <sys/protosw.h>
41 1.1 scw #include <sys/socket.h>
42 1.1 scw
43 1.1 scw #include <net/if.h>
44 1.1 scw #include <net/if_dl.h>
45 1.1 scw #include <net/if_types.h>
46 1.1 scw #include <net/if_ether.h>
47 1.1 scw #include <net/if_media.h>
48 1.1 scw
49 1.1 scw #include <uvm/uvm_extern.h>
50 1.1 scw
51 1.1 scw #include <machine/autoconf.h>
52 1.11 ad #include <sys/cpu.h>
53 1.11 ad #include <sys/bus.h>
54 1.1 scw
55 1.1 scw #include <dev/ic/i82586reg.h>
56 1.1 scw #include <dev/ic/i82586var.h>
57 1.1 scw
58 1.1 scw #include <dev/mvme/if_iereg.h>
59 1.1 scw #include <dev/mvme/pcctwovar.h>
60 1.1 scw #include <dev/mvme/pcctworeg.h>
61 1.1 scw
62 1.1 scw
63 1.7 perry int ie_pcctwo_match(struct device *, struct cfdata *, void *);
64 1.7 perry void ie_pcctwo_attach(struct device *, struct device *, void *);
65 1.1 scw
66 1.1 scw struct ie_pcctwo_softc {
67 1.1 scw struct ie_softc ps_ie;
68 1.1 scw bus_space_tag_t ps_bust;
69 1.1 scw bus_space_handle_t ps_bush;
70 1.1 scw struct evcnt ps_evcnt;
71 1.1 scw };
72 1.1 scw
73 1.3 thorpej CFATTACH_DECL(ie_pcctwo, sizeof(struct ie_pcctwo_softc),
74 1.4 thorpej ie_pcctwo_match, ie_pcctwo_attach, NULL, NULL);
75 1.1 scw
76 1.1 scw extern struct cfdriver ie_cd;
77 1.1 scw
78 1.1 scw
79 1.1 scw /* Functions required by the i82586 MI driver */
80 1.7 perry static void ie_reset(struct ie_softc *, int);
81 1.7 perry static int ie_intrhook(struct ie_softc *, int);
82 1.7 perry static void ie_hwinit(struct ie_softc *);
83 1.7 perry static void ie_atten(struct ie_softc *, int);
84 1.7 perry
85 1.7 perry static void ie_copyin(struct ie_softc *, void *, int, size_t);
86 1.7 perry static void ie_copyout(struct ie_softc *, const void *, int, size_t);
87 1.7 perry
88 1.7 perry static u_int16_t ie_read_16(struct ie_softc *, int);
89 1.7 perry static void ie_write_16(struct ie_softc *, int, u_int16_t);
90 1.7 perry static void ie_write_24(struct ie_softc *, int, int);
91 1.1 scw
92 1.1 scw /*
93 1.1 scw * i82596 Support Routines for MVME1[67][27] and MVME187 Boards
94 1.1 scw */
95 1.1 scw static void
96 1.14 dsl ie_reset(struct ie_softc *sc, int why)
97 1.1 scw {
98 1.1 scw struct ie_pcctwo_softc *ps;
99 1.1 scw u_int32_t scp_addr;
100 1.1 scw
101 1.1 scw ps = (struct ie_pcctwo_softc *) sc;
102 1.1 scw
103 1.1 scw switch (why) {
104 1.1 scw case CHIP_PROBE:
105 1.1 scw case CARD_RESET:
106 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
107 1.1 scw IE_PORT_RESET);
108 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0);
109 1.1 scw delay(1000);
110 1.1 scw
111 1.1 scw /*
112 1.1 scw * Set the BUSY and BUS_USE bytes here, since the MI code
113 1.1 scw * incorrectly assumes it can use byte addressing to set it.
114 1.1 scw * (due to wrong-endianess of the chip)
115 1.1 scw */
116 1.1 scw ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1);
117 1.1 scw ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
118 1.1 scw
119 1.1 scw scp_addr = sc->scp + (u_int) sc->sc_iobase;
120 1.1 scw scp_addr |= IE_PORT_ALT_SCP;
121 1.1 scw
122 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
123 1.1 scw scp_addr & 0xffff);
124 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER,
125 1.1 scw (scp_addr >> 16) & 0xffff);
126 1.1 scw delay(1000);
127 1.1 scw break;
128 1.1 scw }
129 1.1 scw }
130 1.1 scw
131 1.1 scw /* ARGSUSED */
132 1.1 scw static int
133 1.14 dsl ie_intrhook(struct ie_softc *sc, int when)
134 1.1 scw {
135 1.1 scw struct ie_pcctwo_softc *ps;
136 1.1 scw u_int8_t reg;
137 1.1 scw
138 1.1 scw ps = (struct ie_pcctwo_softc *) sc;
139 1.1 scw
140 1.1 scw if (when == INTR_EXIT) {
141 1.1 scw reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
142 1.1 scw reg |= PCCTWO_ICR_ICLR;
143 1.1 scw pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
144 1.1 scw }
145 1.1 scw return (0);
146 1.1 scw }
147 1.1 scw
148 1.1 scw /* ARGSUSED */
149 1.1 scw static void
150 1.14 dsl ie_hwinit(struct ie_softc *sc)
151 1.1 scw {
152 1.1 scw u_int8_t reg;
153 1.1 scw
154 1.1 scw reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
155 1.1 scw reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR;
156 1.1 scw pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
157 1.1 scw }
158 1.1 scw
159 1.1 scw /* ARGSUSED */
160 1.1 scw static void
161 1.14 dsl ie_atten(struct ie_softc *sc, int reason)
162 1.1 scw {
163 1.1 scw struct ie_pcctwo_softc *ps;
164 1.1 scw
165 1.1 scw ps = (struct ie_pcctwo_softc *) sc;
166 1.1 scw bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0);
167 1.1 scw }
168 1.1 scw
169 1.1 scw static void
170 1.14 dsl ie_copyin(struct ie_softc *sc, void *dst, int offset, size_t size)
171 1.1 scw {
172 1.1 scw if (size == 0) /* This *can* happen! */
173 1.1 scw return;
174 1.1 scw
175 1.1 scw #if 0
176 1.1 scw bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size);
177 1.1 scw #else
178 1.1 scw /* A minor optimisation ;-) */
179 1.1 scw memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size);
180 1.1 scw #endif
181 1.1 scw }
182 1.1 scw
183 1.1 scw static void
184 1.14 dsl ie_copyout(struct ie_softc *sc, const void *src, int offset, size_t size)
185 1.1 scw {
186 1.1 scw if (size == 0) /* This *can* happen! */
187 1.1 scw return;
188 1.1 scw
189 1.1 scw #if 0
190 1.1 scw bus_space_write_region_1(sc->bt, sc->bh, offset, src, size);
191 1.1 scw #else
192 1.1 scw /* A minor optimisation ;-) */
193 1.1 scw memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size);
194 1.1 scw #endif
195 1.1 scw }
196 1.1 scw
197 1.1 scw static u_int16_t
198 1.14 dsl ie_read_16(struct ie_softc *sc, int offset)
199 1.1 scw {
200 1.1 scw
201 1.1 scw return (bus_space_read_2(sc->bt, sc->bh, offset));
202 1.1 scw }
203 1.1 scw
204 1.1 scw static void
205 1.14 dsl ie_write_16(struct ie_softc *sc, int offset, u_int16_t value)
206 1.1 scw {
207 1.1 scw
208 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset, value);
209 1.1 scw }
210 1.1 scw
211 1.1 scw static void
212 1.14 dsl ie_write_24(struct ie_softc *sc, int offset, int addr)
213 1.1 scw {
214 1.1 scw
215 1.1 scw addr += (int) sc->sc_iobase;
216 1.1 scw
217 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff);
218 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff);
219 1.1 scw }
220 1.1 scw
221 1.1 scw /* ARGSUSED */
222 1.1 scw int
223 1.14 dsl ie_pcctwo_match(struct device *parent, struct cfdata *cf, void *args)
224 1.1 scw {
225 1.1 scw struct pcctwo_attach_args *pa;
226 1.1 scw
227 1.1 scw pa = args;
228 1.1 scw
229 1.1 scw if (strcmp(pa->pa_name, ie_cd.cd_name))
230 1.1 scw return (0);
231 1.1 scw
232 1.1 scw pa->pa_ipl = cf->pcctwocf_ipl;
233 1.1 scw
234 1.1 scw return (1);
235 1.1 scw }
236 1.1 scw
237 1.1 scw /* ARGSUSED */
238 1.1 scw void
239 1.14 dsl ie_pcctwo_attach(struct device *parent, struct device *self, void *args)
240 1.1 scw {
241 1.1 scw struct pcctwo_attach_args *pa;
242 1.1 scw struct ie_pcctwo_softc *ps;
243 1.1 scw struct ie_softc *sc;
244 1.1 scw bus_dma_segment_t seg;
245 1.1 scw int rseg;
246 1.1 scw
247 1.1 scw pa = (struct pcctwo_attach_args *) args;
248 1.9 thorpej ps = device_private(self);
249 1.9 thorpej sc = device_private(self);
250 1.1 scw
251 1.1 scw /* Map the MPU controller registers in PCCTWO space */
252 1.1 scw ps->ps_bust = pa->pa_bust;
253 1.1 scw bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE,
254 1.1 scw 0, &ps->ps_bush);
255 1.1 scw
256 1.1 scw /* Get contiguous DMA-able memory for the IE chip */
257 1.5 thorpej if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, PAGE_SIZE, 0,
258 1.1 scw &seg, 1, &rseg,
259 1.1 scw BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) {
260 1.12 cegger aprint_error_dev(self, "Failed to allocate ether buffer\n");
261 1.1 scw return;
262 1.1 scw }
263 1.1 scw if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size,
264 1.10 christos (void **) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) {
265 1.12 cegger aprint_error_dev(self, "Failed to map ether buffer\n");
266 1.1 scw bus_dmamem_free(pa->pa_dmat, &seg, rseg);
267 1.1 scw return;
268 1.1 scw }
269 1.1 scw sc->bt = pa->pa_bust;
270 1.1 scw sc->bh = (bus_space_handle_t) sc->sc_maddr; /* XXXSCW Better way? */
271 1.1 scw sc->sc_iobase = (void *) seg.ds_addr;
272 1.1 scw sc->sc_msize = ether_data_buff_size;
273 1.1 scw memset(sc->sc_maddr, 0, ether_data_buff_size);
274 1.1 scw
275 1.1 scw sc->hwreset = ie_reset;
276 1.1 scw sc->hwinit = ie_hwinit;
277 1.1 scw sc->chan_attn = ie_atten;
278 1.1 scw sc->intrhook = ie_intrhook;
279 1.1 scw sc->memcopyin = ie_copyin;
280 1.1 scw sc->memcopyout = ie_copyout;
281 1.1 scw sc->ie_bus_barrier = NULL;
282 1.1 scw sc->ie_bus_read16 = ie_read_16;
283 1.1 scw sc->ie_bus_write16 = ie_write_16;
284 1.1 scw sc->ie_bus_write24 = ie_write_24;
285 1.1 scw sc->sc_mediachange = NULL;
286 1.1 scw sc->sc_mediastatus = NULL;
287 1.1 scw
288 1.1 scw sc->scp = 0;
289 1.1 scw sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15);
290 1.1 scw sc->scb = sc->iscp + IE_ISCP_SZ;
291 1.1 scw sc->buf_area = sc->scb + IE_SCB_SZ;
292 1.1 scw sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp);
293 1.1 scw
294 1.1 scw /*
295 1.1 scw * BUS_USE -> Interrupt Active High (edge-triggered),
296 1.1 scw * Lock function enabled,
297 1.1 scw * Internal bus throttle timer triggering,
298 1.1 scw * 82586 operating mode.
299 1.1 scw */
300 1.1 scw ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
301 1.1 scw ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp);
302 1.1 scw ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
303 1.1 scw ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp);
304 1.1 scw
305 1.1 scw /* This has the side-effect of resetting the chip */
306 1.1 scw i82586_proberam(sc);
307 1.1 scw
308 1.1 scw /* Attach the MI back-end */
309 1.1 scw i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0);
310 1.1 scw
311 1.1 scw /* Register the event counter */
312 1.1 scw evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR,
313 1.12 cegger pcctwointr_evcnt(pa->pa_ipl), "ether", device_xname(&sc->sc_dev));
314 1.1 scw
315 1.1 scw /* Finally, hook the hardware interrupt */
316 1.1 scw pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc,
317 1.1 scw &ps->ps_evcnt);
318 1.1 scw }
319