if_ie_mvme.c revision 1.21 1 1.21 msaitoh /* $NetBSD: if_ie_mvme.c,v 1.21 2021/11/10 17:19:30 msaitoh Exp $ */
2 1.1 scw
3 1.1 scw /*-
4 1.1 scw * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation
8 1.1 scw * by Steve C. Woodford.
9 1.1 scw *
10 1.1 scw * Redistribution and use in source and binary forms, with or without
11 1.1 scw * modification, are permitted provided that the following conditions
12 1.1 scw * are met:
13 1.1 scw * 1. Redistributions of source code must retain the above copyright
14 1.1 scw * notice, this list of conditions and the following disclaimer.
15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 scw * notice, this list of conditions and the following disclaimer in the
17 1.1 scw * documentation and/or other materials provided with the distribution.
18 1.1 scw *
19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
30 1.1 scw */
31 1.6 lukem
32 1.6 lukem #include <sys/cdefs.h>
33 1.21 msaitoh __KERNEL_RCSID(0, "$NetBSD: if_ie_mvme.c,v 1.21 2021/11/10 17:19:30 msaitoh Exp $");
34 1.1 scw
35 1.1 scw #include <sys/param.h>
36 1.1 scw #include <sys/systm.h>
37 1.1 scw #include <sys/mbuf.h>
38 1.1 scw #include <sys/errno.h>
39 1.1 scw #include <sys/device.h>
40 1.1 scw #include <sys/protosw.h>
41 1.1 scw #include <sys/socket.h>
42 1.1 scw
43 1.1 scw #include <net/if.h>
44 1.1 scw #include <net/if_dl.h>
45 1.1 scw #include <net/if_types.h>
46 1.1 scw #include <net/if_ether.h>
47 1.1 scw #include <net/if_media.h>
48 1.1 scw
49 1.1 scw #include <machine/autoconf.h>
50 1.11 ad #include <sys/cpu.h>
51 1.11 ad #include <sys/bus.h>
52 1.1 scw
53 1.1 scw #include <dev/ic/i82586reg.h>
54 1.1 scw #include <dev/ic/i82586var.h>
55 1.1 scw
56 1.1 scw #include <dev/mvme/if_iereg.h>
57 1.1 scw #include <dev/mvme/pcctwovar.h>
58 1.1 scw #include <dev/mvme/pcctworeg.h>
59 1.1 scw
60 1.1 scw
61 1.16 cegger int ie_pcctwo_match(device_t, cfdata_t, void *);
62 1.16 cegger void ie_pcctwo_attach(device_t, device_t, void *);
63 1.1 scw
64 1.1 scw struct ie_pcctwo_softc {
65 1.1 scw struct ie_softc ps_ie;
66 1.1 scw bus_space_tag_t ps_bust;
67 1.1 scw bus_space_handle_t ps_bush;
68 1.1 scw struct evcnt ps_evcnt;
69 1.1 scw };
70 1.1 scw
71 1.19 tsutsui CFATTACH_DECL_NEW(ie_pcctwo, sizeof(struct ie_pcctwo_softc),
72 1.4 thorpej ie_pcctwo_match, ie_pcctwo_attach, NULL, NULL);
73 1.1 scw
74 1.1 scw extern struct cfdriver ie_cd;
75 1.1 scw
76 1.1 scw
77 1.1 scw /* Functions required by the i82586 MI driver */
78 1.7 perry static void ie_reset(struct ie_softc *, int);
79 1.7 perry static int ie_intrhook(struct ie_softc *, int);
80 1.7 perry static void ie_hwinit(struct ie_softc *);
81 1.7 perry static void ie_atten(struct ie_softc *, int);
82 1.7 perry
83 1.7 perry static void ie_copyin(struct ie_softc *, void *, int, size_t);
84 1.7 perry static void ie_copyout(struct ie_softc *, const void *, int, size_t);
85 1.7 perry
86 1.7 perry static u_int16_t ie_read_16(struct ie_softc *, int);
87 1.7 perry static void ie_write_16(struct ie_softc *, int, u_int16_t);
88 1.7 perry static void ie_write_24(struct ie_softc *, int, int);
89 1.1 scw
90 1.1 scw /*
91 1.1 scw * i82596 Support Routines for MVME1[67][27] and MVME187 Boards
92 1.1 scw */
93 1.1 scw static void
94 1.14 dsl ie_reset(struct ie_softc *sc, int why)
95 1.1 scw {
96 1.1 scw struct ie_pcctwo_softc *ps;
97 1.1 scw u_int32_t scp_addr;
98 1.1 scw
99 1.1 scw ps = (struct ie_pcctwo_softc *) sc;
100 1.1 scw
101 1.1 scw switch (why) {
102 1.1 scw case CHIP_PROBE:
103 1.1 scw case CARD_RESET:
104 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
105 1.1 scw IE_PORT_RESET);
106 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0);
107 1.1 scw delay(1000);
108 1.1 scw
109 1.1 scw /*
110 1.1 scw * Set the BUSY and BUS_USE bytes here, since the MI code
111 1.1 scw * incorrectly assumes it can use byte addressing to set it.
112 1.21 msaitoh * (due to wrong-endianness of the chip)
113 1.1 scw */
114 1.1 scw ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1);
115 1.1 scw ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
116 1.1 scw
117 1.1 scw scp_addr = sc->scp + (u_int) sc->sc_iobase;
118 1.1 scw scp_addr |= IE_PORT_ALT_SCP;
119 1.1 scw
120 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER,
121 1.1 scw scp_addr & 0xffff);
122 1.1 scw bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER,
123 1.1 scw (scp_addr >> 16) & 0xffff);
124 1.1 scw delay(1000);
125 1.1 scw break;
126 1.1 scw }
127 1.1 scw }
128 1.1 scw
129 1.1 scw /* ARGSUSED */
130 1.1 scw static int
131 1.14 dsl ie_intrhook(struct ie_softc *sc, int when)
132 1.1 scw {
133 1.1 scw u_int8_t reg;
134 1.1 scw
135 1.1 scw if (when == INTR_EXIT) {
136 1.1 scw reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
137 1.1 scw reg |= PCCTWO_ICR_ICLR;
138 1.1 scw pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
139 1.1 scw }
140 1.1 scw return (0);
141 1.1 scw }
142 1.1 scw
143 1.1 scw /* ARGSUSED */
144 1.1 scw static void
145 1.14 dsl ie_hwinit(struct ie_softc *sc)
146 1.1 scw {
147 1.1 scw u_int8_t reg;
148 1.1 scw
149 1.1 scw reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR);
150 1.1 scw reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR;
151 1.1 scw pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg);
152 1.1 scw }
153 1.1 scw
154 1.1 scw /* ARGSUSED */
155 1.1 scw static void
156 1.14 dsl ie_atten(struct ie_softc *sc, int reason)
157 1.1 scw {
158 1.1 scw struct ie_pcctwo_softc *ps;
159 1.1 scw
160 1.1 scw ps = (struct ie_pcctwo_softc *) sc;
161 1.1 scw bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0);
162 1.1 scw }
163 1.1 scw
164 1.1 scw static void
165 1.14 dsl ie_copyin(struct ie_softc *sc, void *dst, int offset, size_t size)
166 1.1 scw {
167 1.1 scw if (size == 0) /* This *can* happen! */
168 1.1 scw return;
169 1.1 scw
170 1.1 scw #if 0
171 1.1 scw bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size);
172 1.1 scw #else
173 1.1 scw /* A minor optimisation ;-) */
174 1.1 scw memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size);
175 1.1 scw #endif
176 1.1 scw }
177 1.1 scw
178 1.1 scw static void
179 1.14 dsl ie_copyout(struct ie_softc *sc, const void *src, int offset, size_t size)
180 1.1 scw {
181 1.1 scw if (size == 0) /* This *can* happen! */
182 1.1 scw return;
183 1.1 scw
184 1.1 scw #if 0
185 1.1 scw bus_space_write_region_1(sc->bt, sc->bh, offset, src, size);
186 1.1 scw #else
187 1.1 scw /* A minor optimisation ;-) */
188 1.1 scw memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size);
189 1.1 scw #endif
190 1.1 scw }
191 1.1 scw
192 1.1 scw static u_int16_t
193 1.14 dsl ie_read_16(struct ie_softc *sc, int offset)
194 1.1 scw {
195 1.1 scw
196 1.1 scw return (bus_space_read_2(sc->bt, sc->bh, offset));
197 1.1 scw }
198 1.1 scw
199 1.1 scw static void
200 1.14 dsl ie_write_16(struct ie_softc *sc, int offset, u_int16_t value)
201 1.1 scw {
202 1.1 scw
203 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset, value);
204 1.1 scw }
205 1.1 scw
206 1.1 scw static void
207 1.14 dsl ie_write_24(struct ie_softc *sc, int offset, int addr)
208 1.1 scw {
209 1.1 scw
210 1.1 scw addr += (int) sc->sc_iobase;
211 1.1 scw
212 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff);
213 1.1 scw bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff);
214 1.1 scw }
215 1.1 scw
216 1.1 scw /* ARGSUSED */
217 1.1 scw int
218 1.19 tsutsui ie_pcctwo_match(device_t parent, cfdata_t cf, void *aux)
219 1.1 scw {
220 1.1 scw struct pcctwo_attach_args *pa;
221 1.1 scw
222 1.19 tsutsui pa = aux;
223 1.1 scw
224 1.1 scw if (strcmp(pa->pa_name, ie_cd.cd_name))
225 1.1 scw return (0);
226 1.1 scw
227 1.1 scw pa->pa_ipl = cf->pcctwocf_ipl;
228 1.1 scw
229 1.1 scw return (1);
230 1.1 scw }
231 1.1 scw
232 1.1 scw /* ARGSUSED */
233 1.1 scw void
234 1.19 tsutsui ie_pcctwo_attach(device_t parent, device_t self, void *aux)
235 1.1 scw {
236 1.1 scw struct pcctwo_attach_args *pa;
237 1.1 scw struct ie_pcctwo_softc *ps;
238 1.1 scw struct ie_softc *sc;
239 1.1 scw bus_dma_segment_t seg;
240 1.1 scw int rseg;
241 1.1 scw
242 1.19 tsutsui pa = aux;
243 1.9 thorpej ps = device_private(self);
244 1.19 tsutsui sc = &ps->ps_ie;
245 1.19 tsutsui sc->sc_dev = self;
246 1.1 scw
247 1.1 scw /* Map the MPU controller registers in PCCTWO space */
248 1.1 scw ps->ps_bust = pa->pa_bust;
249 1.1 scw bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE,
250 1.1 scw 0, &ps->ps_bush);
251 1.1 scw
252 1.1 scw /* Get contiguous DMA-able memory for the IE chip */
253 1.5 thorpej if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, PAGE_SIZE, 0,
254 1.1 scw &seg, 1, &rseg,
255 1.1 scw BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) {
256 1.12 cegger aprint_error_dev(self, "Failed to allocate ether buffer\n");
257 1.1 scw return;
258 1.1 scw }
259 1.1 scw if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size,
260 1.10 christos (void **) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) {
261 1.12 cegger aprint_error_dev(self, "Failed to map ether buffer\n");
262 1.1 scw bus_dmamem_free(pa->pa_dmat, &seg, rseg);
263 1.1 scw return;
264 1.1 scw }
265 1.1 scw sc->bt = pa->pa_bust;
266 1.1 scw sc->bh = (bus_space_handle_t) sc->sc_maddr; /* XXXSCW Better way? */
267 1.1 scw sc->sc_iobase = (void *) seg.ds_addr;
268 1.1 scw sc->sc_msize = ether_data_buff_size;
269 1.1 scw memset(sc->sc_maddr, 0, ether_data_buff_size);
270 1.1 scw
271 1.1 scw sc->hwreset = ie_reset;
272 1.1 scw sc->hwinit = ie_hwinit;
273 1.1 scw sc->chan_attn = ie_atten;
274 1.1 scw sc->intrhook = ie_intrhook;
275 1.1 scw sc->memcopyin = ie_copyin;
276 1.1 scw sc->memcopyout = ie_copyout;
277 1.1 scw sc->ie_bus_barrier = NULL;
278 1.1 scw sc->ie_bus_read16 = ie_read_16;
279 1.1 scw sc->ie_bus_write16 = ie_write_16;
280 1.1 scw sc->ie_bus_write24 = ie_write_24;
281 1.1 scw sc->sc_mediachange = NULL;
282 1.1 scw sc->sc_mediastatus = NULL;
283 1.1 scw
284 1.1 scw sc->scp = 0;
285 1.1 scw sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15);
286 1.1 scw sc->scb = sc->iscp + IE_ISCP_SZ;
287 1.1 scw sc->buf_area = sc->scb + IE_SCB_SZ;
288 1.1 scw sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp);
289 1.1 scw
290 1.1 scw /*
291 1.1 scw * BUS_USE -> Interrupt Active High (edge-triggered),
292 1.1 scw * Lock function enabled,
293 1.1 scw * Internal bus throttle timer triggering,
294 1.1 scw * 82586 operating mode.
295 1.1 scw */
296 1.1 scw ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE);
297 1.1 scw ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp);
298 1.1 scw ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
299 1.1 scw ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp);
300 1.1 scw
301 1.1 scw /* This has the side-effect of resetting the chip */
302 1.1 scw i82586_proberam(sc);
303 1.1 scw
304 1.1 scw /* Attach the MI back-end */
305 1.1 scw i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0);
306 1.1 scw
307 1.1 scw /* Register the event counter */
308 1.1 scw evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR,
309 1.19 tsutsui pcctwointr_evcnt(pa->pa_ipl), "ether", device_xname(self));
310 1.1 scw
311 1.1 scw /* Finally, hook the hardware interrupt */
312 1.1 scw pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc,
313 1.1 scw &ps->ps_evcnt);
314 1.1 scw }
315