if_ie_mvme.c revision 1.17
1 /* $NetBSD: if_ie_mvme.c,v 1.17 2010/11/13 13:52:04 uebayasi Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: if_ie_mvme.c,v 1.17 2010/11/13 13:52:04 uebayasi Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/mbuf.h> 38 #include <sys/errno.h> 39 #include <sys/device.h> 40 #include <sys/protosw.h> 41 #include <sys/socket.h> 42 43 #include <net/if.h> 44 #include <net/if_dl.h> 45 #include <net/if_types.h> 46 #include <net/if_ether.h> 47 #include <net/if_media.h> 48 49 #include <machine/autoconf.h> 50 #include <sys/cpu.h> 51 #include <sys/bus.h> 52 53 #include <dev/ic/i82586reg.h> 54 #include <dev/ic/i82586var.h> 55 56 #include <dev/mvme/if_iereg.h> 57 #include <dev/mvme/pcctwovar.h> 58 #include <dev/mvme/pcctworeg.h> 59 60 61 int ie_pcctwo_match(device_t, cfdata_t, void *); 62 void ie_pcctwo_attach(device_t, device_t, void *); 63 64 struct ie_pcctwo_softc { 65 struct ie_softc ps_ie; 66 bus_space_tag_t ps_bust; 67 bus_space_handle_t ps_bush; 68 struct evcnt ps_evcnt; 69 }; 70 71 CFATTACH_DECL(ie_pcctwo, sizeof(struct ie_pcctwo_softc), 72 ie_pcctwo_match, ie_pcctwo_attach, NULL, NULL); 73 74 extern struct cfdriver ie_cd; 75 76 77 /* Functions required by the i82586 MI driver */ 78 static void ie_reset(struct ie_softc *, int); 79 static int ie_intrhook(struct ie_softc *, int); 80 static void ie_hwinit(struct ie_softc *); 81 static void ie_atten(struct ie_softc *, int); 82 83 static void ie_copyin(struct ie_softc *, void *, int, size_t); 84 static void ie_copyout(struct ie_softc *, const void *, int, size_t); 85 86 static u_int16_t ie_read_16(struct ie_softc *, int); 87 static void ie_write_16(struct ie_softc *, int, u_int16_t); 88 static void ie_write_24(struct ie_softc *, int, int); 89 90 /* 91 * i82596 Support Routines for MVME1[67][27] and MVME187 Boards 92 */ 93 static void 94 ie_reset(struct ie_softc *sc, int why) 95 { 96 struct ie_pcctwo_softc *ps; 97 u_int32_t scp_addr; 98 99 ps = (struct ie_pcctwo_softc *) sc; 100 101 switch (why) { 102 case CHIP_PROBE: 103 case CARD_RESET: 104 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 105 IE_PORT_RESET); 106 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0); 107 delay(1000); 108 109 /* 110 * Set the BUSY and BUS_USE bytes here, since the MI code 111 * incorrectly assumes it can use byte addressing to set it. 112 * (due to wrong-endianess of the chip) 113 */ 114 ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1); 115 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 116 117 scp_addr = sc->scp + (u_int) sc->sc_iobase; 118 scp_addr |= IE_PORT_ALT_SCP; 119 120 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 121 scp_addr & 0xffff); 122 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 123 (scp_addr >> 16) & 0xffff); 124 delay(1000); 125 break; 126 } 127 } 128 129 /* ARGSUSED */ 130 static int 131 ie_intrhook(struct ie_softc *sc, int when) 132 { 133 struct ie_pcctwo_softc *ps; 134 u_int8_t reg; 135 136 ps = (struct ie_pcctwo_softc *) sc; 137 138 if (when == INTR_EXIT) { 139 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 140 reg |= PCCTWO_ICR_ICLR; 141 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 142 } 143 return (0); 144 } 145 146 /* ARGSUSED */ 147 static void 148 ie_hwinit(struct ie_softc *sc) 149 { 150 u_int8_t reg; 151 152 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 153 reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR; 154 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 155 } 156 157 /* ARGSUSED */ 158 static void 159 ie_atten(struct ie_softc *sc, int reason) 160 { 161 struct ie_pcctwo_softc *ps; 162 163 ps = (struct ie_pcctwo_softc *) sc; 164 bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0); 165 } 166 167 static void 168 ie_copyin(struct ie_softc *sc, void *dst, int offset, size_t size) 169 { 170 if (size == 0) /* This *can* happen! */ 171 return; 172 173 #if 0 174 bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size); 175 #else 176 /* A minor optimisation ;-) */ 177 memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size); 178 #endif 179 } 180 181 static void 182 ie_copyout(struct ie_softc *sc, const void *src, int offset, size_t size) 183 { 184 if (size == 0) /* This *can* happen! */ 185 return; 186 187 #if 0 188 bus_space_write_region_1(sc->bt, sc->bh, offset, src, size); 189 #else 190 /* A minor optimisation ;-) */ 191 memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size); 192 #endif 193 } 194 195 static u_int16_t 196 ie_read_16(struct ie_softc *sc, int offset) 197 { 198 199 return (bus_space_read_2(sc->bt, sc->bh, offset)); 200 } 201 202 static void 203 ie_write_16(struct ie_softc *sc, int offset, u_int16_t value) 204 { 205 206 bus_space_write_2(sc->bt, sc->bh, offset, value); 207 } 208 209 static void 210 ie_write_24(struct ie_softc *sc, int offset, int addr) 211 { 212 213 addr += (int) sc->sc_iobase; 214 215 bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff); 216 bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff); 217 } 218 219 /* ARGSUSED */ 220 int 221 ie_pcctwo_match(device_t parent, cfdata_t cf, void *args) 222 { 223 struct pcctwo_attach_args *pa; 224 225 pa = args; 226 227 if (strcmp(pa->pa_name, ie_cd.cd_name)) 228 return (0); 229 230 pa->pa_ipl = cf->pcctwocf_ipl; 231 232 return (1); 233 } 234 235 /* ARGSUSED */ 236 void 237 ie_pcctwo_attach(device_t parent, device_t self, void *args) 238 { 239 struct pcctwo_attach_args *pa; 240 struct ie_pcctwo_softc *ps; 241 struct ie_softc *sc; 242 bus_dma_segment_t seg; 243 int rseg; 244 245 pa = (struct pcctwo_attach_args *) args; 246 ps = device_private(self); 247 sc = device_private(self); 248 249 /* Map the MPU controller registers in PCCTWO space */ 250 ps->ps_bust = pa->pa_bust; 251 bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE, 252 0, &ps->ps_bush); 253 254 /* Get contiguous DMA-able memory for the IE chip */ 255 if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, PAGE_SIZE, 0, 256 &seg, 1, &rseg, 257 BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) { 258 aprint_error_dev(self, "Failed to allocate ether buffer\n"); 259 return; 260 } 261 if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size, 262 (void **) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) { 263 aprint_error_dev(self, "Failed to map ether buffer\n"); 264 bus_dmamem_free(pa->pa_dmat, &seg, rseg); 265 return; 266 } 267 sc->bt = pa->pa_bust; 268 sc->bh = (bus_space_handle_t) sc->sc_maddr; /* XXXSCW Better way? */ 269 sc->sc_iobase = (void *) seg.ds_addr; 270 sc->sc_msize = ether_data_buff_size; 271 memset(sc->sc_maddr, 0, ether_data_buff_size); 272 273 sc->hwreset = ie_reset; 274 sc->hwinit = ie_hwinit; 275 sc->chan_attn = ie_atten; 276 sc->intrhook = ie_intrhook; 277 sc->memcopyin = ie_copyin; 278 sc->memcopyout = ie_copyout; 279 sc->ie_bus_barrier = NULL; 280 sc->ie_bus_read16 = ie_read_16; 281 sc->ie_bus_write16 = ie_write_16; 282 sc->ie_bus_write24 = ie_write_24; 283 sc->sc_mediachange = NULL; 284 sc->sc_mediastatus = NULL; 285 286 sc->scp = 0; 287 sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15); 288 sc->scb = sc->iscp + IE_ISCP_SZ; 289 sc->buf_area = sc->scb + IE_SCB_SZ; 290 sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp); 291 292 /* 293 * BUS_USE -> Interrupt Active High (edge-triggered), 294 * Lock function enabled, 295 * Internal bus throttle timer triggering, 296 * 82586 operating mode. 297 */ 298 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 299 ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 300 ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 301 ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp); 302 303 /* This has the side-effect of resetting the chip */ 304 i82586_proberam(sc); 305 306 /* Attach the MI back-end */ 307 i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0); 308 309 /* Register the event counter */ 310 evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR, 311 pcctwointr_evcnt(pa->pa_ipl), "ether", device_xname(&sc->sc_dev)); 312 313 /* Finally, hook the hardware interrupt */ 314 pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc, 315 &ps->ps_evcnt); 316 } 317
Indexes created Mon Oct 27 17:09:47 GMT 2025