1 1.4 msaitoh /* $NetBSD: memcvar.h,v 1.4 2019/08/21 04:17:41 msaitoh Exp $ */ 2 1.1 scw 3 1.1 scw /*- 4 1.1 scw * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 1.1 scw * All rights reserved. 6 1.1 scw * 7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation 8 1.1 scw * by Steve C. Woodford. 9 1.1 scw * 10 1.1 scw * Redistribution and use in source and binary forms, with or without 11 1.1 scw * modification, are permitted provided that the following conditions 12 1.1 scw * are met: 13 1.1 scw * 1. Redistributions of source code must retain the above copyright 14 1.1 scw * notice, this list of conditions and the following disclaimer. 15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 scw * notice, this list of conditions and the following disclaimer in the 17 1.1 scw * documentation and/or other materials provided with the distribution. 18 1.1 scw * 19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 scw * POSSIBILITY OF SUCH DAMAGE. 30 1.1 scw */ 31 1.1 scw 32 1.1 scw #ifndef _MVME_MEMCVAR_H 33 1.1 scw #define _MVME_MEMCVAR_H 34 1.1 scw 35 1.1 scw struct memc_softc { 36 1.3 chs device_t sc_dev; 37 1.1 scw bus_space_tag_t sc_bust; 38 1.1 scw bus_space_handle_t sc_bush; 39 1.1 scw struct evcnt sc_evcnt; 40 1.1 scw }; 41 1.1 scw 42 1.1 scw #define MEMC_NDEVS 2 43 1.1 scw 44 1.1 scw #define memc_reg_read(sc, off) \ 45 1.1 scw bus_space_read_1((sc)->sc_bust, (sc)->sc_bush, (off)) 46 1.1 scw #define memc_reg_write(sc, off, v) \ 47 1.1 scw bus_space_write_1((sc)->sc_bust, (sc)->sc_bush, (off), (v)) 48 1.1 scw 49 1.1 scw /* 50 1.1 scw * Some tweakable parameters. Mind you, I don't recommend changing 51 1.1 scw * the ipl... 52 1.1 scw * XXX: This should probably be ipl 7 53 1.1 scw */ 54 1.1 scw #ifdef MVME68K 55 1.1 scw #define MEMC_IRQ_LEVEL 6 56 1.1 scw #else 57 1.4 msaitoh #error Define irq level for memory controller 58 1.1 scw #endif 59 1.1 scw 60 1.1 scw extern void memc_init(struct memc_softc *); 61 1.1 scw 62 1.1 scw #endif /* _MVME_MEMCREG_H */ 63