Home | History | Annotate | Line # | Download | only in mvme
mvmebus.c revision 1.13.2.1
      1  1.13.2.1      yamt /*	$NetBSD: mvmebus.c,v 1.13.2.1 2008/05/18 12:34:14 yamt Exp $	*/
      2       1.1       scw 
      3       1.1       scw /*-
      4       1.1       scw  * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc.
      5       1.1       scw  * All rights reserved.
      6       1.1       scw  *
      7       1.1       scw  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1       scw  * by Steve C. Woodford.
      9       1.1       scw  *
     10       1.1       scw  * Redistribution and use in source and binary forms, with or without
     11       1.1       scw  * modification, are permitted provided that the following conditions
     12       1.1       scw  * are met:
     13       1.1       scw  * 1. Redistributions of source code must retain the above copyright
     14       1.1       scw  *    notice, this list of conditions and the following disclaimer.
     15       1.1       scw  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1       scw  *    notice, this list of conditions and the following disclaimer in the
     17       1.1       scw  *    documentation and/or other materials provided with the distribution.
     18       1.1       scw  *
     19       1.1       scw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1       scw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1       scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1       scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1       scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1       scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1       scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1       scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1       scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1       scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1       scw  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1       scw  */
     31       1.4     lukem 
     32       1.4     lukem #include <sys/cdefs.h>
     33  1.13.2.1      yamt __KERNEL_RCSID(0, "$NetBSD: mvmebus.c,v 1.13.2.1 2008/05/18 12:34:14 yamt Exp $");
     34       1.1       scw 
     35       1.1       scw #include <sys/param.h>
     36       1.1       scw #include <sys/kernel.h>
     37       1.1       scw #include <sys/systm.h>
     38       1.1       scw #include <sys/device.h>
     39       1.1       scw #include <sys/malloc.h>
     40       1.1       scw #include <sys/kcore.h>
     41       1.1       scw 
     42      1.12        ad #include <sys/cpu.h>
     43      1.12        ad #include <sys/bus.h>
     44       1.1       scw 
     45       1.1       scw #include <dev/vme/vmereg.h>
     46       1.1       scw #include <dev/vme/vmevar.h>
     47       1.1       scw 
     48       1.1       scw #include <dev/mvme/mvmebus.h>
     49       1.1       scw 
     50       1.1       scw #ifdef DIAGNOSTIC
     51       1.1       scw int	mvmebus_dummy_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
     52       1.1       scw 	    bus_size_t, int, bus_dmamap_t *);
     53       1.1       scw void	mvmebus_dummy_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
     54       1.1       scw int	mvmebus_dummy_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
     55       1.1       scw 	    bus_size_t, bus_dma_segment_t *, int, int *, int);
     56       1.1       scw void	mvmebus_dummy_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
     57       1.1       scw #endif
     58       1.1       scw 
     59       1.1       scw #ifdef DEBUG
     60       1.1       scw static const char *mvmebus_mod_string(vme_addr_t, vme_size_t,
     61       1.1       scw 	    vme_am_t, vme_datasize_t);
     62       1.1       scw #endif
     63       1.1       scw 
     64       1.1       scw static void mvmebus_offboard_ram(struct mvmebus_softc *);
     65       1.1       scw static int mvmebus_dmamap_load_common(struct mvmebus_softc *, bus_dmamap_t);
     66       1.1       scw 
     67       1.1       scw vme_am_t	_mvmebus_am_cap[] = {
     68       1.1       scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_USER,
     69       1.1       scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_USER,
     70       1.1       scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_USER,
     71       1.1       scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_USER,
     72       1.1       scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_SUPER,
     73       1.1       scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_SUPER,
     74       1.1       scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_SUPER,
     75       1.1       scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_SUPER
     76       1.1       scw };
     77       1.1       scw 
     78       1.1       scw const char *mvmebus_irq_name[] = {
     79       1.1       scw 	"vmeirq0", "vmeirq1", "vmeirq2", "vmeirq3",
     80       1.1       scw 	"vmeirq4", "vmeirq5", "vmeirq6", "vmeirq7"
     81       1.1       scw };
     82       1.1       scw 
     83       1.1       scw extern phys_ram_seg_t mem_clusters[0];
     84       1.1       scw extern int mem_cluster_cnt;
     85       1.1       scw 
     86       1.1       scw 
     87       1.1       scw static void
     88       1.1       scw mvmebus_offboard_ram(sc)
     89       1.1       scw 	struct mvmebus_softc *sc;
     90       1.1       scw {
     91       1.1       scw 	struct mvmebus_range *svr, *mvr;
     92       1.1       scw 	vme_addr_t start, end, size;
     93       1.1       scw 	int i;
     94       1.1       scw 
     95       1.1       scw 	/*
     96       1.1       scw 	 * If we have any offboard RAM (i.e. a VMEbus RAM board) then
     97       1.1       scw 	 * we need to record its details since it's effectively another
     98       1.1       scw 	 * VMEbus slave image as far as we're concerned.
     99       1.1       scw 	 * The chip-specific backend will have reserved sc->sc_slaves[0]
    100       1.1       scw 	 * for exactly this purpose.
    101       1.1       scw 	 */
    102       1.1       scw 	svr = sc->sc_slaves;
    103       1.1       scw 	if (mem_cluster_cnt < 2) {
    104       1.1       scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    105       1.1       scw 		return;
    106       1.1       scw 	}
    107       1.1       scw 
    108       1.1       scw 	start = mem_clusters[1].start;
    109       1.1       scw 	size = mem_clusters[1].size - 1;
    110       1.1       scw 	end = start + size;
    111       1.1       scw 
    112       1.1       scw 	/*
    113       1.1       scw 	 * Figure out which VMEbus master image the RAM is
    114       1.1       scw 	 * visible through. This will tell us the address
    115       1.1       scw 	 * modifier and datasizes it uses, as well as allowing
    116       1.1       scw 	 * us to calculate its `real' VMEbus address.
    117       1.1       scw 	 *
    118       1.1       scw 	 * XXX FIXME: This is broken if the RAM is mapped through
    119       1.1       scw 	 * a translated address space. For example, on mvme167 it's
    120       1.1       scw 	 * perfectly legal to set up the following A32 mapping:
    121       1.1       scw 	 *
    122       1.1       scw 	 *  vr_locaddr  == 0x80000000
    123       1.1       scw 	 *  vr_vmestart == 0x10000000
    124       1.1       scw 	 *  vr_vmeend   == 0x10ffffff
    125       1.1       scw 	 *
    126       1.1       scw 	 * In this case, RAM at VMEbus address 0x10800000 will appear at local
    127       1.1       scw 	 * address 0x80800000, but we need to set the slave vr_vmestart to
    128       1.1       scw 	 * 0x10800000.
    129       1.1       scw 	 */
    130       1.1       scw 	for (i = 0, mvr = sc->sc_masters; i < sc->sc_nmasters; i++, mvr++) {
    131       1.1       scw 		vme_addr_t vstart = mvr->vr_locstart + mvr->vr_vmestart;
    132       1.1       scw 
    133       1.1       scw 		if (start >= vstart &&
    134       1.1       scw 		    end <= vstart + (mvr->vr_vmeend - mvr->vr_vmestart))
    135       1.1       scw 			break;
    136       1.1       scw 	}
    137       1.1       scw 	if (i == sc->sc_nmasters) {
    138       1.1       scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    139       1.1       scw #ifdef DEBUG
    140       1.1       scw 		printf("%s: No VMEbus master mapping for offboard RAM!\n",
    141      1.13    cegger 		    device_xname(&sc->sc_dev));
    142       1.1       scw #endif
    143       1.1       scw 		return;
    144       1.1       scw 	}
    145       1.1       scw 
    146       1.1       scw 	svr->vr_locstart = start;
    147       1.1       scw 	svr->vr_vmestart = start & mvr->vr_mask;
    148       1.1       scw 	svr->vr_vmeend = svr->vr_vmestart + size;
    149       1.1       scw 	svr->vr_datasize = mvr->vr_datasize;
    150       1.1       scw 	svr->vr_mask = mvr->vr_mask;
    151       1.1       scw 	svr->vr_am = mvr->vr_am & VME_AM_ADRSIZEMASK;
    152       1.1       scw 	svr->vr_am |= MVMEBUS_AM_CAP_DATA  | MVMEBUS_AM_CAP_PROG |
    153       1.1       scw 		      MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER;
    154       1.1       scw }
    155       1.1       scw 
    156       1.1       scw void
    157       1.1       scw mvmebus_attach(sc)
    158       1.1       scw 	struct mvmebus_softc *sc;
    159       1.1       scw {
    160       1.1       scw 	struct vmebus_attach_args vaa;
    161       1.1       scw 	int i;
    162       1.1       scw 
    163       1.1       scw 	/* Zap the IRQ reference counts */
    164       1.1       scw 	for (i = 0; i < 8; i++)
    165       1.1       scw 		sc->sc_irqref[i] = 0;
    166       1.1       scw 
    167       1.1       scw 	/* If there's offboard RAM, get its VMEbus slave attributes */
    168       1.1       scw 	mvmebus_offboard_ram(sc);
    169       1.1       scw 
    170       1.1       scw #ifdef DEBUG
    171       1.1       scw 	for (i = 0; i < sc->sc_nmasters; i++) {
    172       1.1       scw 		struct mvmebus_range *vr = &sc->sc_masters[i];
    173       1.1       scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    174       1.1       scw 			printf("%s: Master#%d: disabled\n",
    175      1.13    cegger 			    device_xname(&sc->sc_dev), i);
    176       1.1       scw 			continue;
    177       1.1       scw 		}
    178       1.1       scw 		printf("%s: Master#%d: 0x%08lx -> %s\n",
    179      1.13    cegger 		    device_xname(&sc->sc_dev), i,
    180       1.1       scw 		    vr->vr_locstart + (vr->vr_vmestart & vr->vr_mask),
    181       1.1       scw 		    mvmebus_mod_string(vr->vr_vmestart,
    182       1.1       scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    183       1.1       scw 			vr->vr_am, vr->vr_datasize));
    184       1.1       scw 	}
    185       1.1       scw 
    186       1.1       scw 	for (i = 0; i < sc->sc_nslaves; i++) {
    187       1.1       scw 		struct mvmebus_range *vr = &sc->sc_slaves[i];
    188       1.1       scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    189       1.1       scw 			printf("%s:  Slave#%d: disabled\n",
    190      1.13    cegger 			    device_xname(&sc->sc_dev), i);
    191       1.1       scw 			continue;
    192       1.1       scw 		}
    193       1.1       scw 		printf("%s:  Slave#%d: 0x%08lx -> %s\n",
    194      1.13    cegger 		    device_xname(&sc->sc_dev), i, vr->vr_locstart,
    195       1.1       scw 		    mvmebus_mod_string(vr->vr_vmestart,
    196       1.1       scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    197       1.1       scw 			vr->vr_am, vr->vr_datasize));
    198       1.1       scw 	}
    199       1.1       scw #endif
    200       1.1       scw 
    201       1.1       scw 	sc->sc_vct.cookie = sc;
    202       1.1       scw 	sc->sc_vct.vct_probe = mvmebus_probe;
    203       1.1       scw 	sc->sc_vct.vct_map = mvmebus_map;
    204       1.1       scw 	sc->sc_vct.vct_unmap = mvmebus_unmap;
    205       1.1       scw 	sc->sc_vct.vct_int_map = mvmebus_intmap;
    206       1.1       scw 	sc->sc_vct.vct_int_evcnt = mvmebus_intr_evcnt;
    207       1.1       scw 	sc->sc_vct.vct_int_establish = mvmebus_intr_establish;
    208       1.1       scw 	sc->sc_vct.vct_int_disestablish = mvmebus_intr_disestablish;
    209       1.1       scw 	sc->sc_vct.vct_dmamap_create = mvmebus_dmamap_create;
    210       1.1       scw 	sc->sc_vct.vct_dmamap_destroy = mvmebus_dmamap_destroy;
    211       1.1       scw 	sc->sc_vct.vct_dmamem_alloc = mvmebus_dmamem_alloc;
    212       1.1       scw 	sc->sc_vct.vct_dmamem_free = mvmebus_dmamem_free;
    213       1.1       scw 
    214       1.1       scw 	sc->sc_mvmedmat._cookie = sc;
    215       1.1       scw 	sc->sc_mvmedmat._dmamap_load = mvmebus_dmamap_load;
    216       1.1       scw 	sc->sc_mvmedmat._dmamap_load_mbuf = mvmebus_dmamap_load_mbuf;
    217       1.1       scw 	sc->sc_mvmedmat._dmamap_load_uio = mvmebus_dmamap_load_uio;
    218       1.1       scw 	sc->sc_mvmedmat._dmamap_load_raw = mvmebus_dmamap_load_raw;
    219       1.1       scw 	sc->sc_mvmedmat._dmamap_unload = mvmebus_dmamap_unload;
    220       1.1       scw 	sc->sc_mvmedmat._dmamap_sync = mvmebus_dmamap_sync;
    221       1.1       scw 	sc->sc_mvmedmat._dmamem_map = mvmebus_dmamem_map;
    222       1.1       scw 	sc->sc_mvmedmat._dmamem_unmap = mvmebus_dmamem_unmap;
    223       1.1       scw 	sc->sc_mvmedmat._dmamem_mmap = mvmebus_dmamem_mmap;
    224       1.1       scw 
    225       1.1       scw #ifdef DIAGNOSTIC
    226       1.1       scw 	sc->sc_mvmedmat._dmamap_create = mvmebus_dummy_dmamap_create;
    227       1.1       scw 	sc->sc_mvmedmat._dmamap_destroy = mvmebus_dummy_dmamap_destroy;
    228       1.1       scw 	sc->sc_mvmedmat._dmamem_alloc = mvmebus_dummy_dmamem_alloc;
    229       1.1       scw 	sc->sc_mvmedmat._dmamem_free = mvmebus_dummy_dmamem_free;
    230       1.1       scw #else
    231       1.1       scw 	sc->sc_mvmedmat._dmamap_create = NULL;
    232       1.1       scw 	sc->sc_mvmedmat._dmamap_destroy = NULL;
    233       1.1       scw 	sc->sc_mvmedmat._dmamem_alloc = NULL;
    234       1.1       scw 	sc->sc_mvmedmat._dmamem_free = NULL;
    235       1.1       scw #endif
    236       1.1       scw 
    237       1.1       scw 	vaa.va_vct = &sc->sc_vct;
    238       1.1       scw 	vaa.va_bdt = &sc->sc_mvmedmat;
    239       1.1       scw 	vaa.va_slaveconfig = NULL;
    240       1.1       scw 
    241       1.1       scw 	config_found(&sc->sc_dev, &vaa, 0);
    242       1.1       scw }
    243       1.1       scw 
    244       1.1       scw int
    245       1.1       scw mvmebus_map(vsc, vmeaddr, len, am, datasize, swap, tag, handle, resc)
    246       1.1       scw 	void *vsc;
    247       1.1       scw 	vme_addr_t vmeaddr;
    248       1.1       scw 	vme_size_t len;
    249       1.1       scw 	vme_am_t am;
    250       1.1       scw 	vme_datasize_t datasize;
    251       1.1       scw 	vme_swap_t swap;
    252       1.1       scw 	bus_space_tag_t *tag;
    253       1.1       scw 	bus_space_handle_t *handle;
    254       1.1       scw 	vme_mapresc_t *resc;
    255       1.1       scw {
    256       1.1       scw 	struct mvmebus_softc *sc;
    257       1.1       scw 	struct mvmebus_mapresc *mr;
    258       1.1       scw 	struct mvmebus_range *vr;
    259       1.1       scw 	vme_addr_t end;
    260       1.1       scw 	vme_am_t cap, as;
    261       1.1       scw 	paddr_t paddr;
    262       1.1       scw 	int rv, i;
    263       1.1       scw 
    264       1.1       scw 	sc = vsc;
    265       1.1       scw 	end = (vmeaddr + len) - 1;
    266       1.1       scw 	paddr = 0;
    267       1.1       scw 	vr = sc->sc_masters;
    268       1.1       scw 	cap = MVMEBUS_AM2CAP(am);
    269       1.1       scw 	as = am & VME_AM_ADRSIZEMASK;
    270       1.1       scw 
    271       1.1       scw 	for (i = 0; i < sc->sc_nmasters && paddr == 0; i++, vr++) {
    272       1.1       scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    273       1.1       scw 			continue;
    274       1.1       scw 
    275       1.1       scw 		if (cap == (vr->vr_am & cap) &&
    276       1.1       scw 		    as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    277       1.1       scw 		    datasize <= vr->vr_datasize &&
    278       1.1       scw 		    vmeaddr >= vr->vr_vmestart && end < vr->vr_vmeend)
    279       1.1       scw 			paddr = vr->vr_locstart + (vmeaddr & vr->vr_mask);
    280       1.1       scw 	}
    281       1.1       scw 	if (paddr == 0)
    282       1.1       scw 		return (ENOMEM);
    283       1.1       scw 
    284       1.1       scw 	rv = bus_space_map(sc->sc_bust, paddr, len, 0, handle);
    285       1.1       scw 	if (rv != 0)
    286       1.1       scw 		return (rv);
    287       1.1       scw 
    288       1.1       scw 	/* Allocate space for the resource tag */
    289       1.1       scw 	if ((mr = malloc(sizeof(*mr), M_DEVBUF, M_NOWAIT)) == NULL) {
    290       1.1       scw 		bus_space_unmap(sc->sc_bust, *handle, len);
    291       1.1       scw 		return (ENOMEM);
    292       1.1       scw 	}
    293       1.1       scw 
    294       1.1       scw 	/* Record the range's details */
    295       1.1       scw 	mr->mr_am = am;
    296       1.1       scw 	mr->mr_datasize = datasize;
    297       1.1       scw 	mr->mr_addr = vmeaddr;
    298       1.1       scw 	mr->mr_size = len;
    299       1.1       scw 	mr->mr_handle = *handle;
    300       1.1       scw 	mr->mr_range = i;
    301       1.1       scw 
    302       1.1       scw 	*tag = sc->sc_bust;
    303       1.1       scw 	*resc = (vme_mapresc_t *) mr;
    304       1.1       scw 
    305       1.1       scw 	return (0);
    306       1.1       scw }
    307       1.1       scw 
    308       1.1       scw /* ARGSUSED */
    309       1.1       scw void
    310       1.1       scw mvmebus_unmap(vsc, resc)
    311       1.1       scw 	void *vsc;
    312       1.1       scw 	vme_mapresc_t resc;
    313       1.1       scw {
    314       1.1       scw 	struct mvmebus_softc *sc = vsc;
    315       1.1       scw 	struct mvmebus_mapresc *mr = (struct mvmebus_mapresc *) resc;
    316       1.1       scw 
    317       1.1       scw 	bus_space_unmap(sc->sc_bust, mr->mr_handle, mr->mr_size);
    318       1.1       scw 
    319       1.1       scw 	free(mr, M_DEVBUF);
    320       1.1       scw }
    321       1.1       scw 
    322       1.1       scw int
    323       1.1       scw mvmebus_probe(vsc, vmeaddr, len, am, datasize, callback, arg)
    324       1.1       scw 	void *vsc;
    325       1.1       scw 	vme_addr_t vmeaddr;
    326       1.1       scw 	vme_size_t len;
    327       1.1       scw 	vme_am_t am;
    328       1.1       scw 	vme_datasize_t datasize;
    329       1.1       scw 	int (*callback)(void *, bus_space_tag_t, bus_space_handle_t);
    330       1.1       scw 	void *arg;
    331       1.1       scw {
    332       1.1       scw 	bus_space_tag_t tag;
    333       1.1       scw 	bus_space_handle_t handle;
    334       1.1       scw 	vme_mapresc_t resc;
    335       1.1       scw 	vme_size_t offs;
    336       1.1       scw 	int rv;
    337       1.1       scw 
    338       1.1       scw 	/* Get a temporary mapping to the VMEbus range */
    339       1.1       scw 	rv = mvmebus_map(vsc, vmeaddr, len, am, datasize, 0,
    340       1.1       scw 	    &tag, &handle, &resc);
    341       1.1       scw 	if (rv)
    342       1.1       scw 		return (rv);
    343       1.1       scw 
    344       1.1       scw 	if (callback)
    345       1.1       scw 		rv = (*callback) (arg, tag, handle);
    346       1.1       scw 	else
    347       1.1       scw 		for (offs = 0; offs < len && rv == 0;) {
    348       1.1       scw 			switch (datasize) {
    349       1.1       scw 			case VME_D8:
    350       1.1       scw 				rv = bus_space_peek_1(tag, handle, offs, NULL);
    351       1.1       scw 				offs += 1;
    352       1.1       scw 				break;
    353       1.1       scw 
    354       1.1       scw 			case VME_D16:
    355       1.1       scw 				rv = bus_space_peek_2(tag, handle, offs, NULL);
    356       1.1       scw 				offs += 2;
    357       1.1       scw 				break;
    358       1.1       scw 
    359       1.1       scw 			case VME_D32:
    360       1.1       scw 				rv = bus_space_peek_4(tag, handle, offs, NULL);
    361       1.1       scw 				offs += 4;
    362       1.1       scw 				break;
    363       1.1       scw 			}
    364       1.1       scw 		}
    365       1.1       scw 
    366       1.1       scw 	mvmebus_unmap(vsc, resc);
    367       1.1       scw 
    368       1.1       scw 	return (rv);
    369       1.1       scw }
    370       1.1       scw 
    371       1.1       scw /* ARGSUSED */
    372       1.1       scw int
    373       1.1       scw mvmebus_intmap(vsc, level, vector, handlep)
    374       1.1       scw 	void *vsc;
    375       1.1       scw 	int level, vector;
    376       1.1       scw 	vme_intr_handle_t *handlep;
    377       1.1       scw {
    378       1.1       scw 
    379       1.1       scw 	if (level < 1 || level > 7 || vector < 0x80 || vector > 0xff)
    380       1.1       scw 		return (EINVAL);
    381       1.1       scw 
    382       1.1       scw 	/* This is rather gross */
    383       1.1       scw 	*handlep = (void *) (int) ((level << 8) | vector);
    384       1.1       scw 	return (0);
    385       1.1       scw }
    386       1.1       scw 
    387       1.1       scw /* ARGSUSED */
    388       1.1       scw const struct evcnt *
    389       1.1       scw mvmebus_intr_evcnt(vsc, handle)
    390       1.1       scw 	void *vsc;
    391       1.1       scw 	vme_intr_handle_t handle;
    392       1.1       scw {
    393       1.1       scw 	struct mvmebus_softc *sc = vsc;
    394       1.1       scw 
    395       1.1       scw 	return (&sc->sc_evcnt[(((int) handle) >> 8) - 1]);
    396       1.1       scw }
    397       1.1       scw 
    398       1.1       scw void *
    399       1.1       scw mvmebus_intr_establish(vsc, handle, prior, func, arg)
    400       1.1       scw 	void *vsc;
    401       1.1       scw 	vme_intr_handle_t handle;
    402       1.1       scw 	int prior;
    403       1.1       scw 	int (*func)(void *);
    404       1.1       scw 	void *arg;
    405       1.1       scw {
    406       1.1       scw 	struct mvmebus_softc *sc;
    407       1.1       scw 	int level, vector, first;
    408       1.1       scw 
    409       1.1       scw 	sc = vsc;
    410       1.1       scw 
    411       1.1       scw 	/* Extract the interrupt's level and vector */
    412       1.1       scw 	level = ((int) handle) >> 8;
    413       1.1       scw 	vector = ((int) handle) & 0xff;
    414       1.1       scw 
    415       1.1       scw #ifdef DIAGNOSTIC
    416       1.1       scw 	if (vector < 0 || vector > 0xff) {
    417       1.1       scw 		printf("%s: Illegal vector offset: 0x%x\n",
    418      1.13    cegger 		    device_xname(&sc->sc_dev), vector);
    419       1.1       scw 		panic("mvmebus_intr_establish");
    420       1.1       scw 	}
    421       1.1       scw 	if (level < 1 || level > 7) {
    422       1.1       scw 		printf("%s: Illegal interrupt level: %d\n",
    423      1.13    cegger 		    device_xname(&sc->sc_dev), level);
    424       1.1       scw 		panic("mvmebus_intr_establish");
    425       1.1       scw 	}
    426       1.1       scw #endif
    427       1.1       scw 
    428       1.1       scw 	first = (sc->sc_irqref[level]++ == 0);
    429       1.1       scw 
    430       1.1       scw 	(*sc->sc_intr_establish)(sc->sc_chip, prior, level, vector, first,
    431       1.1       scw 	    func, arg, &sc->sc_evcnt[level - 1]);
    432       1.1       scw 
    433       1.1       scw 	return ((void *) handle);
    434       1.1       scw }
    435       1.1       scw 
    436       1.1       scw void
    437       1.1       scw mvmebus_intr_disestablish(vsc, handle)
    438       1.1       scw 	void *vsc;
    439       1.1       scw 	vme_intr_handle_t handle;
    440       1.1       scw {
    441       1.1       scw 	struct mvmebus_softc *sc;
    442       1.1       scw 	int level, vector, last;
    443       1.1       scw 
    444       1.1       scw 	sc = vsc;
    445       1.1       scw 
    446       1.1       scw 	/* Extract the interrupt's level and vector */
    447       1.1       scw 	level = ((int) handle) >> 8;
    448       1.1       scw 	vector = ((int) handle) & 0xff;
    449       1.1       scw 
    450       1.1       scw #ifdef DIAGNOSTIC
    451       1.1       scw 	if (vector < 0 || vector > 0xff) {
    452       1.1       scw 		printf("%s: Illegal vector offset: 0x%x\n",
    453      1.13    cegger 		    device_xname(&sc->sc_dev), vector);
    454       1.1       scw 		panic("mvmebus_intr_disestablish");
    455       1.1       scw 	}
    456       1.1       scw 	if (level < 1 || level > 7) {
    457       1.1       scw 		printf("%s: Illegal interrupt level: %d\n",
    458      1.13    cegger 		    device_xname(&sc->sc_dev), level);
    459       1.1       scw 		panic("mvmebus_intr_disestablish");
    460       1.1       scw 	}
    461       1.1       scw 	if (sc->sc_irqref[level] == 0) {
    462       1.1       scw 		printf("%s: VMEirq#%d: Reference count already zero!\n",
    463      1.13    cegger 		    device_xname(&sc->sc_dev), level);
    464       1.1       scw 		panic("mvmebus_intr_disestablish");
    465       1.1       scw 	}
    466       1.1       scw #endif
    467       1.1       scw 
    468       1.1       scw 	last = (--(sc->sc_irqref[level]) == 0);
    469       1.1       scw 
    470       1.1       scw 	(*sc->sc_intr_disestablish)(sc->sc_chip, level, vector, last,
    471       1.1       scw 	    &sc->sc_evcnt[level - 1]);
    472       1.1       scw }
    473       1.1       scw 
    474       1.1       scw #ifdef DIAGNOSTIC
    475       1.1       scw /* ARGSUSED */
    476       1.1       scw int
    477       1.1       scw mvmebus_dummy_dmamap_create(t, size, nsegs, maxsegsz, boundary, flags, dmamp)
    478       1.1       scw 	bus_dma_tag_t t;
    479       1.1       scw 	bus_size_t size;
    480       1.1       scw 	int nsegs;
    481       1.1       scw 	bus_size_t maxsegsz;
    482       1.1       scw 	bus_size_t boundary;
    483       1.1       scw 	int flags;
    484       1.1       scw 	bus_dmamap_t *dmamp;
    485       1.1       scw {
    486       1.1       scw 
    487       1.1       scw 	panic("Must use vme_dmamap_create() in place of bus_dmamap_create()");
    488       1.1       scw 	return (0);	/* Shutup the compiler */
    489       1.1       scw }
    490       1.1       scw 
    491       1.1       scw /* ARGSUSED */
    492       1.1       scw void
    493       1.1       scw mvmebus_dummy_dmamap_destroy(t, map)
    494       1.1       scw 	bus_dma_tag_t t;
    495       1.1       scw 	bus_dmamap_t map;
    496       1.1       scw {
    497       1.1       scw 
    498       1.1       scw 	panic("Must use vme_dmamap_destroy() in place of bus_dmamap_destroy()");
    499       1.1       scw }
    500       1.1       scw #endif
    501       1.1       scw 
    502       1.1       scw /* ARGSUSED */
    503       1.1       scw int
    504       1.1       scw mvmebus_dmamap_create(vsc, len, am, datasize, swap, nsegs,
    505       1.1       scw     segsz, bound, flags, mapp)
    506       1.1       scw 	void *vsc;
    507       1.1       scw 	vme_size_t len;
    508       1.1       scw 	vme_am_t am;
    509       1.1       scw 	vme_datasize_t datasize;
    510       1.1       scw 	vme_swap_t swap;
    511       1.1       scw 	int nsegs;
    512       1.1       scw 	vme_size_t segsz;
    513       1.1       scw 	vme_addr_t bound;
    514       1.1       scw 	int flags;
    515       1.1       scw 	bus_dmamap_t *mapp;
    516       1.1       scw {
    517       1.1       scw 	struct mvmebus_softc *sc = vsc;
    518       1.1       scw 	struct mvmebus_dmamap *vmap;
    519       1.1       scw 	struct mvmebus_range *vr;
    520       1.1       scw 	vme_am_t cap, as;
    521       1.1       scw 	int i, rv;
    522       1.1       scw 
    523       1.1       scw 	cap = MVMEBUS_AM2CAP(am);
    524       1.1       scw 	as = am & VME_AM_ADRSIZEMASK;
    525       1.1       scw 
    526       1.1       scw 	/*
    527       1.1       scw 	 * Verify that we even stand a chance of satisfying
    528       1.1       scw 	 * the VMEbus address space and datasize requested.
    529       1.1       scw 	 */
    530       1.1       scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    531       1.1       scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    532       1.1       scw 			continue;
    533       1.1       scw 
    534       1.1       scw 		if (as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    535       1.1       scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    536       1.1       scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    537       1.1       scw 			break;
    538       1.1       scw 	}
    539       1.1       scw 
    540       1.1       scw 	if (i == sc->sc_nslaves)
    541       1.1       scw 		return (EINVAL);
    542       1.1       scw 
    543       1.1       scw 	if ((vmap = malloc(sizeof(*vmap), M_DMAMAP,
    544       1.1       scw 	    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
    545       1.1       scw 		return (ENOMEM);
    546       1.1       scw 
    547       1.1       scw 
    548       1.1       scw 	rv = bus_dmamap_create(sc->sc_dmat, len, nsegs, segsz,
    549       1.1       scw 	    bound, flags, mapp);
    550       1.1       scw 	if (rv != 0) {
    551       1.1       scw 		free(vmap, M_DMAMAP);
    552       1.1       scw 		return (rv);
    553       1.1       scw 	}
    554       1.1       scw 
    555       1.1       scw 	vmap->vm_am = am;
    556       1.1       scw 	vmap->vm_datasize = datasize;
    557       1.1       scw 	vmap->vm_swap = swap;
    558       1.1       scw 	vmap->vm_slave = vr;
    559       1.1       scw 
    560       1.1       scw 	(*mapp)->_dm_cookie = vmap;
    561       1.1       scw 
    562       1.1       scw 	return (0);
    563       1.1       scw }
    564       1.1       scw 
    565       1.1       scw void
    566       1.1       scw mvmebus_dmamap_destroy(vsc, map)
    567       1.1       scw 	void *vsc;
    568       1.1       scw 	bus_dmamap_t map;
    569       1.1       scw {
    570       1.1       scw 	struct mvmebus_softc *sc = vsc;
    571       1.1       scw 
    572       1.1       scw 	free(map->_dm_cookie, M_DMAMAP);
    573       1.1       scw 	bus_dmamap_destroy(sc->sc_dmat, map);
    574       1.1       scw }
    575       1.1       scw 
    576       1.1       scw static int
    577       1.1       scw mvmebus_dmamap_load_common(sc, map)
    578       1.1       scw 	struct mvmebus_softc *sc;
    579       1.1       scw 	bus_dmamap_t map;
    580       1.1       scw {
    581       1.1       scw 	struct mvmebus_dmamap *vmap = map->_dm_cookie;
    582       1.1       scw 	struct mvmebus_range *vr = vmap->vm_slave;
    583       1.1       scw 	bus_dma_segment_t *ds;
    584       1.1       scw 	vme_am_t cap, am;
    585       1.1       scw 	int i;
    586       1.1       scw 
    587       1.1       scw 	cap = MVMEBUS_AM2CAP(vmap->vm_am);
    588       1.1       scw 	am = vmap->vm_am & VME_AM_ADRSIZEMASK;
    589       1.1       scw 
    590       1.1       scw 	/*
    591       1.1       scw 	 * Traverse the list of segments which make up this map, and
    592       1.7       wiz 	 * convert the CPU-relative addresses therein to VMEbus addresses.
    593       1.1       scw 	 */
    594       1.1       scw 	for (ds = &map->dm_segs[0]; ds < &map->dm_segs[map->dm_nsegs]; ds++) {
    595       1.1       scw 		/*
    596       1.1       scw 		 * First, see if this map's slave image can access the
    597       1.1       scw 		 * segment, otherwise we have to waste time scanning all
    598       1.1       scw 		 * the slave images.
    599       1.1       scw 		 */
    600       1.1       scw 		vr = vmap->vm_slave;
    601       1.1       scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    602       1.1       scw 		    cap == (vr->vr_am & cap) &&
    603       1.1       scw 		    vmap->vm_datasize <= vr->vr_datasize &&
    604       1.1       scw 		    ds->_ds_cpuaddr >= vr->vr_locstart &&
    605       1.1       scw 		    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    606       1.1       scw 			goto found;
    607       1.1       scw 
    608       1.1       scw 		for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    609       1.1       scw 			if (vr->vr_am == MVMEBUS_AM_DISABLED)
    610       1.1       scw 				continue;
    611       1.1       scw 
    612       1.1       scw 			/*
    613       1.1       scw 			 * Filter out any slave images which don't have the
    614       1.1       scw 			 * same VMEbus address modifier and datasize as
    615       1.1       scw 			 * this DMA map, and those which don't cover the
    616       1.1       scw 			 * physical address region containing the segment.
    617       1.1       scw 			 */
    618       1.1       scw 			if (vr != vmap->vm_slave &&
    619       1.1       scw 			    am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    620       1.1       scw 			    cap == (vr->vr_am & cap) &&
    621       1.1       scw 			    vmap->vm_datasize <= vr->vr_datasize &&
    622       1.1       scw 			    ds->_ds_cpuaddr >= vr->vr_locstart &&
    623       1.1       scw 			    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    624       1.1       scw 				break;
    625       1.1       scw 		}
    626       1.1       scw 
    627       1.1       scw 		/*
    628       1.1       scw 		 * Did we find an applicable slave image which covers this
    629       1.1       scw 		 * segment?
    630       1.1       scw 		 */
    631       1.1       scw 		if (i == sc->sc_nslaves) {
    632       1.1       scw 			/*
    633       1.1       scw 			 * XXX TODO:
    634       1.1       scw 			 *
    635       1.1       scw 			 * Bounce this segment via a bounce buffer allocated
    636       1.1       scw 			 * from this DMA map.
    637       1.1       scw 			 */
    638       1.1       scw 			printf("mvmebus_dmamap_load_common: bounce needed!\n");
    639       1.1       scw 			return (EINVAL);
    640       1.1       scw 		}
    641       1.1       scw 
    642       1.1       scw found:
    643       1.1       scw 		/*
    644       1.1       scw 		 * Generate the VMEbus address of this segment
    645       1.1       scw 		 */
    646       1.1       scw 		ds->ds_addr = (ds->_ds_cpuaddr - vr->vr_locstart) +
    647       1.1       scw 		    vr->vr_vmestart;
    648       1.1       scw 	}
    649       1.1       scw 
    650       1.1       scw 	return (0);
    651       1.1       scw }
    652       1.1       scw 
    653       1.1       scw int
    654       1.1       scw mvmebus_dmamap_load(t, map, buf, buflen, p, flags)
    655       1.1       scw 	bus_dma_tag_t t;
    656       1.1       scw 	bus_dmamap_t map;
    657       1.1       scw 	void *buf;
    658       1.1       scw 	bus_size_t buflen;
    659       1.1       scw 	struct proc *p;
    660       1.1       scw 	int flags;
    661       1.1       scw {
    662       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    663       1.1       scw 	int rv;
    664       1.1       scw 
    665       1.1       scw 	rv = bus_dmamap_load(sc->sc_dmat, map, buf, buflen, p, flags);
    666       1.1       scw 	if (rv != 0)
    667       1.1       scw 		return rv;
    668       1.1       scw 
    669       1.1       scw 	return mvmebus_dmamap_load_common(sc, map);
    670       1.1       scw }
    671       1.1       scw 
    672       1.1       scw int
    673       1.1       scw mvmebus_dmamap_load_mbuf(t, map, chain, flags)
    674       1.1       scw 	bus_dma_tag_t t;
    675       1.1       scw 	bus_dmamap_t map;
    676       1.1       scw 	struct mbuf *chain;
    677       1.1       scw 	int flags;
    678       1.1       scw {
    679       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    680       1.1       scw 	int rv;
    681       1.1       scw 
    682       1.1       scw 	rv = bus_dmamap_load_mbuf(sc->sc_dmat, map, chain, flags);
    683       1.1       scw 	if (rv != 0)
    684       1.1       scw 		return rv;
    685       1.1       scw 
    686       1.1       scw 	return mvmebus_dmamap_load_common(sc, map);
    687       1.1       scw }
    688       1.1       scw 
    689       1.1       scw int
    690       1.1       scw mvmebus_dmamap_load_uio(t, map, uio, flags)
    691       1.1       scw 	bus_dma_tag_t t;
    692       1.1       scw 	bus_dmamap_t map;
    693       1.1       scw 	struct uio *uio;
    694       1.1       scw 	int flags;
    695       1.1       scw {
    696       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    697       1.1       scw 	int rv;
    698       1.1       scw 
    699       1.1       scw 	rv = bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags);
    700       1.1       scw 	if (rv != 0)
    701       1.1       scw 		return rv;
    702       1.1       scw 
    703       1.1       scw 	return mvmebus_dmamap_load_common(sc, map);
    704       1.1       scw }
    705       1.1       scw 
    706       1.1       scw int
    707       1.1       scw mvmebus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
    708       1.1       scw 	bus_dma_tag_t t;
    709       1.1       scw 	bus_dmamap_t map;
    710       1.1       scw 	bus_dma_segment_t *segs;
    711       1.1       scw 	int nsegs;
    712       1.1       scw 	bus_size_t size;
    713       1.1       scw 	int flags;
    714       1.1       scw {
    715       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    716       1.1       scw 	int rv;
    717       1.1       scw 
    718       1.1       scw 	/*
    719       1.1       scw 	 * mvmebus_dmamem_alloc() will ensure that the physical memory
    720       1.1       scw 	 * backing these segments is 100% accessible in at least one
    721       1.1       scw 	 * of the board's VMEbus slave images.
    722       1.1       scw 	 */
    723       1.1       scw 	rv = bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags);
    724       1.1       scw 	if (rv != 0)
    725       1.1       scw 		return rv;
    726       1.1       scw 
    727       1.1       scw 	return mvmebus_dmamap_load_common(sc, map);
    728       1.1       scw }
    729       1.1       scw 
    730       1.1       scw void
    731       1.1       scw mvmebus_dmamap_unload(t, map)
    732       1.1       scw 	bus_dma_tag_t t;
    733       1.1       scw 	bus_dmamap_t map;
    734       1.1       scw {
    735       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    736       1.1       scw 
    737       1.1       scw 	/* XXX Deal with bounce buffers */
    738       1.1       scw 
    739       1.1       scw 	bus_dmamap_unload(sc->sc_dmat, map);
    740       1.1       scw }
    741       1.1       scw 
    742       1.1       scw void
    743       1.1       scw mvmebus_dmamap_sync(t, map, offset, len, ops)
    744       1.1       scw 	bus_dma_tag_t t;
    745       1.1       scw 	bus_dmamap_t map;
    746       1.1       scw 	bus_addr_t offset;
    747       1.1       scw 	bus_size_t len;
    748       1.1       scw 	int ops;
    749       1.1       scw {
    750       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    751       1.1       scw 
    752       1.1       scw 	/* XXX Bounce buffers */
    753       1.1       scw 
    754       1.1       scw 	bus_dmamap_sync(sc->sc_dmat, map, offset, len, ops);
    755       1.1       scw }
    756       1.1       scw 
    757       1.1       scw #ifdef DIAGNOSTIC
    758       1.1       scw /* ARGSUSED */
    759       1.1       scw int
    760       1.1       scw mvmebus_dummy_dmamem_alloc(t, size, align, boundary, segs, nsegs, rsegs, flags)
    761       1.1       scw 	bus_dma_tag_t t;
    762       1.1       scw 	bus_size_t size;
    763       1.1       scw 	bus_size_t align;
    764       1.1       scw 	bus_size_t boundary;
    765       1.1       scw 	bus_dma_segment_t *segs;
    766       1.1       scw 	int nsegs;
    767       1.1       scw 	int *rsegs;
    768       1.1       scw 	int flags;
    769       1.1       scw {
    770       1.1       scw 
    771       1.2    provos 	panic("Must use vme_dmamem_alloc() in place of bus_dmamem_alloc()");
    772       1.1       scw }
    773       1.1       scw 
    774       1.1       scw /* ARGSUSED */
    775       1.1       scw void
    776       1.1       scw mvmebus_dummy_dmamem_free(t, segs, nsegs)
    777       1.1       scw 	bus_dma_tag_t t;
    778       1.1       scw 	bus_dma_segment_t *segs;
    779       1.1       scw 	int nsegs;
    780       1.1       scw {
    781       1.1       scw 
    782       1.1       scw 	panic("Must use vme_dmamem_free() in place of bus_dmamem_free()");
    783       1.1       scw }
    784       1.1       scw #endif
    785       1.1       scw 
    786       1.1       scw /* ARGSUSED */
    787       1.1       scw int
    788       1.1       scw mvmebus_dmamem_alloc(vsc, len, am, datasize, swap, segs, nsegs, rsegs, flags)
    789       1.1       scw 	void *vsc;
    790       1.1       scw 	vme_size_t len;
    791       1.1       scw 	vme_am_t am;
    792       1.1       scw 	vme_datasize_t datasize;
    793       1.1       scw 	vme_swap_t swap;
    794       1.1       scw 	bus_dma_segment_t *segs;
    795       1.1       scw 	int nsegs;
    796       1.1       scw 	int *rsegs;
    797       1.1       scw 	int flags;
    798       1.1       scw {
    799       1.1       scw 	extern paddr_t avail_start;
    800       1.1       scw 	struct mvmebus_softc *sc = vsc;
    801       1.1       scw 	struct mvmebus_range *vr;
    802       1.1       scw 	bus_addr_t low, high;
    803       1.1       scw 	bus_size_t bound;
    804       1.1       scw 	vme_am_t cap;
    805       1.1       scw 	int i;
    806       1.1       scw 
    807       1.1       scw 	cap = MVMEBUS_AM2CAP(am);
    808       1.1       scw 	am &= VME_AM_ADRSIZEMASK;
    809       1.1       scw 
    810       1.1       scw 	/*
    811       1.1       scw 	 * Find a slave mapping in the requested VMEbus address space.
    812       1.1       scw 	 */
    813       1.1       scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    814       1.1       scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    815       1.1       scw 			continue;
    816       1.1       scw 
    817       1.1       scw 		if (i == 0 && (flags & BUS_DMA_ONBOARD_RAM) != 0)
    818       1.1       scw 			continue;
    819       1.1       scw 
    820       1.1       scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    821       1.1       scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    822       1.1       scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    823       1.1       scw 			break;
    824       1.1       scw 	}
    825       1.1       scw 	if (i == sc->sc_nslaves)
    826       1.1       scw 		return (EINVAL);
    827       1.1       scw 
    828       1.1       scw 	/*
    829       1.1       scw 	 * Set up the constraints so we can allocate physical memory which
    830       1.1       scw 	 * is visible in the requested address space
    831       1.1       scw 	 */
    832       1.1       scw 	low = max(vr->vr_locstart, avail_start);
    833       1.1       scw 	high = vr->vr_locstart + (vr->vr_vmeend - vr->vr_vmestart) + 1;
    834       1.1       scw 	bound = (bus_size_t) vr->vr_mask + 1;
    835       1.1       scw 
    836       1.1       scw 	/*
    837       1.1       scw 	 * Allocate physical memory.
    838       1.1       scw 	 *
    839       1.7       wiz 	 * Note: This fills in the segments with CPU-relative physical
    840       1.1       scw 	 * addresses. A further call to bus_dmamap_load_raw() (with a
    841       1.3       wiz 	 * DMA map which specifies the same VMEbus address space and
    842       1.1       scw 	 * constraints as the call to here) must be made. The segments
    843       1.3       wiz 	 * of the DMA map will then contain VMEbus-relative physical
    844       1.1       scw 	 * addresses of the memory allocated here.
    845       1.1       scw 	 */
    846       1.1       scw 	return _bus_dmamem_alloc_common(sc->sc_dmat, low, high,
    847       1.1       scw 	    len, 0, bound, segs, nsegs, rsegs, flags);
    848       1.1       scw }
    849       1.1       scw 
    850       1.1       scw void
    851       1.1       scw mvmebus_dmamem_free(vsc, segs, nsegs)
    852       1.1       scw 	void *vsc;
    853       1.1       scw 	bus_dma_segment_t *segs;
    854       1.1       scw 	int nsegs;
    855       1.1       scw {
    856       1.1       scw 	struct mvmebus_softc *sc = vsc;
    857       1.1       scw 
    858       1.1       scw 	bus_dmamem_free(sc->sc_dmat, segs, nsegs);
    859       1.1       scw }
    860       1.1       scw 
    861       1.1       scw int
    862       1.1       scw mvmebus_dmamem_map(t, segs, nsegs, size, kvap, flags)
    863       1.1       scw 	bus_dma_tag_t t;
    864       1.1       scw 	bus_dma_segment_t *segs;
    865       1.1       scw 	int nsegs;
    866       1.1       scw 	size_t size;
    867      1.11  christos 	void **kvap;
    868       1.1       scw 	int flags;
    869       1.1       scw {
    870       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    871       1.1       scw 
    872       1.1       scw 	return bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags);
    873       1.1       scw }
    874       1.1       scw 
    875       1.1       scw void
    876       1.1       scw mvmebus_dmamem_unmap(t, kva, size)
    877       1.1       scw 	bus_dma_tag_t t;
    878      1.11  christos 	void *kva;
    879       1.1       scw 	size_t size;
    880       1.1       scw {
    881       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    882       1.1       scw 
    883       1.1       scw 	bus_dmamem_unmap(sc->sc_dmat, kva, size);
    884       1.1       scw }
    885       1.1       scw 
    886       1.1       scw paddr_t
    887       1.1       scw mvmebus_dmamem_mmap(t, segs, nsegs, offset, prot, flags)
    888       1.1       scw 	bus_dma_tag_t t;
    889       1.1       scw 	bus_dma_segment_t *segs;
    890       1.1       scw 	int nsegs;
    891       1.1       scw 	off_t offset;
    892       1.1       scw 	int prot;
    893       1.1       scw 	int flags;
    894       1.1       scw {
    895       1.1       scw 	struct mvmebus_softc *sc = t->_cookie;
    896       1.1       scw 
    897       1.1       scw 	return bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, offset, prot, flags);
    898       1.1       scw }
    899       1.1       scw 
    900       1.1       scw #ifdef DEBUG
    901       1.1       scw static const char *
    902       1.1       scw mvmebus_mod_string(addr, len, am, ds)
    903       1.1       scw 	vme_addr_t addr;
    904       1.1       scw 	vme_size_t len;
    905       1.1       scw 	vme_am_t am;
    906       1.1       scw 	vme_datasize_t ds;
    907       1.1       scw {
    908       1.1       scw 	static const char *mode[] = {"BLT64)", "DATA)", "PROG)", "BLT32)"};
    909       1.1       scw 	static const char *dsiz[] = {"(", "(D8,", "(D16,", "(D16-D8,",
    910       1.1       scw 	"(D32,", "(D32,D8,", "(D32-D16,", "(D32-D8,"};
    911       1.6       scw 	static const char *adrfmt[] = { "A32:%08x-%08x ", "USR:%08x-%08x ",
    912       1.6       scw 	    "A16:%04x-%04x ", "A24:%06x-%06x " };
    913       1.1       scw 	static char mstring[40];
    914       1.1       scw 
    915       1.8    itojun 	snprintf(mstring, sizeof(mstring),
    916       1.5      matt 	    adrfmt[(am & VME_AM_ADRSIZEMASK) >> VME_AM_ADRSIZESHIFT],
    917       1.5      matt 	    addr, addr + len - 1);
    918       1.9        he 	strlcat(mstring, dsiz[ds & 0x7], sizeof(mstring));
    919       1.1       scw 
    920       1.1       scw 	if (MVMEBUS_AM_HAS_CAP(am)) {
    921       1.1       scw 		if (am & MVMEBUS_AM_CAP_DATA)
    922       1.8    itojun 			strlcat(mstring, "D", sizeof(mstring));
    923       1.1       scw 		if (am & MVMEBUS_AM_CAP_PROG)
    924       1.8    itojun 			strlcat(mstring, "P", sizeof(mstring));
    925       1.1       scw 		if (am & MVMEBUS_AM_CAP_USER)
    926       1.8    itojun 			strlcat(mstring, "U", sizeof(mstring));
    927       1.1       scw 		if (am & MVMEBUS_AM_CAP_SUPER)
    928       1.8    itojun 			strlcat(mstring, "S", sizeof(mstring));
    929       1.1       scw 		if (am & MVMEBUS_AM_CAP_BLK)
    930       1.8    itojun 			strlcat(mstring, "B", sizeof(mstring));
    931       1.1       scw 		if (am & MVMEBUS_AM_CAP_BLKD64)
    932       1.8    itojun 			strlcat(mstring, "6", sizeof(mstring));
    933       1.8    itojun 		strlcat(mstring, ")", sizeof(mstring));
    934       1.1       scw 	} else {
    935       1.8    itojun 		strlcat(mstring, ((am & VME_AM_PRIVMASK) == VME_AM_USER) ?
    936       1.8    itojun 		    "USER," : "SUPER,", sizeof(mstring));
    937       1.8    itojun 		strlcat(mstring, mode[am & VME_AM_MODEMASK], sizeof(mstring));
    938       1.1       scw 	}
    939       1.1       scw 
    940       1.1       scw 	return (mstring);
    941       1.1       scw }
    942       1.1       scw #endif
    943