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mvmebus.c revision 1.14.8.1
      1  1.14.8.1   skrll /*	$NetBSD: mvmebus.c,v 1.14.8.1 2009/04/28 07:35:54 skrll Exp $	*/
      2       1.1     scw 
      3       1.1     scw /*-
      4       1.1     scw  * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc.
      5       1.1     scw  * All rights reserved.
      6       1.1     scw  *
      7       1.1     scw  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1     scw  * by Steve C. Woodford.
      9       1.1     scw  *
     10       1.1     scw  * Redistribution and use in source and binary forms, with or without
     11       1.1     scw  * modification, are permitted provided that the following conditions
     12       1.1     scw  * are met:
     13       1.1     scw  * 1. Redistributions of source code must retain the above copyright
     14       1.1     scw  *    notice, this list of conditions and the following disclaimer.
     15       1.1     scw  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1     scw  *    notice, this list of conditions and the following disclaimer in the
     17       1.1     scw  *    documentation and/or other materials provided with the distribution.
     18       1.1     scw  *
     19       1.1     scw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1     scw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1     scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1     scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1     scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1     scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1     scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1     scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1     scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1     scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1     scw  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1     scw  */
     31       1.4   lukem 
     32       1.4   lukem #include <sys/cdefs.h>
     33  1.14.8.1   skrll __KERNEL_RCSID(0, "$NetBSD: mvmebus.c,v 1.14.8.1 2009/04/28 07:35:54 skrll Exp $");
     34       1.1     scw 
     35       1.1     scw #include <sys/param.h>
     36       1.1     scw #include <sys/kernel.h>
     37       1.1     scw #include <sys/systm.h>
     38       1.1     scw #include <sys/device.h>
     39       1.1     scw #include <sys/malloc.h>
     40       1.1     scw #include <sys/kcore.h>
     41       1.1     scw 
     42      1.12      ad #include <sys/cpu.h>
     43      1.12      ad #include <sys/bus.h>
     44       1.1     scw 
     45       1.1     scw #include <dev/vme/vmereg.h>
     46       1.1     scw #include <dev/vme/vmevar.h>
     47       1.1     scw 
     48       1.1     scw #include <dev/mvme/mvmebus.h>
     49       1.1     scw 
     50       1.1     scw #ifdef DIAGNOSTIC
     51       1.1     scw int	mvmebus_dummy_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
     52       1.1     scw 	    bus_size_t, int, bus_dmamap_t *);
     53       1.1     scw void	mvmebus_dummy_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
     54       1.1     scw int	mvmebus_dummy_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
     55       1.1     scw 	    bus_size_t, bus_dma_segment_t *, int, int *, int);
     56       1.1     scw void	mvmebus_dummy_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
     57       1.1     scw #endif
     58       1.1     scw 
     59       1.1     scw #ifdef DEBUG
     60       1.1     scw static const char *mvmebus_mod_string(vme_addr_t, vme_size_t,
     61       1.1     scw 	    vme_am_t, vme_datasize_t);
     62       1.1     scw #endif
     63       1.1     scw 
     64       1.1     scw static void mvmebus_offboard_ram(struct mvmebus_softc *);
     65       1.1     scw static int mvmebus_dmamap_load_common(struct mvmebus_softc *, bus_dmamap_t);
     66       1.1     scw 
     67       1.1     scw vme_am_t	_mvmebus_am_cap[] = {
     68       1.1     scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_USER,
     69       1.1     scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_USER,
     70       1.1     scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_USER,
     71       1.1     scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_USER,
     72       1.1     scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_SUPER,
     73       1.1     scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_SUPER,
     74       1.1     scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_SUPER,
     75       1.1     scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_SUPER
     76       1.1     scw };
     77       1.1     scw 
     78       1.1     scw const char *mvmebus_irq_name[] = {
     79       1.1     scw 	"vmeirq0", "vmeirq1", "vmeirq2", "vmeirq3",
     80       1.1     scw 	"vmeirq4", "vmeirq5", "vmeirq6", "vmeirq7"
     81       1.1     scw };
     82       1.1     scw 
     83       1.1     scw extern phys_ram_seg_t mem_clusters[0];
     84       1.1     scw extern int mem_cluster_cnt;
     85       1.1     scw 
     86       1.1     scw 
     87       1.1     scw static void
     88  1.14.8.1   skrll mvmebus_offboard_ram(struct mvmebus_softc *sc)
     89       1.1     scw {
     90       1.1     scw 	struct mvmebus_range *svr, *mvr;
     91       1.1     scw 	vme_addr_t start, end, size;
     92       1.1     scw 	int i;
     93       1.1     scw 
     94       1.1     scw 	/*
     95       1.1     scw 	 * If we have any offboard RAM (i.e. a VMEbus RAM board) then
     96       1.1     scw 	 * we need to record its details since it's effectively another
     97       1.1     scw 	 * VMEbus slave image as far as we're concerned.
     98       1.1     scw 	 * The chip-specific backend will have reserved sc->sc_slaves[0]
     99       1.1     scw 	 * for exactly this purpose.
    100       1.1     scw 	 */
    101       1.1     scw 	svr = sc->sc_slaves;
    102       1.1     scw 	if (mem_cluster_cnt < 2) {
    103       1.1     scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    104       1.1     scw 		return;
    105       1.1     scw 	}
    106       1.1     scw 
    107       1.1     scw 	start = mem_clusters[1].start;
    108       1.1     scw 	size = mem_clusters[1].size - 1;
    109       1.1     scw 	end = start + size;
    110       1.1     scw 
    111       1.1     scw 	/*
    112       1.1     scw 	 * Figure out which VMEbus master image the RAM is
    113       1.1     scw 	 * visible through. This will tell us the address
    114       1.1     scw 	 * modifier and datasizes it uses, as well as allowing
    115       1.1     scw 	 * us to calculate its `real' VMEbus address.
    116       1.1     scw 	 *
    117       1.1     scw 	 * XXX FIXME: This is broken if the RAM is mapped through
    118       1.1     scw 	 * a translated address space. For example, on mvme167 it's
    119       1.1     scw 	 * perfectly legal to set up the following A32 mapping:
    120       1.1     scw 	 *
    121       1.1     scw 	 *  vr_locaddr  == 0x80000000
    122       1.1     scw 	 *  vr_vmestart == 0x10000000
    123       1.1     scw 	 *  vr_vmeend   == 0x10ffffff
    124       1.1     scw 	 *
    125       1.1     scw 	 * In this case, RAM at VMEbus address 0x10800000 will appear at local
    126       1.1     scw 	 * address 0x80800000, but we need to set the slave vr_vmestart to
    127       1.1     scw 	 * 0x10800000.
    128       1.1     scw 	 */
    129       1.1     scw 	for (i = 0, mvr = sc->sc_masters; i < sc->sc_nmasters; i++, mvr++) {
    130       1.1     scw 		vme_addr_t vstart = mvr->vr_locstart + mvr->vr_vmestart;
    131       1.1     scw 
    132       1.1     scw 		if (start >= vstart &&
    133       1.1     scw 		    end <= vstart + (mvr->vr_vmeend - mvr->vr_vmestart))
    134       1.1     scw 			break;
    135       1.1     scw 	}
    136       1.1     scw 	if (i == sc->sc_nmasters) {
    137       1.1     scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    138       1.1     scw #ifdef DEBUG
    139       1.1     scw 		printf("%s: No VMEbus master mapping for offboard RAM!\n",
    140      1.13  cegger 		    device_xname(&sc->sc_dev));
    141       1.1     scw #endif
    142       1.1     scw 		return;
    143       1.1     scw 	}
    144       1.1     scw 
    145       1.1     scw 	svr->vr_locstart = start;
    146       1.1     scw 	svr->vr_vmestart = start & mvr->vr_mask;
    147       1.1     scw 	svr->vr_vmeend = svr->vr_vmestart + size;
    148       1.1     scw 	svr->vr_datasize = mvr->vr_datasize;
    149       1.1     scw 	svr->vr_mask = mvr->vr_mask;
    150       1.1     scw 	svr->vr_am = mvr->vr_am & VME_AM_ADRSIZEMASK;
    151       1.1     scw 	svr->vr_am |= MVMEBUS_AM_CAP_DATA  | MVMEBUS_AM_CAP_PROG |
    152       1.1     scw 		      MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER;
    153       1.1     scw }
    154       1.1     scw 
    155       1.1     scw void
    156  1.14.8.1   skrll mvmebus_attach(struct mvmebus_softc *sc)
    157       1.1     scw {
    158       1.1     scw 	struct vmebus_attach_args vaa;
    159       1.1     scw 	int i;
    160       1.1     scw 
    161       1.1     scw 	/* Zap the IRQ reference counts */
    162       1.1     scw 	for (i = 0; i < 8; i++)
    163       1.1     scw 		sc->sc_irqref[i] = 0;
    164       1.1     scw 
    165       1.1     scw 	/* If there's offboard RAM, get its VMEbus slave attributes */
    166       1.1     scw 	mvmebus_offboard_ram(sc);
    167       1.1     scw 
    168       1.1     scw #ifdef DEBUG
    169       1.1     scw 	for (i = 0; i < sc->sc_nmasters; i++) {
    170       1.1     scw 		struct mvmebus_range *vr = &sc->sc_masters[i];
    171       1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    172       1.1     scw 			printf("%s: Master#%d: disabled\n",
    173      1.13  cegger 			    device_xname(&sc->sc_dev), i);
    174       1.1     scw 			continue;
    175       1.1     scw 		}
    176       1.1     scw 		printf("%s: Master#%d: 0x%08lx -> %s\n",
    177      1.13  cegger 		    device_xname(&sc->sc_dev), i,
    178       1.1     scw 		    vr->vr_locstart + (vr->vr_vmestart & vr->vr_mask),
    179       1.1     scw 		    mvmebus_mod_string(vr->vr_vmestart,
    180       1.1     scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    181       1.1     scw 			vr->vr_am, vr->vr_datasize));
    182       1.1     scw 	}
    183       1.1     scw 
    184       1.1     scw 	for (i = 0; i < sc->sc_nslaves; i++) {
    185       1.1     scw 		struct mvmebus_range *vr = &sc->sc_slaves[i];
    186       1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    187       1.1     scw 			printf("%s:  Slave#%d: disabled\n",
    188      1.13  cegger 			    device_xname(&sc->sc_dev), i);
    189       1.1     scw 			continue;
    190       1.1     scw 		}
    191       1.1     scw 		printf("%s:  Slave#%d: 0x%08lx -> %s\n",
    192      1.13  cegger 		    device_xname(&sc->sc_dev), i, vr->vr_locstart,
    193       1.1     scw 		    mvmebus_mod_string(vr->vr_vmestart,
    194       1.1     scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    195       1.1     scw 			vr->vr_am, vr->vr_datasize));
    196       1.1     scw 	}
    197       1.1     scw #endif
    198       1.1     scw 
    199       1.1     scw 	sc->sc_vct.cookie = sc;
    200       1.1     scw 	sc->sc_vct.vct_probe = mvmebus_probe;
    201       1.1     scw 	sc->sc_vct.vct_map = mvmebus_map;
    202       1.1     scw 	sc->sc_vct.vct_unmap = mvmebus_unmap;
    203       1.1     scw 	sc->sc_vct.vct_int_map = mvmebus_intmap;
    204       1.1     scw 	sc->sc_vct.vct_int_evcnt = mvmebus_intr_evcnt;
    205       1.1     scw 	sc->sc_vct.vct_int_establish = mvmebus_intr_establish;
    206       1.1     scw 	sc->sc_vct.vct_int_disestablish = mvmebus_intr_disestablish;
    207       1.1     scw 	sc->sc_vct.vct_dmamap_create = mvmebus_dmamap_create;
    208       1.1     scw 	sc->sc_vct.vct_dmamap_destroy = mvmebus_dmamap_destroy;
    209       1.1     scw 	sc->sc_vct.vct_dmamem_alloc = mvmebus_dmamem_alloc;
    210       1.1     scw 	sc->sc_vct.vct_dmamem_free = mvmebus_dmamem_free;
    211       1.1     scw 
    212       1.1     scw 	sc->sc_mvmedmat._cookie = sc;
    213       1.1     scw 	sc->sc_mvmedmat._dmamap_load = mvmebus_dmamap_load;
    214       1.1     scw 	sc->sc_mvmedmat._dmamap_load_mbuf = mvmebus_dmamap_load_mbuf;
    215       1.1     scw 	sc->sc_mvmedmat._dmamap_load_uio = mvmebus_dmamap_load_uio;
    216       1.1     scw 	sc->sc_mvmedmat._dmamap_load_raw = mvmebus_dmamap_load_raw;
    217       1.1     scw 	sc->sc_mvmedmat._dmamap_unload = mvmebus_dmamap_unload;
    218       1.1     scw 	sc->sc_mvmedmat._dmamap_sync = mvmebus_dmamap_sync;
    219       1.1     scw 	sc->sc_mvmedmat._dmamem_map = mvmebus_dmamem_map;
    220       1.1     scw 	sc->sc_mvmedmat._dmamem_unmap = mvmebus_dmamem_unmap;
    221       1.1     scw 	sc->sc_mvmedmat._dmamem_mmap = mvmebus_dmamem_mmap;
    222       1.1     scw 
    223       1.1     scw #ifdef DIAGNOSTIC
    224       1.1     scw 	sc->sc_mvmedmat._dmamap_create = mvmebus_dummy_dmamap_create;
    225       1.1     scw 	sc->sc_mvmedmat._dmamap_destroy = mvmebus_dummy_dmamap_destroy;
    226       1.1     scw 	sc->sc_mvmedmat._dmamem_alloc = mvmebus_dummy_dmamem_alloc;
    227       1.1     scw 	sc->sc_mvmedmat._dmamem_free = mvmebus_dummy_dmamem_free;
    228       1.1     scw #else
    229       1.1     scw 	sc->sc_mvmedmat._dmamap_create = NULL;
    230       1.1     scw 	sc->sc_mvmedmat._dmamap_destroy = NULL;
    231       1.1     scw 	sc->sc_mvmedmat._dmamem_alloc = NULL;
    232       1.1     scw 	sc->sc_mvmedmat._dmamem_free = NULL;
    233       1.1     scw #endif
    234       1.1     scw 
    235       1.1     scw 	vaa.va_vct = &sc->sc_vct;
    236       1.1     scw 	vaa.va_bdt = &sc->sc_mvmedmat;
    237       1.1     scw 	vaa.va_slaveconfig = NULL;
    238       1.1     scw 
    239       1.1     scw 	config_found(&sc->sc_dev, &vaa, 0);
    240       1.1     scw }
    241       1.1     scw 
    242       1.1     scw int
    243  1.14.8.1   skrll mvmebus_map(void *vsc, vme_addr_t vmeaddr, vme_size_t len, vme_am_t am, vme_datasize_t datasize, vme_swap_t swap, bus_space_tag_t *tag, bus_space_handle_t *handle, vme_mapresc_t *resc)
    244       1.1     scw {
    245       1.1     scw 	struct mvmebus_softc *sc;
    246       1.1     scw 	struct mvmebus_mapresc *mr;
    247       1.1     scw 	struct mvmebus_range *vr;
    248       1.1     scw 	vme_addr_t end;
    249       1.1     scw 	vme_am_t cap, as;
    250       1.1     scw 	paddr_t paddr;
    251       1.1     scw 	int rv, i;
    252       1.1     scw 
    253       1.1     scw 	sc = vsc;
    254       1.1     scw 	end = (vmeaddr + len) - 1;
    255       1.1     scw 	paddr = 0;
    256       1.1     scw 	vr = sc->sc_masters;
    257       1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    258       1.1     scw 	as = am & VME_AM_ADRSIZEMASK;
    259       1.1     scw 
    260       1.1     scw 	for (i = 0; i < sc->sc_nmasters && paddr == 0; i++, vr++) {
    261       1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    262       1.1     scw 			continue;
    263       1.1     scw 
    264       1.1     scw 		if (cap == (vr->vr_am & cap) &&
    265       1.1     scw 		    as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    266       1.1     scw 		    datasize <= vr->vr_datasize &&
    267       1.1     scw 		    vmeaddr >= vr->vr_vmestart && end < vr->vr_vmeend)
    268       1.1     scw 			paddr = vr->vr_locstart + (vmeaddr & vr->vr_mask);
    269       1.1     scw 	}
    270       1.1     scw 	if (paddr == 0)
    271       1.1     scw 		return (ENOMEM);
    272       1.1     scw 
    273       1.1     scw 	rv = bus_space_map(sc->sc_bust, paddr, len, 0, handle);
    274       1.1     scw 	if (rv != 0)
    275       1.1     scw 		return (rv);
    276       1.1     scw 
    277       1.1     scw 	/* Allocate space for the resource tag */
    278       1.1     scw 	if ((mr = malloc(sizeof(*mr), M_DEVBUF, M_NOWAIT)) == NULL) {
    279       1.1     scw 		bus_space_unmap(sc->sc_bust, *handle, len);
    280       1.1     scw 		return (ENOMEM);
    281       1.1     scw 	}
    282       1.1     scw 
    283       1.1     scw 	/* Record the range's details */
    284       1.1     scw 	mr->mr_am = am;
    285       1.1     scw 	mr->mr_datasize = datasize;
    286       1.1     scw 	mr->mr_addr = vmeaddr;
    287       1.1     scw 	mr->mr_size = len;
    288       1.1     scw 	mr->mr_handle = *handle;
    289       1.1     scw 	mr->mr_range = i;
    290       1.1     scw 
    291       1.1     scw 	*tag = sc->sc_bust;
    292       1.1     scw 	*resc = (vme_mapresc_t *) mr;
    293       1.1     scw 
    294       1.1     scw 	return (0);
    295       1.1     scw }
    296       1.1     scw 
    297       1.1     scw /* ARGSUSED */
    298       1.1     scw void
    299  1.14.8.1   skrll mvmebus_unmap(void *vsc, vme_mapresc_t resc)
    300       1.1     scw {
    301       1.1     scw 	struct mvmebus_softc *sc = vsc;
    302       1.1     scw 	struct mvmebus_mapresc *mr = (struct mvmebus_mapresc *) resc;
    303       1.1     scw 
    304       1.1     scw 	bus_space_unmap(sc->sc_bust, mr->mr_handle, mr->mr_size);
    305       1.1     scw 
    306       1.1     scw 	free(mr, M_DEVBUF);
    307       1.1     scw }
    308       1.1     scw 
    309       1.1     scw int
    310  1.14.8.1   skrll mvmebus_probe(void *vsc, vme_addr_t vmeaddr, vme_size_t len, vme_am_t am, vme_datasize_t datasize, int (*callback)(void *, bus_space_tag_t, bus_space_handle_t), void *arg)
    311       1.1     scw {
    312       1.1     scw 	bus_space_tag_t tag;
    313       1.1     scw 	bus_space_handle_t handle;
    314       1.1     scw 	vme_mapresc_t resc;
    315       1.1     scw 	vme_size_t offs;
    316       1.1     scw 	int rv;
    317       1.1     scw 
    318       1.1     scw 	/* Get a temporary mapping to the VMEbus range */
    319       1.1     scw 	rv = mvmebus_map(vsc, vmeaddr, len, am, datasize, 0,
    320       1.1     scw 	    &tag, &handle, &resc);
    321       1.1     scw 	if (rv)
    322       1.1     scw 		return (rv);
    323       1.1     scw 
    324       1.1     scw 	if (callback)
    325       1.1     scw 		rv = (*callback) (arg, tag, handle);
    326       1.1     scw 	else
    327       1.1     scw 		for (offs = 0; offs < len && rv == 0;) {
    328       1.1     scw 			switch (datasize) {
    329       1.1     scw 			case VME_D8:
    330       1.1     scw 				rv = bus_space_peek_1(tag, handle, offs, NULL);
    331       1.1     scw 				offs += 1;
    332       1.1     scw 				break;
    333       1.1     scw 
    334       1.1     scw 			case VME_D16:
    335       1.1     scw 				rv = bus_space_peek_2(tag, handle, offs, NULL);
    336       1.1     scw 				offs += 2;
    337       1.1     scw 				break;
    338       1.1     scw 
    339       1.1     scw 			case VME_D32:
    340       1.1     scw 				rv = bus_space_peek_4(tag, handle, offs, NULL);
    341       1.1     scw 				offs += 4;
    342       1.1     scw 				break;
    343       1.1     scw 			}
    344       1.1     scw 		}
    345       1.1     scw 
    346       1.1     scw 	mvmebus_unmap(vsc, resc);
    347       1.1     scw 
    348       1.1     scw 	return (rv);
    349       1.1     scw }
    350       1.1     scw 
    351       1.1     scw /* ARGSUSED */
    352       1.1     scw int
    353  1.14.8.1   skrll mvmebus_intmap(void *vsc, int level, int vector, vme_intr_handle_t *handlep)
    354       1.1     scw {
    355       1.1     scw 
    356       1.1     scw 	if (level < 1 || level > 7 || vector < 0x80 || vector > 0xff)
    357       1.1     scw 		return (EINVAL);
    358       1.1     scw 
    359       1.1     scw 	/* This is rather gross */
    360       1.1     scw 	*handlep = (void *) (int) ((level << 8) | vector);
    361       1.1     scw 	return (0);
    362       1.1     scw }
    363       1.1     scw 
    364       1.1     scw /* ARGSUSED */
    365       1.1     scw const struct evcnt *
    366  1.14.8.1   skrll mvmebus_intr_evcnt(void *vsc, vme_intr_handle_t handle)
    367       1.1     scw {
    368       1.1     scw 	struct mvmebus_softc *sc = vsc;
    369       1.1     scw 
    370       1.1     scw 	return (&sc->sc_evcnt[(((int) handle) >> 8) - 1]);
    371       1.1     scw }
    372       1.1     scw 
    373       1.1     scw void *
    374  1.14.8.1   skrll mvmebus_intr_establish(void *vsc, vme_intr_handle_t handle, int prior, int (*func)(void *), void *arg)
    375       1.1     scw {
    376       1.1     scw 	struct mvmebus_softc *sc;
    377       1.1     scw 	int level, vector, first;
    378       1.1     scw 
    379       1.1     scw 	sc = vsc;
    380       1.1     scw 
    381       1.1     scw 	/* Extract the interrupt's level and vector */
    382       1.1     scw 	level = ((int) handle) >> 8;
    383       1.1     scw 	vector = ((int) handle) & 0xff;
    384       1.1     scw 
    385       1.1     scw #ifdef DIAGNOSTIC
    386       1.1     scw 	if (vector < 0 || vector > 0xff) {
    387       1.1     scw 		printf("%s: Illegal vector offset: 0x%x\n",
    388      1.13  cegger 		    device_xname(&sc->sc_dev), vector);
    389       1.1     scw 		panic("mvmebus_intr_establish");
    390       1.1     scw 	}
    391       1.1     scw 	if (level < 1 || level > 7) {
    392       1.1     scw 		printf("%s: Illegal interrupt level: %d\n",
    393      1.13  cegger 		    device_xname(&sc->sc_dev), level);
    394       1.1     scw 		panic("mvmebus_intr_establish");
    395       1.1     scw 	}
    396       1.1     scw #endif
    397       1.1     scw 
    398       1.1     scw 	first = (sc->sc_irqref[level]++ == 0);
    399       1.1     scw 
    400       1.1     scw 	(*sc->sc_intr_establish)(sc->sc_chip, prior, level, vector, first,
    401       1.1     scw 	    func, arg, &sc->sc_evcnt[level - 1]);
    402       1.1     scw 
    403       1.1     scw 	return ((void *) handle);
    404       1.1     scw }
    405       1.1     scw 
    406       1.1     scw void
    407  1.14.8.1   skrll mvmebus_intr_disestablish(void *vsc, vme_intr_handle_t handle)
    408       1.1     scw {
    409       1.1     scw 	struct mvmebus_softc *sc;
    410       1.1     scw 	int level, vector, last;
    411       1.1     scw 
    412       1.1     scw 	sc = vsc;
    413       1.1     scw 
    414       1.1     scw 	/* Extract the interrupt's level and vector */
    415       1.1     scw 	level = ((int) handle) >> 8;
    416       1.1     scw 	vector = ((int) handle) & 0xff;
    417       1.1     scw 
    418       1.1     scw #ifdef DIAGNOSTIC
    419       1.1     scw 	if (vector < 0 || vector > 0xff) {
    420       1.1     scw 		printf("%s: Illegal vector offset: 0x%x\n",
    421      1.13  cegger 		    device_xname(&sc->sc_dev), vector);
    422       1.1     scw 		panic("mvmebus_intr_disestablish");
    423       1.1     scw 	}
    424       1.1     scw 	if (level < 1 || level > 7) {
    425       1.1     scw 		printf("%s: Illegal interrupt level: %d\n",
    426      1.13  cegger 		    device_xname(&sc->sc_dev), level);
    427       1.1     scw 		panic("mvmebus_intr_disestablish");
    428       1.1     scw 	}
    429       1.1     scw 	if (sc->sc_irqref[level] == 0) {
    430       1.1     scw 		printf("%s: VMEirq#%d: Reference count already zero!\n",
    431      1.13  cegger 		    device_xname(&sc->sc_dev), level);
    432       1.1     scw 		panic("mvmebus_intr_disestablish");
    433       1.1     scw 	}
    434       1.1     scw #endif
    435       1.1     scw 
    436       1.1     scw 	last = (--(sc->sc_irqref[level]) == 0);
    437       1.1     scw 
    438       1.1     scw 	(*sc->sc_intr_disestablish)(sc->sc_chip, level, vector, last,
    439       1.1     scw 	    &sc->sc_evcnt[level - 1]);
    440       1.1     scw }
    441       1.1     scw 
    442       1.1     scw #ifdef DIAGNOSTIC
    443       1.1     scw /* ARGSUSED */
    444       1.1     scw int
    445  1.14.8.1   skrll mvmebus_dummy_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegs, bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
    446       1.1     scw {
    447       1.1     scw 
    448       1.1     scw 	panic("Must use vme_dmamap_create() in place of bus_dmamap_create()");
    449       1.1     scw 	return (0);	/* Shutup the compiler */
    450       1.1     scw }
    451       1.1     scw 
    452       1.1     scw /* ARGSUSED */
    453       1.1     scw void
    454  1.14.8.1   skrll mvmebus_dummy_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
    455       1.1     scw {
    456       1.1     scw 
    457       1.1     scw 	panic("Must use vme_dmamap_destroy() in place of bus_dmamap_destroy()");
    458       1.1     scw }
    459       1.1     scw #endif
    460       1.1     scw 
    461       1.1     scw /* ARGSUSED */
    462       1.1     scw int
    463       1.1     scw mvmebus_dmamap_create(vsc, len, am, datasize, swap, nsegs,
    464       1.1     scw     segsz, bound, flags, mapp)
    465       1.1     scw 	void *vsc;
    466       1.1     scw 	vme_size_t len;
    467       1.1     scw 	vme_am_t am;
    468       1.1     scw 	vme_datasize_t datasize;
    469       1.1     scw 	vme_swap_t swap;
    470       1.1     scw 	int nsegs;
    471       1.1     scw 	vme_size_t segsz;
    472       1.1     scw 	vme_addr_t bound;
    473       1.1     scw 	int flags;
    474       1.1     scw 	bus_dmamap_t *mapp;
    475       1.1     scw {
    476       1.1     scw 	struct mvmebus_softc *sc = vsc;
    477       1.1     scw 	struct mvmebus_dmamap *vmap;
    478       1.1     scw 	struct mvmebus_range *vr;
    479       1.1     scw 	vme_am_t cap, as;
    480       1.1     scw 	int i, rv;
    481       1.1     scw 
    482       1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    483       1.1     scw 	as = am & VME_AM_ADRSIZEMASK;
    484       1.1     scw 
    485       1.1     scw 	/*
    486       1.1     scw 	 * Verify that we even stand a chance of satisfying
    487       1.1     scw 	 * the VMEbus address space and datasize requested.
    488       1.1     scw 	 */
    489       1.1     scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    490       1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    491       1.1     scw 			continue;
    492       1.1     scw 
    493       1.1     scw 		if (as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    494       1.1     scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    495       1.1     scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    496       1.1     scw 			break;
    497       1.1     scw 	}
    498       1.1     scw 
    499       1.1     scw 	if (i == sc->sc_nslaves)
    500       1.1     scw 		return (EINVAL);
    501       1.1     scw 
    502       1.1     scw 	if ((vmap = malloc(sizeof(*vmap), M_DMAMAP,
    503       1.1     scw 	    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
    504       1.1     scw 		return (ENOMEM);
    505       1.1     scw 
    506       1.1     scw 
    507       1.1     scw 	rv = bus_dmamap_create(sc->sc_dmat, len, nsegs, segsz,
    508       1.1     scw 	    bound, flags, mapp);
    509       1.1     scw 	if (rv != 0) {
    510       1.1     scw 		free(vmap, M_DMAMAP);
    511       1.1     scw 		return (rv);
    512       1.1     scw 	}
    513       1.1     scw 
    514       1.1     scw 	vmap->vm_am = am;
    515       1.1     scw 	vmap->vm_datasize = datasize;
    516       1.1     scw 	vmap->vm_swap = swap;
    517       1.1     scw 	vmap->vm_slave = vr;
    518       1.1     scw 
    519       1.1     scw 	(*mapp)->_dm_cookie = vmap;
    520       1.1     scw 
    521       1.1     scw 	return (0);
    522       1.1     scw }
    523       1.1     scw 
    524       1.1     scw void
    525  1.14.8.1   skrll mvmebus_dmamap_destroy(void *vsc, bus_dmamap_t map)
    526       1.1     scw {
    527       1.1     scw 	struct mvmebus_softc *sc = vsc;
    528       1.1     scw 
    529       1.1     scw 	free(map->_dm_cookie, M_DMAMAP);
    530       1.1     scw 	bus_dmamap_destroy(sc->sc_dmat, map);
    531       1.1     scw }
    532       1.1     scw 
    533       1.1     scw static int
    534  1.14.8.1   skrll mvmebus_dmamap_load_common(struct mvmebus_softc *sc, bus_dmamap_t map)
    535       1.1     scw {
    536       1.1     scw 	struct mvmebus_dmamap *vmap = map->_dm_cookie;
    537       1.1     scw 	struct mvmebus_range *vr = vmap->vm_slave;
    538       1.1     scw 	bus_dma_segment_t *ds;
    539       1.1     scw 	vme_am_t cap, am;
    540       1.1     scw 	int i;
    541       1.1     scw 
    542       1.1     scw 	cap = MVMEBUS_AM2CAP(vmap->vm_am);
    543       1.1     scw 	am = vmap->vm_am & VME_AM_ADRSIZEMASK;
    544       1.1     scw 
    545       1.1     scw 	/*
    546       1.1     scw 	 * Traverse the list of segments which make up this map, and
    547       1.7     wiz 	 * convert the CPU-relative addresses therein to VMEbus addresses.
    548       1.1     scw 	 */
    549       1.1     scw 	for (ds = &map->dm_segs[0]; ds < &map->dm_segs[map->dm_nsegs]; ds++) {
    550       1.1     scw 		/*
    551       1.1     scw 		 * First, see if this map's slave image can access the
    552       1.1     scw 		 * segment, otherwise we have to waste time scanning all
    553       1.1     scw 		 * the slave images.
    554       1.1     scw 		 */
    555       1.1     scw 		vr = vmap->vm_slave;
    556       1.1     scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    557       1.1     scw 		    cap == (vr->vr_am & cap) &&
    558       1.1     scw 		    vmap->vm_datasize <= vr->vr_datasize &&
    559       1.1     scw 		    ds->_ds_cpuaddr >= vr->vr_locstart &&
    560       1.1     scw 		    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    561       1.1     scw 			goto found;
    562       1.1     scw 
    563       1.1     scw 		for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    564       1.1     scw 			if (vr->vr_am == MVMEBUS_AM_DISABLED)
    565       1.1     scw 				continue;
    566       1.1     scw 
    567       1.1     scw 			/*
    568       1.1     scw 			 * Filter out any slave images which don't have the
    569       1.1     scw 			 * same VMEbus address modifier and datasize as
    570       1.1     scw 			 * this DMA map, and those which don't cover the
    571       1.1     scw 			 * physical address region containing the segment.
    572       1.1     scw 			 */
    573       1.1     scw 			if (vr != vmap->vm_slave &&
    574       1.1     scw 			    am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    575       1.1     scw 			    cap == (vr->vr_am & cap) &&
    576       1.1     scw 			    vmap->vm_datasize <= vr->vr_datasize &&
    577       1.1     scw 			    ds->_ds_cpuaddr >= vr->vr_locstart &&
    578       1.1     scw 			    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    579       1.1     scw 				break;
    580       1.1     scw 		}
    581       1.1     scw 
    582       1.1     scw 		/*
    583       1.1     scw 		 * Did we find an applicable slave image which covers this
    584       1.1     scw 		 * segment?
    585       1.1     scw 		 */
    586       1.1     scw 		if (i == sc->sc_nslaves) {
    587       1.1     scw 			/*
    588       1.1     scw 			 * XXX TODO:
    589       1.1     scw 			 *
    590       1.1     scw 			 * Bounce this segment via a bounce buffer allocated
    591       1.1     scw 			 * from this DMA map.
    592       1.1     scw 			 */
    593       1.1     scw 			printf("mvmebus_dmamap_load_common: bounce needed!\n");
    594       1.1     scw 			return (EINVAL);
    595       1.1     scw 		}
    596       1.1     scw 
    597       1.1     scw found:
    598       1.1     scw 		/*
    599       1.1     scw 		 * Generate the VMEbus address of this segment
    600       1.1     scw 		 */
    601       1.1     scw 		ds->ds_addr = (ds->_ds_cpuaddr - vr->vr_locstart) +
    602       1.1     scw 		    vr->vr_vmestart;
    603       1.1     scw 	}
    604       1.1     scw 
    605       1.1     scw 	return (0);
    606       1.1     scw }
    607       1.1     scw 
    608       1.1     scw int
    609  1.14.8.1   skrll mvmebus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, bus_size_t buflen, struct proc *p, int flags)
    610       1.1     scw {
    611       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    612       1.1     scw 	int rv;
    613       1.1     scw 
    614       1.1     scw 	rv = bus_dmamap_load(sc->sc_dmat, map, buf, buflen, p, flags);
    615       1.1     scw 	if (rv != 0)
    616       1.1     scw 		return rv;
    617       1.1     scw 
    618       1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    619       1.1     scw }
    620       1.1     scw 
    621       1.1     scw int
    622  1.14.8.1   skrll mvmebus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *chain, int flags)
    623       1.1     scw {
    624       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    625       1.1     scw 	int rv;
    626       1.1     scw 
    627       1.1     scw 	rv = bus_dmamap_load_mbuf(sc->sc_dmat, map, chain, flags);
    628       1.1     scw 	if (rv != 0)
    629       1.1     scw 		return rv;
    630       1.1     scw 
    631       1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    632       1.1     scw }
    633       1.1     scw 
    634       1.1     scw int
    635  1.14.8.1   skrll mvmebus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio, int flags)
    636       1.1     scw {
    637       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    638       1.1     scw 	int rv;
    639       1.1     scw 
    640       1.1     scw 	rv = bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags);
    641       1.1     scw 	if (rv != 0)
    642       1.1     scw 		return rv;
    643       1.1     scw 
    644       1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    645       1.1     scw }
    646       1.1     scw 
    647       1.1     scw int
    648  1.14.8.1   skrll mvmebus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
    649       1.1     scw {
    650       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    651       1.1     scw 	int rv;
    652       1.1     scw 
    653       1.1     scw 	/*
    654       1.1     scw 	 * mvmebus_dmamem_alloc() will ensure that the physical memory
    655       1.1     scw 	 * backing these segments is 100% accessible in at least one
    656       1.1     scw 	 * of the board's VMEbus slave images.
    657       1.1     scw 	 */
    658       1.1     scw 	rv = bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags);
    659       1.1     scw 	if (rv != 0)
    660       1.1     scw 		return rv;
    661       1.1     scw 
    662       1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    663       1.1     scw }
    664       1.1     scw 
    665       1.1     scw void
    666  1.14.8.1   skrll mvmebus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
    667       1.1     scw {
    668       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    669       1.1     scw 
    670       1.1     scw 	/* XXX Deal with bounce buffers */
    671       1.1     scw 
    672       1.1     scw 	bus_dmamap_unload(sc->sc_dmat, map);
    673       1.1     scw }
    674       1.1     scw 
    675       1.1     scw void
    676  1.14.8.1   skrll mvmebus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, bus_size_t len, int ops)
    677       1.1     scw {
    678       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    679       1.1     scw 
    680       1.1     scw 	/* XXX Bounce buffers */
    681       1.1     scw 
    682       1.1     scw 	bus_dmamap_sync(sc->sc_dmat, map, offset, len, ops);
    683       1.1     scw }
    684       1.1     scw 
    685       1.1     scw #ifdef DIAGNOSTIC
    686       1.1     scw /* ARGSUSED */
    687       1.1     scw int
    688  1.14.8.1   skrll mvmebus_dummy_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t align, bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)
    689       1.1     scw {
    690       1.1     scw 
    691       1.2  provos 	panic("Must use vme_dmamem_alloc() in place of bus_dmamem_alloc()");
    692       1.1     scw }
    693       1.1     scw 
    694       1.1     scw /* ARGSUSED */
    695       1.1     scw void
    696  1.14.8.1   skrll mvmebus_dummy_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
    697       1.1     scw {
    698       1.1     scw 
    699       1.1     scw 	panic("Must use vme_dmamem_free() in place of bus_dmamem_free()");
    700       1.1     scw }
    701       1.1     scw #endif
    702       1.1     scw 
    703       1.1     scw /* ARGSUSED */
    704       1.1     scw int
    705  1.14.8.1   skrll mvmebus_dmamem_alloc(void *vsc, vme_size_t len, vme_am_t am, vme_datasize_t datasize, vme_swap_t swap, bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)
    706       1.1     scw {
    707       1.1     scw 	extern paddr_t avail_start;
    708       1.1     scw 	struct mvmebus_softc *sc = vsc;
    709       1.1     scw 	struct mvmebus_range *vr;
    710       1.1     scw 	bus_addr_t low, high;
    711       1.1     scw 	bus_size_t bound;
    712       1.1     scw 	vme_am_t cap;
    713       1.1     scw 	int i;
    714       1.1     scw 
    715       1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    716       1.1     scw 	am &= VME_AM_ADRSIZEMASK;
    717       1.1     scw 
    718       1.1     scw 	/*
    719       1.1     scw 	 * Find a slave mapping in the requested VMEbus address space.
    720       1.1     scw 	 */
    721       1.1     scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    722       1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    723       1.1     scw 			continue;
    724       1.1     scw 
    725       1.1     scw 		if (i == 0 && (flags & BUS_DMA_ONBOARD_RAM) != 0)
    726       1.1     scw 			continue;
    727       1.1     scw 
    728       1.1     scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    729       1.1     scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    730       1.1     scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    731       1.1     scw 			break;
    732       1.1     scw 	}
    733       1.1     scw 	if (i == sc->sc_nslaves)
    734       1.1     scw 		return (EINVAL);
    735       1.1     scw 
    736       1.1     scw 	/*
    737       1.1     scw 	 * Set up the constraints so we can allocate physical memory which
    738       1.1     scw 	 * is visible in the requested address space
    739       1.1     scw 	 */
    740       1.1     scw 	low = max(vr->vr_locstart, avail_start);
    741       1.1     scw 	high = vr->vr_locstart + (vr->vr_vmeend - vr->vr_vmestart) + 1;
    742       1.1     scw 	bound = (bus_size_t) vr->vr_mask + 1;
    743       1.1     scw 
    744       1.1     scw 	/*
    745       1.1     scw 	 * Allocate physical memory.
    746       1.1     scw 	 *
    747       1.7     wiz 	 * Note: This fills in the segments with CPU-relative physical
    748       1.1     scw 	 * addresses. A further call to bus_dmamap_load_raw() (with a
    749       1.3     wiz 	 * DMA map which specifies the same VMEbus address space and
    750       1.1     scw 	 * constraints as the call to here) must be made. The segments
    751       1.3     wiz 	 * of the DMA map will then contain VMEbus-relative physical
    752       1.1     scw 	 * addresses of the memory allocated here.
    753       1.1     scw 	 */
    754       1.1     scw 	return _bus_dmamem_alloc_common(sc->sc_dmat, low, high,
    755       1.1     scw 	    len, 0, bound, segs, nsegs, rsegs, flags);
    756       1.1     scw }
    757       1.1     scw 
    758       1.1     scw void
    759  1.14.8.1   skrll mvmebus_dmamem_free(void *vsc, bus_dma_segment_t *segs, int nsegs)
    760       1.1     scw {
    761       1.1     scw 	struct mvmebus_softc *sc = vsc;
    762       1.1     scw 
    763       1.1     scw 	bus_dmamem_free(sc->sc_dmat, segs, nsegs);
    764       1.1     scw }
    765       1.1     scw 
    766       1.1     scw int
    767  1.14.8.1   skrll mvmebus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, size_t size, void **kvap, int flags)
    768       1.1     scw {
    769       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    770       1.1     scw 
    771       1.1     scw 	return bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags);
    772       1.1     scw }
    773       1.1     scw 
    774       1.1     scw void
    775  1.14.8.1   skrll mvmebus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)
    776       1.1     scw {
    777       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    778       1.1     scw 
    779       1.1     scw 	bus_dmamem_unmap(sc->sc_dmat, kva, size);
    780       1.1     scw }
    781       1.1     scw 
    782       1.1     scw paddr_t
    783  1.14.8.1   skrll mvmebus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t offset, int prot, int flags)
    784       1.1     scw {
    785       1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    786       1.1     scw 
    787       1.1     scw 	return bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, offset, prot, flags);
    788       1.1     scw }
    789       1.1     scw 
    790       1.1     scw #ifdef DEBUG
    791       1.1     scw static const char *
    792  1.14.8.1   skrll mvmebus_mod_string(vme_addr_t addr, vme_size_t len, vme_am_t am, vme_datasize_t ds)
    793       1.1     scw {
    794       1.1     scw 	static const char *mode[] = {"BLT64)", "DATA)", "PROG)", "BLT32)"};
    795       1.1     scw 	static const char *dsiz[] = {"(", "(D8,", "(D16,", "(D16-D8,",
    796       1.1     scw 	"(D32,", "(D32,D8,", "(D32-D16,", "(D32-D8,"};
    797       1.6     scw 	static const char *adrfmt[] = { "A32:%08x-%08x ", "USR:%08x-%08x ",
    798       1.6     scw 	    "A16:%04x-%04x ", "A24:%06x-%06x " };
    799       1.1     scw 	static char mstring[40];
    800       1.1     scw 
    801       1.8  itojun 	snprintf(mstring, sizeof(mstring),
    802       1.5    matt 	    adrfmt[(am & VME_AM_ADRSIZEMASK) >> VME_AM_ADRSIZESHIFT],
    803       1.5    matt 	    addr, addr + len - 1);
    804       1.9      he 	strlcat(mstring, dsiz[ds & 0x7], sizeof(mstring));
    805       1.1     scw 
    806       1.1     scw 	if (MVMEBUS_AM_HAS_CAP(am)) {
    807       1.1     scw 		if (am & MVMEBUS_AM_CAP_DATA)
    808       1.8  itojun 			strlcat(mstring, "D", sizeof(mstring));
    809       1.1     scw 		if (am & MVMEBUS_AM_CAP_PROG)
    810       1.8  itojun 			strlcat(mstring, "P", sizeof(mstring));
    811       1.1     scw 		if (am & MVMEBUS_AM_CAP_USER)
    812       1.8  itojun 			strlcat(mstring, "U", sizeof(mstring));
    813       1.1     scw 		if (am & MVMEBUS_AM_CAP_SUPER)
    814       1.8  itojun 			strlcat(mstring, "S", sizeof(mstring));
    815       1.1     scw 		if (am & MVMEBUS_AM_CAP_BLK)
    816       1.8  itojun 			strlcat(mstring, "B", sizeof(mstring));
    817       1.1     scw 		if (am & MVMEBUS_AM_CAP_BLKD64)
    818       1.8  itojun 			strlcat(mstring, "6", sizeof(mstring));
    819       1.8  itojun 		strlcat(mstring, ")", sizeof(mstring));
    820       1.1     scw 	} else {
    821       1.8  itojun 		strlcat(mstring, ((am & VME_AM_PRIVMASK) == VME_AM_USER) ?
    822       1.8  itojun 		    "USER," : "SUPER,", sizeof(mstring));
    823       1.8  itojun 		strlcat(mstring, mode[am & VME_AM_MODEMASK], sizeof(mstring));
    824       1.1     scw 	}
    825       1.1     scw 
    826       1.1     scw 	return (mstring);
    827       1.1     scw }
    828       1.1     scw #endif
    829