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mvmebus.c revision 1.5
      1  1.5    matt /*	$NetBSD: mvmebus.c,v 1.5 2003/10/28 18:21:49 matt Exp $	*/
      2  1.1     scw 
      3  1.1     scw /*-
      4  1.1     scw  * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc.
      5  1.1     scw  * All rights reserved.
      6  1.1     scw  *
      7  1.1     scw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     scw  * by Steve C. Woodford.
      9  1.1     scw  *
     10  1.1     scw  * Redistribution and use in source and binary forms, with or without
     11  1.1     scw  * modification, are permitted provided that the following conditions
     12  1.1     scw  * are met:
     13  1.1     scw  * 1. Redistributions of source code must retain the above copyright
     14  1.1     scw  *    notice, this list of conditions and the following disclaimer.
     15  1.1     scw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     scw  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     scw  *    documentation and/or other materials provided with the distribution.
     18  1.1     scw  * 3. All advertising materials mentioning features or use of this software
     19  1.1     scw  *    must display the following acknowledgement:
     20  1.1     scw  *        This product includes software developed by the NetBSD
     21  1.1     scw  *        Foundation, Inc. and its contributors.
     22  1.1     scw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1     scw  *    contributors may be used to endorse or promote products derived
     24  1.1     scw  *    from this software without specific prior written permission.
     25  1.1     scw  *
     26  1.1     scw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1     scw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1     scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1     scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1     scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1     scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1     scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1     scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1     scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1     scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1     scw  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1     scw  */
     38  1.4   lukem 
     39  1.4   lukem #include <sys/cdefs.h>
     40  1.5    matt __KERNEL_RCSID(0, "$NetBSD: mvmebus.c,v 1.5 2003/10/28 18:21:49 matt Exp $");
     41  1.1     scw 
     42  1.1     scw #include <sys/param.h>
     43  1.1     scw #include <sys/kernel.h>
     44  1.1     scw #include <sys/systm.h>
     45  1.1     scw #include <sys/device.h>
     46  1.1     scw #include <sys/malloc.h>
     47  1.1     scw #include <sys/kcore.h>
     48  1.1     scw 
     49  1.1     scw #include <machine/cpu.h>
     50  1.1     scw #include <machine/bus.h>
     51  1.1     scw 
     52  1.1     scw #include <dev/vme/vmereg.h>
     53  1.1     scw #include <dev/vme/vmevar.h>
     54  1.1     scw 
     55  1.1     scw #include <dev/mvme/mvmebus.h>
     56  1.1     scw 
     57  1.1     scw #ifdef DIAGNOSTIC
     58  1.1     scw int	mvmebus_dummy_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
     59  1.1     scw 	    bus_size_t, int, bus_dmamap_t *);
     60  1.1     scw void	mvmebus_dummy_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
     61  1.1     scw int	mvmebus_dummy_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
     62  1.1     scw 	    bus_size_t, bus_dma_segment_t *, int, int *, int);
     63  1.1     scw void	mvmebus_dummy_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
     64  1.1     scw #endif
     65  1.1     scw 
     66  1.1     scw #ifdef DEBUG
     67  1.1     scw static const char *mvmebus_mod_string(vme_addr_t, vme_size_t,
     68  1.1     scw 	    vme_am_t, vme_datasize_t);
     69  1.1     scw #endif
     70  1.1     scw 
     71  1.1     scw static void mvmebus_offboard_ram(struct mvmebus_softc *);
     72  1.1     scw static int mvmebus_dmamap_load_common(struct mvmebus_softc *, bus_dmamap_t);
     73  1.1     scw 
     74  1.1     scw vme_am_t	_mvmebus_am_cap[] = {
     75  1.1     scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_USER,
     76  1.1     scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_USER,
     77  1.1     scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_USER,
     78  1.1     scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_USER,
     79  1.1     scw 	MVMEBUS_AM_CAP_BLKD64 | MVMEBUS_AM_CAP_SUPER,
     80  1.1     scw 	MVMEBUS_AM_CAP_DATA   | MVMEBUS_AM_CAP_SUPER,
     81  1.1     scw 	MVMEBUS_AM_CAP_PROG   | MVMEBUS_AM_CAP_SUPER,
     82  1.1     scw 	MVMEBUS_AM_CAP_BLK    | MVMEBUS_AM_CAP_SUPER
     83  1.1     scw };
     84  1.1     scw 
     85  1.1     scw const char *mvmebus_irq_name[] = {
     86  1.1     scw 	"vmeirq0", "vmeirq1", "vmeirq2", "vmeirq3",
     87  1.1     scw 	"vmeirq4", "vmeirq5", "vmeirq6", "vmeirq7"
     88  1.1     scw };
     89  1.1     scw 
     90  1.1     scw extern phys_ram_seg_t mem_clusters[0];
     91  1.1     scw extern int mem_cluster_cnt;
     92  1.1     scw 
     93  1.1     scw 
     94  1.1     scw static void
     95  1.1     scw mvmebus_offboard_ram(sc)
     96  1.1     scw 	struct mvmebus_softc *sc;
     97  1.1     scw {
     98  1.1     scw 	struct mvmebus_range *svr, *mvr;
     99  1.1     scw 	vme_addr_t start, end, size;
    100  1.1     scw 	int i;
    101  1.1     scw 
    102  1.1     scw 	/*
    103  1.1     scw 	 * If we have any offboard RAM (i.e. a VMEbus RAM board) then
    104  1.1     scw 	 * we need to record its details since it's effectively another
    105  1.1     scw 	 * VMEbus slave image as far as we're concerned.
    106  1.1     scw 	 * The chip-specific backend will have reserved sc->sc_slaves[0]
    107  1.1     scw 	 * for exactly this purpose.
    108  1.1     scw 	 */
    109  1.1     scw 	svr = sc->sc_slaves;
    110  1.1     scw 	if (mem_cluster_cnt < 2) {
    111  1.1     scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    112  1.1     scw 		return;
    113  1.1     scw 	}
    114  1.1     scw 
    115  1.1     scw 	start = mem_clusters[1].start;
    116  1.1     scw 	size = mem_clusters[1].size - 1;
    117  1.1     scw 	end = start + size;
    118  1.1     scw 
    119  1.1     scw 	/*
    120  1.1     scw 	 * Figure out which VMEbus master image the RAM is
    121  1.1     scw 	 * visible through. This will tell us the address
    122  1.1     scw 	 * modifier and datasizes it uses, as well as allowing
    123  1.1     scw 	 * us to calculate its `real' VMEbus address.
    124  1.1     scw 	 *
    125  1.1     scw 	 * XXX FIXME: This is broken if the RAM is mapped through
    126  1.1     scw 	 * a translated address space. For example, on mvme167 it's
    127  1.1     scw 	 * perfectly legal to set up the following A32 mapping:
    128  1.1     scw 	 *
    129  1.1     scw 	 *  vr_locaddr  == 0x80000000
    130  1.1     scw 	 *  vr_vmestart == 0x10000000
    131  1.1     scw 	 *  vr_vmeend   == 0x10ffffff
    132  1.1     scw 	 *
    133  1.1     scw 	 * In this case, RAM at VMEbus address 0x10800000 will appear at local
    134  1.1     scw 	 * address 0x80800000, but we need to set the slave vr_vmestart to
    135  1.1     scw 	 * 0x10800000.
    136  1.1     scw 	 */
    137  1.1     scw 	for (i = 0, mvr = sc->sc_masters; i < sc->sc_nmasters; i++, mvr++) {
    138  1.1     scw 		vme_addr_t vstart = mvr->vr_locstart + mvr->vr_vmestart;
    139  1.1     scw 
    140  1.1     scw 		if (start >= vstart &&
    141  1.1     scw 		    end <= vstart + (mvr->vr_vmeend - mvr->vr_vmestart))
    142  1.1     scw 			break;
    143  1.1     scw 	}
    144  1.1     scw 	if (i == sc->sc_nmasters) {
    145  1.1     scw 		svr->vr_am = MVMEBUS_AM_DISABLED;
    146  1.1     scw #ifdef DEBUG
    147  1.1     scw 		printf("%s: No VMEbus master mapping for offboard RAM!\n",
    148  1.1     scw 		    sc->sc_dev.dv_xname);
    149  1.1     scw #endif
    150  1.1     scw 		return;
    151  1.1     scw 	}
    152  1.1     scw 
    153  1.1     scw 	svr->vr_locstart = start;
    154  1.1     scw 	svr->vr_vmestart = start & mvr->vr_mask;
    155  1.1     scw 	svr->vr_vmeend = svr->vr_vmestart + size;
    156  1.1     scw 	svr->vr_datasize = mvr->vr_datasize;
    157  1.1     scw 	svr->vr_mask = mvr->vr_mask;
    158  1.1     scw 	svr->vr_am = mvr->vr_am & VME_AM_ADRSIZEMASK;
    159  1.1     scw 	svr->vr_am |= MVMEBUS_AM_CAP_DATA  | MVMEBUS_AM_CAP_PROG |
    160  1.1     scw 		      MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER;
    161  1.1     scw }
    162  1.1     scw 
    163  1.1     scw void
    164  1.1     scw mvmebus_attach(sc)
    165  1.1     scw 	struct mvmebus_softc *sc;
    166  1.1     scw {
    167  1.1     scw 	struct vmebus_attach_args vaa;
    168  1.1     scw 	int i;
    169  1.1     scw 
    170  1.1     scw 	/* Zap the IRQ reference counts */
    171  1.1     scw 	for (i = 0; i < 8; i++)
    172  1.1     scw 		sc->sc_irqref[i] = 0;
    173  1.1     scw 
    174  1.1     scw 	/* If there's offboard RAM, get its VMEbus slave attributes */
    175  1.1     scw 	mvmebus_offboard_ram(sc);
    176  1.1     scw 
    177  1.1     scw #ifdef DEBUG
    178  1.1     scw 	for (i = 0; i < sc->sc_nmasters; i++) {
    179  1.1     scw 		struct mvmebus_range *vr = &sc->sc_masters[i];
    180  1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    181  1.1     scw 			printf("%s: Master#%d: disabled\n",
    182  1.1     scw 			    sc->sc_dev.dv_xname, i);
    183  1.1     scw 			continue;
    184  1.1     scw 		}
    185  1.1     scw 		printf("%s: Master#%d: 0x%08lx -> %s\n",
    186  1.1     scw 		    sc->sc_dev.dv_xname, i,
    187  1.1     scw 		    vr->vr_locstart + (vr->vr_vmestart & vr->vr_mask),
    188  1.1     scw 		    mvmebus_mod_string(vr->vr_vmestart,
    189  1.1     scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    190  1.1     scw 			vr->vr_am, vr->vr_datasize));
    191  1.1     scw 	}
    192  1.1     scw 
    193  1.1     scw 	for (i = 0; i < sc->sc_nslaves; i++) {
    194  1.1     scw 		struct mvmebus_range *vr = &sc->sc_slaves[i];
    195  1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED) {
    196  1.1     scw 			printf("%s:  Slave#%d: disabled\n",
    197  1.1     scw 			    sc->sc_dev.dv_xname, i);
    198  1.1     scw 			continue;
    199  1.1     scw 		}
    200  1.1     scw 		printf("%s:  Slave#%d: 0x%08lx -> %s\n",
    201  1.1     scw 		    sc->sc_dev.dv_xname, i, vr->vr_locstart,
    202  1.1     scw 		    mvmebus_mod_string(vr->vr_vmestart,
    203  1.1     scw 			(vr->vr_vmeend - vr->vr_vmestart) + 1,
    204  1.1     scw 			vr->vr_am, vr->vr_datasize));
    205  1.1     scw 	}
    206  1.1     scw #endif
    207  1.1     scw 
    208  1.1     scw 	sc->sc_vct.cookie = sc;
    209  1.1     scw 	sc->sc_vct.vct_probe = mvmebus_probe;
    210  1.1     scw 	sc->sc_vct.vct_map = mvmebus_map;
    211  1.1     scw 	sc->sc_vct.vct_unmap = mvmebus_unmap;
    212  1.1     scw 	sc->sc_vct.vct_int_map = mvmebus_intmap;
    213  1.1     scw 	sc->sc_vct.vct_int_evcnt = mvmebus_intr_evcnt;
    214  1.1     scw 	sc->sc_vct.vct_int_establish = mvmebus_intr_establish;
    215  1.1     scw 	sc->sc_vct.vct_int_disestablish = mvmebus_intr_disestablish;
    216  1.1     scw 	sc->sc_vct.vct_dmamap_create = mvmebus_dmamap_create;
    217  1.1     scw 	sc->sc_vct.vct_dmamap_destroy = mvmebus_dmamap_destroy;
    218  1.1     scw 	sc->sc_vct.vct_dmamem_alloc = mvmebus_dmamem_alloc;
    219  1.1     scw 	sc->sc_vct.vct_dmamem_free = mvmebus_dmamem_free;
    220  1.1     scw 
    221  1.1     scw 	sc->sc_mvmedmat._cookie = sc;
    222  1.1     scw 	sc->sc_mvmedmat._dmamap_load = mvmebus_dmamap_load;
    223  1.1     scw 	sc->sc_mvmedmat._dmamap_load_mbuf = mvmebus_dmamap_load_mbuf;
    224  1.1     scw 	sc->sc_mvmedmat._dmamap_load_uio = mvmebus_dmamap_load_uio;
    225  1.1     scw 	sc->sc_mvmedmat._dmamap_load_raw = mvmebus_dmamap_load_raw;
    226  1.1     scw 	sc->sc_mvmedmat._dmamap_unload = mvmebus_dmamap_unload;
    227  1.1     scw 	sc->sc_mvmedmat._dmamap_sync = mvmebus_dmamap_sync;
    228  1.1     scw 	sc->sc_mvmedmat._dmamem_map = mvmebus_dmamem_map;
    229  1.1     scw 	sc->sc_mvmedmat._dmamem_unmap = mvmebus_dmamem_unmap;
    230  1.1     scw 	sc->sc_mvmedmat._dmamem_mmap = mvmebus_dmamem_mmap;
    231  1.1     scw 
    232  1.1     scw #ifdef DIAGNOSTIC
    233  1.1     scw 	sc->sc_mvmedmat._dmamap_create = mvmebus_dummy_dmamap_create;
    234  1.1     scw 	sc->sc_mvmedmat._dmamap_destroy = mvmebus_dummy_dmamap_destroy;
    235  1.1     scw 	sc->sc_mvmedmat._dmamem_alloc = mvmebus_dummy_dmamem_alloc;
    236  1.1     scw 	sc->sc_mvmedmat._dmamem_free = mvmebus_dummy_dmamem_free;
    237  1.1     scw #else
    238  1.1     scw 	sc->sc_mvmedmat._dmamap_create = NULL;
    239  1.1     scw 	sc->sc_mvmedmat._dmamap_destroy = NULL;
    240  1.1     scw 	sc->sc_mvmedmat._dmamem_alloc = NULL;
    241  1.1     scw 	sc->sc_mvmedmat._dmamem_free = NULL;
    242  1.1     scw #endif
    243  1.1     scw 
    244  1.1     scw 	vaa.va_vct = &sc->sc_vct;
    245  1.1     scw 	vaa.va_bdt = &sc->sc_mvmedmat;
    246  1.1     scw 	vaa.va_slaveconfig = NULL;
    247  1.1     scw 
    248  1.1     scw 	config_found(&sc->sc_dev, &vaa, 0);
    249  1.1     scw }
    250  1.1     scw 
    251  1.1     scw int
    252  1.1     scw mvmebus_map(vsc, vmeaddr, len, am, datasize, swap, tag, handle, resc)
    253  1.1     scw 	void *vsc;
    254  1.1     scw 	vme_addr_t vmeaddr;
    255  1.1     scw 	vme_size_t len;
    256  1.1     scw 	vme_am_t am;
    257  1.1     scw 	vme_datasize_t datasize;
    258  1.1     scw 	vme_swap_t swap;
    259  1.1     scw 	bus_space_tag_t *tag;
    260  1.1     scw 	bus_space_handle_t *handle;
    261  1.1     scw 	vme_mapresc_t *resc;
    262  1.1     scw {
    263  1.1     scw 	struct mvmebus_softc *sc;
    264  1.1     scw 	struct mvmebus_mapresc *mr;
    265  1.1     scw 	struct mvmebus_range *vr;
    266  1.1     scw 	vme_addr_t end;
    267  1.1     scw 	vme_am_t cap, as;
    268  1.1     scw 	paddr_t paddr;
    269  1.1     scw 	int rv, i;
    270  1.1     scw 
    271  1.1     scw 	sc = vsc;
    272  1.1     scw 	end = (vmeaddr + len) - 1;
    273  1.1     scw 	paddr = 0;
    274  1.1     scw 	vr = sc->sc_masters;
    275  1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    276  1.1     scw 	as = am & VME_AM_ADRSIZEMASK;
    277  1.1     scw 
    278  1.1     scw 	for (i = 0; i < sc->sc_nmasters && paddr == 0; i++, vr++) {
    279  1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    280  1.1     scw 			continue;
    281  1.1     scw 
    282  1.1     scw 		if (cap == (vr->vr_am & cap) &&
    283  1.1     scw 		    as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    284  1.1     scw 		    datasize <= vr->vr_datasize &&
    285  1.1     scw 		    vmeaddr >= vr->vr_vmestart && end < vr->vr_vmeend)
    286  1.1     scw 			paddr = vr->vr_locstart + (vmeaddr & vr->vr_mask);
    287  1.1     scw 	}
    288  1.1     scw 	if (paddr == 0)
    289  1.1     scw 		return (ENOMEM);
    290  1.1     scw 
    291  1.1     scw 	rv = bus_space_map(sc->sc_bust, paddr, len, 0, handle);
    292  1.1     scw 	if (rv != 0)
    293  1.1     scw 		return (rv);
    294  1.1     scw 
    295  1.1     scw 	/* Allocate space for the resource tag */
    296  1.1     scw 	if ((mr = malloc(sizeof(*mr), M_DEVBUF, M_NOWAIT)) == NULL) {
    297  1.1     scw 		bus_space_unmap(sc->sc_bust, *handle, len);
    298  1.1     scw 		return (ENOMEM);
    299  1.1     scw 	}
    300  1.1     scw 
    301  1.1     scw 	/* Record the range's details */
    302  1.1     scw 	mr->mr_am = am;
    303  1.1     scw 	mr->mr_datasize = datasize;
    304  1.1     scw 	mr->mr_addr = vmeaddr;
    305  1.1     scw 	mr->mr_size = len;
    306  1.1     scw 	mr->mr_handle = *handle;
    307  1.1     scw 	mr->mr_range = i;
    308  1.1     scw 
    309  1.1     scw 	*tag = sc->sc_bust;
    310  1.1     scw 	*resc = (vme_mapresc_t *) mr;
    311  1.1     scw 
    312  1.1     scw 	return (0);
    313  1.1     scw }
    314  1.1     scw 
    315  1.1     scw /* ARGSUSED */
    316  1.1     scw void
    317  1.1     scw mvmebus_unmap(vsc, resc)
    318  1.1     scw 	void *vsc;
    319  1.1     scw 	vme_mapresc_t resc;
    320  1.1     scw {
    321  1.1     scw 	struct mvmebus_softc *sc = vsc;
    322  1.1     scw 	struct mvmebus_mapresc *mr = (struct mvmebus_mapresc *) resc;
    323  1.1     scw 
    324  1.1     scw 	bus_space_unmap(sc->sc_bust, mr->mr_handle, mr->mr_size);
    325  1.1     scw 
    326  1.1     scw 	free(mr, M_DEVBUF);
    327  1.1     scw }
    328  1.1     scw 
    329  1.1     scw int
    330  1.1     scw mvmebus_probe(vsc, vmeaddr, len, am, datasize, callback, arg)
    331  1.1     scw 	void *vsc;
    332  1.1     scw 	vme_addr_t vmeaddr;
    333  1.1     scw 	vme_size_t len;
    334  1.1     scw 	vme_am_t am;
    335  1.1     scw 	vme_datasize_t datasize;
    336  1.1     scw 	int (*callback)(void *, bus_space_tag_t, bus_space_handle_t);
    337  1.1     scw 	void *arg;
    338  1.1     scw {
    339  1.1     scw 	bus_space_tag_t tag;
    340  1.1     scw 	bus_space_handle_t handle;
    341  1.1     scw 	vme_mapresc_t resc;
    342  1.1     scw 	vme_size_t offs;
    343  1.1     scw 	int rv;
    344  1.1     scw 
    345  1.1     scw 	/* Get a temporary mapping to the VMEbus range */
    346  1.1     scw 	rv = mvmebus_map(vsc, vmeaddr, len, am, datasize, 0,
    347  1.1     scw 	    &tag, &handle, &resc);
    348  1.1     scw 	if (rv)
    349  1.1     scw 		return (rv);
    350  1.1     scw 
    351  1.1     scw 	if (callback)
    352  1.1     scw 		rv = (*callback) (arg, tag, handle);
    353  1.1     scw 	else
    354  1.1     scw 		for (offs = 0; offs < len && rv == 0;) {
    355  1.1     scw 			switch (datasize) {
    356  1.1     scw 			case VME_D8:
    357  1.1     scw 				rv = bus_space_peek_1(tag, handle, offs, NULL);
    358  1.1     scw 				offs += 1;
    359  1.1     scw 				break;
    360  1.1     scw 
    361  1.1     scw 			case VME_D16:
    362  1.1     scw 				rv = bus_space_peek_2(tag, handle, offs, NULL);
    363  1.1     scw 				offs += 2;
    364  1.1     scw 				break;
    365  1.1     scw 
    366  1.1     scw 			case VME_D32:
    367  1.1     scw 				rv = bus_space_peek_4(tag, handle, offs, NULL);
    368  1.1     scw 				offs += 4;
    369  1.1     scw 				break;
    370  1.1     scw 			}
    371  1.1     scw 		}
    372  1.1     scw 
    373  1.1     scw 	mvmebus_unmap(vsc, resc);
    374  1.1     scw 
    375  1.1     scw 	return (rv);
    376  1.1     scw }
    377  1.1     scw 
    378  1.1     scw /* ARGSUSED */
    379  1.1     scw int
    380  1.1     scw mvmebus_intmap(vsc, level, vector, handlep)
    381  1.1     scw 	void *vsc;
    382  1.1     scw 	int level, vector;
    383  1.1     scw 	vme_intr_handle_t *handlep;
    384  1.1     scw {
    385  1.1     scw 
    386  1.1     scw 	if (level < 1 || level > 7 || vector < 0x80 || vector > 0xff)
    387  1.1     scw 		return (EINVAL);
    388  1.1     scw 
    389  1.1     scw 	/* This is rather gross */
    390  1.1     scw 	*handlep = (void *) (int) ((level << 8) | vector);
    391  1.1     scw 	return (0);
    392  1.1     scw }
    393  1.1     scw 
    394  1.1     scw /* ARGSUSED */
    395  1.1     scw const struct evcnt *
    396  1.1     scw mvmebus_intr_evcnt(vsc, handle)
    397  1.1     scw 	void *vsc;
    398  1.1     scw 	vme_intr_handle_t handle;
    399  1.1     scw {
    400  1.1     scw 	struct mvmebus_softc *sc = vsc;
    401  1.1     scw 
    402  1.1     scw 	return (&sc->sc_evcnt[(((int) handle) >> 8) - 1]);
    403  1.1     scw }
    404  1.1     scw 
    405  1.1     scw void *
    406  1.1     scw mvmebus_intr_establish(vsc, handle, prior, func, arg)
    407  1.1     scw 	void *vsc;
    408  1.1     scw 	vme_intr_handle_t handle;
    409  1.1     scw 	int prior;
    410  1.1     scw 	int (*func)(void *);
    411  1.1     scw 	void *arg;
    412  1.1     scw {
    413  1.1     scw 	struct mvmebus_softc *sc;
    414  1.1     scw 	int level, vector, first;
    415  1.1     scw 
    416  1.1     scw 	sc = vsc;
    417  1.1     scw 
    418  1.1     scw 	/* Extract the interrupt's level and vector */
    419  1.1     scw 	level = ((int) handle) >> 8;
    420  1.1     scw 	vector = ((int) handle) & 0xff;
    421  1.1     scw 
    422  1.1     scw #ifdef DIAGNOSTIC
    423  1.1     scw 	if (vector < 0 || vector > 0xff) {
    424  1.1     scw 		printf("%s: Illegal vector offset: 0x%x\n",
    425  1.1     scw 		    sc->sc_dev.dv_xname, vector);
    426  1.1     scw 		panic("mvmebus_intr_establish");
    427  1.1     scw 	}
    428  1.1     scw 	if (level < 1 || level > 7) {
    429  1.1     scw 		printf("%s: Illegal interrupt level: %d\n",
    430  1.1     scw 		    sc->sc_dev.dv_xname, level);
    431  1.1     scw 		panic("mvmebus_intr_establish");
    432  1.1     scw 	}
    433  1.1     scw #endif
    434  1.1     scw 
    435  1.1     scw 	first = (sc->sc_irqref[level]++ == 0);
    436  1.1     scw 
    437  1.1     scw 	(*sc->sc_intr_establish)(sc->sc_chip, prior, level, vector, first,
    438  1.1     scw 	    func, arg, &sc->sc_evcnt[level - 1]);
    439  1.1     scw 
    440  1.1     scw 	return ((void *) handle);
    441  1.1     scw }
    442  1.1     scw 
    443  1.1     scw void
    444  1.1     scw mvmebus_intr_disestablish(vsc, handle)
    445  1.1     scw 	void *vsc;
    446  1.1     scw 	vme_intr_handle_t handle;
    447  1.1     scw {
    448  1.1     scw 	struct mvmebus_softc *sc;
    449  1.1     scw 	int level, vector, last;
    450  1.1     scw 
    451  1.1     scw 	sc = vsc;
    452  1.1     scw 
    453  1.1     scw 	/* Extract the interrupt's level and vector */
    454  1.1     scw 	level = ((int) handle) >> 8;
    455  1.1     scw 	vector = ((int) handle) & 0xff;
    456  1.1     scw 
    457  1.1     scw #ifdef DIAGNOSTIC
    458  1.1     scw 	if (vector < 0 || vector > 0xff) {
    459  1.1     scw 		printf("%s: Illegal vector offset: 0x%x\n",
    460  1.1     scw 		    sc->sc_dev.dv_xname, vector);
    461  1.1     scw 		panic("mvmebus_intr_disestablish");
    462  1.1     scw 	}
    463  1.1     scw 	if (level < 1 || level > 7) {
    464  1.1     scw 		printf("%s: Illegal interrupt level: %d\n",
    465  1.1     scw 		    sc->sc_dev.dv_xname, level);
    466  1.1     scw 		panic("mvmebus_intr_disestablish");
    467  1.1     scw 	}
    468  1.1     scw 	if (sc->sc_irqref[level] == 0) {
    469  1.1     scw 		printf("%s: VMEirq#%d: Reference count already zero!\n",
    470  1.1     scw 		    sc->sc_dev.dv_xname, level);
    471  1.1     scw 		panic("mvmebus_intr_disestablish");
    472  1.1     scw 	}
    473  1.1     scw #endif
    474  1.1     scw 
    475  1.1     scw 	last = (--(sc->sc_irqref[level]) == 0);
    476  1.1     scw 
    477  1.1     scw 	(*sc->sc_intr_disestablish)(sc->sc_chip, level, vector, last,
    478  1.1     scw 	    &sc->sc_evcnt[level - 1]);
    479  1.1     scw }
    480  1.1     scw 
    481  1.1     scw #ifdef DIAGNOSTIC
    482  1.1     scw /* ARGSUSED */
    483  1.1     scw int
    484  1.1     scw mvmebus_dummy_dmamap_create(t, size, nsegs, maxsegsz, boundary, flags, dmamp)
    485  1.1     scw 	bus_dma_tag_t t;
    486  1.1     scw 	bus_size_t size;
    487  1.1     scw 	int nsegs;
    488  1.1     scw 	bus_size_t maxsegsz;
    489  1.1     scw 	bus_size_t boundary;
    490  1.1     scw 	int flags;
    491  1.1     scw 	bus_dmamap_t *dmamp;
    492  1.1     scw {
    493  1.1     scw 
    494  1.1     scw 	panic("Must use vme_dmamap_create() in place of bus_dmamap_create()");
    495  1.1     scw 	return (0);	/* Shutup the compiler */
    496  1.1     scw }
    497  1.1     scw 
    498  1.1     scw /* ARGSUSED */
    499  1.1     scw void
    500  1.1     scw mvmebus_dummy_dmamap_destroy(t, map)
    501  1.1     scw 	bus_dma_tag_t t;
    502  1.1     scw 	bus_dmamap_t map;
    503  1.1     scw {
    504  1.1     scw 
    505  1.1     scw 	panic("Must use vme_dmamap_destroy() in place of bus_dmamap_destroy()");
    506  1.1     scw }
    507  1.1     scw #endif
    508  1.1     scw 
    509  1.1     scw /* ARGSUSED */
    510  1.1     scw int
    511  1.1     scw mvmebus_dmamap_create(vsc, len, am, datasize, swap, nsegs,
    512  1.1     scw     segsz, bound, flags, mapp)
    513  1.1     scw 	void *vsc;
    514  1.1     scw 	vme_size_t len;
    515  1.1     scw 	vme_am_t am;
    516  1.1     scw 	vme_datasize_t datasize;
    517  1.1     scw 	vme_swap_t swap;
    518  1.1     scw 	int nsegs;
    519  1.1     scw 	vme_size_t segsz;
    520  1.1     scw 	vme_addr_t bound;
    521  1.1     scw 	int flags;
    522  1.1     scw 	bus_dmamap_t *mapp;
    523  1.1     scw {
    524  1.1     scw 	struct mvmebus_softc *sc = vsc;
    525  1.1     scw 	struct mvmebus_dmamap *vmap;
    526  1.1     scw 	struct mvmebus_range *vr;
    527  1.1     scw 	vme_am_t cap, as;
    528  1.1     scw 	int i, rv;
    529  1.1     scw 
    530  1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    531  1.1     scw 	as = am & VME_AM_ADRSIZEMASK;
    532  1.1     scw 
    533  1.1     scw 	/*
    534  1.1     scw 	 * Verify that we even stand a chance of satisfying
    535  1.1     scw 	 * the VMEbus address space and datasize requested.
    536  1.1     scw 	 */
    537  1.1     scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    538  1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    539  1.1     scw 			continue;
    540  1.1     scw 
    541  1.1     scw 		if (as == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    542  1.1     scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    543  1.1     scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    544  1.1     scw 			break;
    545  1.1     scw 	}
    546  1.1     scw 
    547  1.1     scw 	if (i == sc->sc_nslaves)
    548  1.1     scw 		return (EINVAL);
    549  1.1     scw 
    550  1.1     scw 	if ((vmap = malloc(sizeof(*vmap), M_DMAMAP,
    551  1.1     scw 	    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
    552  1.1     scw 		return (ENOMEM);
    553  1.1     scw 
    554  1.1     scw 
    555  1.1     scw 	rv = bus_dmamap_create(sc->sc_dmat, len, nsegs, segsz,
    556  1.1     scw 	    bound, flags, mapp);
    557  1.1     scw 	if (rv != 0) {
    558  1.1     scw 		free(vmap, M_DMAMAP);
    559  1.1     scw 		return (rv);
    560  1.1     scw 	}
    561  1.1     scw 
    562  1.1     scw 	vmap->vm_am = am;
    563  1.1     scw 	vmap->vm_datasize = datasize;
    564  1.1     scw 	vmap->vm_swap = swap;
    565  1.1     scw 	vmap->vm_slave = vr;
    566  1.1     scw 
    567  1.1     scw 	(*mapp)->_dm_cookie = vmap;
    568  1.1     scw 
    569  1.1     scw 	return (0);
    570  1.1     scw }
    571  1.1     scw 
    572  1.1     scw void
    573  1.1     scw mvmebus_dmamap_destroy(vsc, map)
    574  1.1     scw 	void *vsc;
    575  1.1     scw 	bus_dmamap_t map;
    576  1.1     scw {
    577  1.1     scw 	struct mvmebus_softc *sc = vsc;
    578  1.1     scw 
    579  1.1     scw 	free(map->_dm_cookie, M_DMAMAP);
    580  1.1     scw 	bus_dmamap_destroy(sc->sc_dmat, map);
    581  1.1     scw }
    582  1.1     scw 
    583  1.1     scw static int
    584  1.1     scw mvmebus_dmamap_load_common(sc, map)
    585  1.1     scw 	struct mvmebus_softc *sc;
    586  1.1     scw 	bus_dmamap_t map;
    587  1.1     scw {
    588  1.1     scw 	struct mvmebus_dmamap *vmap = map->_dm_cookie;
    589  1.1     scw 	struct mvmebus_range *vr = vmap->vm_slave;
    590  1.1     scw 	bus_dma_segment_t *ds;
    591  1.1     scw 	vme_am_t cap, am;
    592  1.1     scw 	int i;
    593  1.1     scw 
    594  1.1     scw 	cap = MVMEBUS_AM2CAP(vmap->vm_am);
    595  1.1     scw 	am = vmap->vm_am & VME_AM_ADRSIZEMASK;
    596  1.1     scw 
    597  1.1     scw 	/*
    598  1.1     scw 	 * Traverse the list of segments which make up this map, and
    599  1.1     scw 	 * convert the cpu-relative addresses therein to VMEbus addresses.
    600  1.1     scw 	 */
    601  1.1     scw 	for (ds = &map->dm_segs[0]; ds < &map->dm_segs[map->dm_nsegs]; ds++) {
    602  1.1     scw 		/*
    603  1.1     scw 		 * First, see if this map's slave image can access the
    604  1.1     scw 		 * segment, otherwise we have to waste time scanning all
    605  1.1     scw 		 * the slave images.
    606  1.1     scw 		 */
    607  1.1     scw 		vr = vmap->vm_slave;
    608  1.1     scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    609  1.1     scw 		    cap == (vr->vr_am & cap) &&
    610  1.1     scw 		    vmap->vm_datasize <= vr->vr_datasize &&
    611  1.1     scw 		    ds->_ds_cpuaddr >= vr->vr_locstart &&
    612  1.1     scw 		    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    613  1.1     scw 			goto found;
    614  1.1     scw 
    615  1.1     scw 		for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    616  1.1     scw 			if (vr->vr_am == MVMEBUS_AM_DISABLED)
    617  1.1     scw 				continue;
    618  1.1     scw 
    619  1.1     scw 			/*
    620  1.1     scw 			 * Filter out any slave images which don't have the
    621  1.1     scw 			 * same VMEbus address modifier and datasize as
    622  1.1     scw 			 * this DMA map, and those which don't cover the
    623  1.1     scw 			 * physical address region containing the segment.
    624  1.1     scw 			 */
    625  1.1     scw 			if (vr != vmap->vm_slave &&
    626  1.1     scw 			    am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    627  1.1     scw 			    cap == (vr->vr_am & cap) &&
    628  1.1     scw 			    vmap->vm_datasize <= vr->vr_datasize &&
    629  1.1     scw 			    ds->_ds_cpuaddr >= vr->vr_locstart &&
    630  1.1     scw 			    ds->ds_len <= (vr->vr_vmeend - vr->vr_vmestart))
    631  1.1     scw 				break;
    632  1.1     scw 		}
    633  1.1     scw 
    634  1.1     scw 		/*
    635  1.1     scw 		 * Did we find an applicable slave image which covers this
    636  1.1     scw 		 * segment?
    637  1.1     scw 		 */
    638  1.1     scw 		if (i == sc->sc_nslaves) {
    639  1.1     scw 			/*
    640  1.1     scw 			 * XXX TODO:
    641  1.1     scw 			 *
    642  1.1     scw 			 * Bounce this segment via a bounce buffer allocated
    643  1.1     scw 			 * from this DMA map.
    644  1.1     scw 			 */
    645  1.1     scw 			printf("mvmebus_dmamap_load_common: bounce needed!\n");
    646  1.1     scw 			return (EINVAL);
    647  1.1     scw 		}
    648  1.1     scw 
    649  1.1     scw found:
    650  1.1     scw 		/*
    651  1.1     scw 		 * Generate the VMEbus address of this segment
    652  1.1     scw 		 */
    653  1.1     scw 		ds->ds_addr = (ds->_ds_cpuaddr - vr->vr_locstart) +
    654  1.1     scw 		    vr->vr_vmestart;
    655  1.1     scw 	}
    656  1.1     scw 
    657  1.1     scw 	return (0);
    658  1.1     scw }
    659  1.1     scw 
    660  1.1     scw int
    661  1.1     scw mvmebus_dmamap_load(t, map, buf, buflen, p, flags)
    662  1.1     scw 	bus_dma_tag_t t;
    663  1.1     scw 	bus_dmamap_t map;
    664  1.1     scw 	void *buf;
    665  1.1     scw 	bus_size_t buflen;
    666  1.1     scw 	struct proc *p;
    667  1.1     scw 	int flags;
    668  1.1     scw {
    669  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    670  1.1     scw 	int rv;
    671  1.1     scw 
    672  1.1     scw 	rv = bus_dmamap_load(sc->sc_dmat, map, buf, buflen, p, flags);
    673  1.1     scw 	if (rv != 0)
    674  1.1     scw 		return rv;
    675  1.1     scw 
    676  1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    677  1.1     scw }
    678  1.1     scw 
    679  1.1     scw int
    680  1.1     scw mvmebus_dmamap_load_mbuf(t, map, chain, flags)
    681  1.1     scw 	bus_dma_tag_t t;
    682  1.1     scw 	bus_dmamap_t map;
    683  1.1     scw 	struct mbuf *chain;
    684  1.1     scw 	int flags;
    685  1.1     scw {
    686  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    687  1.1     scw 	int rv;
    688  1.1     scw 
    689  1.1     scw 	rv = bus_dmamap_load_mbuf(sc->sc_dmat, map, chain, flags);
    690  1.1     scw 	if (rv != 0)
    691  1.1     scw 		return rv;
    692  1.1     scw 
    693  1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    694  1.1     scw }
    695  1.1     scw 
    696  1.1     scw int
    697  1.1     scw mvmebus_dmamap_load_uio(t, map, uio, flags)
    698  1.1     scw 	bus_dma_tag_t t;
    699  1.1     scw 	bus_dmamap_t map;
    700  1.1     scw 	struct uio *uio;
    701  1.1     scw 	int flags;
    702  1.1     scw {
    703  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    704  1.1     scw 	int rv;
    705  1.1     scw 
    706  1.1     scw 	rv = bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags);
    707  1.1     scw 	if (rv != 0)
    708  1.1     scw 		return rv;
    709  1.1     scw 
    710  1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    711  1.1     scw }
    712  1.1     scw 
    713  1.1     scw int
    714  1.1     scw mvmebus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
    715  1.1     scw 	bus_dma_tag_t t;
    716  1.1     scw 	bus_dmamap_t map;
    717  1.1     scw 	bus_dma_segment_t *segs;
    718  1.1     scw 	int nsegs;
    719  1.1     scw 	bus_size_t size;
    720  1.1     scw 	int flags;
    721  1.1     scw {
    722  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    723  1.1     scw 	int rv;
    724  1.1     scw 
    725  1.1     scw 	/*
    726  1.1     scw 	 * mvmebus_dmamem_alloc() will ensure that the physical memory
    727  1.1     scw 	 * backing these segments is 100% accessible in at least one
    728  1.1     scw 	 * of the board's VMEbus slave images.
    729  1.1     scw 	 */
    730  1.1     scw 	rv = bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags);
    731  1.1     scw 	if (rv != 0)
    732  1.1     scw 		return rv;
    733  1.1     scw 
    734  1.1     scw 	return mvmebus_dmamap_load_common(sc, map);
    735  1.1     scw }
    736  1.1     scw 
    737  1.1     scw void
    738  1.1     scw mvmebus_dmamap_unload(t, map)
    739  1.1     scw 	bus_dma_tag_t t;
    740  1.1     scw 	bus_dmamap_t map;
    741  1.1     scw {
    742  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    743  1.1     scw 
    744  1.1     scw 	/* XXX Deal with bounce buffers */
    745  1.1     scw 
    746  1.1     scw 	bus_dmamap_unload(sc->sc_dmat, map);
    747  1.1     scw }
    748  1.1     scw 
    749  1.1     scw void
    750  1.1     scw mvmebus_dmamap_sync(t, map, offset, len, ops)
    751  1.1     scw 	bus_dma_tag_t t;
    752  1.1     scw 	bus_dmamap_t map;
    753  1.1     scw 	bus_addr_t offset;
    754  1.1     scw 	bus_size_t len;
    755  1.1     scw 	int ops;
    756  1.1     scw {
    757  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    758  1.1     scw 
    759  1.1     scw 	/* XXX Bounce buffers */
    760  1.1     scw 
    761  1.1     scw 	bus_dmamap_sync(sc->sc_dmat, map, offset, len, ops);
    762  1.1     scw }
    763  1.1     scw 
    764  1.1     scw #ifdef DIAGNOSTIC
    765  1.1     scw /* ARGSUSED */
    766  1.1     scw int
    767  1.1     scw mvmebus_dummy_dmamem_alloc(t, size, align, boundary, segs, nsegs, rsegs, flags)
    768  1.1     scw 	bus_dma_tag_t t;
    769  1.1     scw 	bus_size_t size;
    770  1.1     scw 	bus_size_t align;
    771  1.1     scw 	bus_size_t boundary;
    772  1.1     scw 	bus_dma_segment_t *segs;
    773  1.1     scw 	int nsegs;
    774  1.1     scw 	int *rsegs;
    775  1.1     scw 	int flags;
    776  1.1     scw {
    777  1.1     scw 
    778  1.2  provos 	panic("Must use vme_dmamem_alloc() in place of bus_dmamem_alloc()");
    779  1.1     scw }
    780  1.1     scw 
    781  1.1     scw /* ARGSUSED */
    782  1.1     scw void
    783  1.1     scw mvmebus_dummy_dmamem_free(t, segs, nsegs)
    784  1.1     scw 	bus_dma_tag_t t;
    785  1.1     scw 	bus_dma_segment_t *segs;
    786  1.1     scw 	int nsegs;
    787  1.1     scw {
    788  1.1     scw 
    789  1.1     scw 	panic("Must use vme_dmamem_free() in place of bus_dmamem_free()");
    790  1.1     scw }
    791  1.1     scw #endif
    792  1.1     scw 
    793  1.1     scw /* ARGSUSED */
    794  1.1     scw int
    795  1.1     scw mvmebus_dmamem_alloc(vsc, len, am, datasize, swap, segs, nsegs, rsegs, flags)
    796  1.1     scw 	void *vsc;
    797  1.1     scw 	vme_size_t len;
    798  1.1     scw 	vme_am_t am;
    799  1.1     scw 	vme_datasize_t datasize;
    800  1.1     scw 	vme_swap_t swap;
    801  1.1     scw 	bus_dma_segment_t *segs;
    802  1.1     scw 	int nsegs;
    803  1.1     scw 	int *rsegs;
    804  1.1     scw 	int flags;
    805  1.1     scw {
    806  1.1     scw 	extern paddr_t avail_start;
    807  1.1     scw 	struct mvmebus_softc *sc = vsc;
    808  1.1     scw 	struct mvmebus_range *vr;
    809  1.1     scw 	bus_addr_t low, high;
    810  1.1     scw 	bus_size_t bound;
    811  1.1     scw 	vme_am_t cap;
    812  1.1     scw 	int i;
    813  1.1     scw 
    814  1.1     scw 	cap = MVMEBUS_AM2CAP(am);
    815  1.1     scw 	am &= VME_AM_ADRSIZEMASK;
    816  1.1     scw 
    817  1.1     scw 	/*
    818  1.1     scw 	 * Find a slave mapping in the requested VMEbus address space.
    819  1.1     scw 	 */
    820  1.1     scw 	for (i = 0, vr = sc->sc_slaves; i < sc->sc_nslaves; i++, vr++) {
    821  1.1     scw 		if (vr->vr_am == MVMEBUS_AM_DISABLED)
    822  1.1     scw 			continue;
    823  1.1     scw 
    824  1.1     scw 		if (i == 0 && (flags & BUS_DMA_ONBOARD_RAM) != 0)
    825  1.1     scw 			continue;
    826  1.1     scw 
    827  1.1     scw 		if (am == (vr->vr_am & VME_AM_ADRSIZEMASK) &&
    828  1.1     scw 		    cap == (vr->vr_am & cap) && datasize <= vr->vr_datasize &&
    829  1.1     scw 		    len <= (vr->vr_vmeend - vr->vr_vmestart))
    830  1.1     scw 			break;
    831  1.1     scw 	}
    832  1.1     scw 	if (i == sc->sc_nslaves)
    833  1.1     scw 		return (EINVAL);
    834  1.1     scw 
    835  1.1     scw 	/*
    836  1.1     scw 	 * Set up the constraints so we can allocate physical memory which
    837  1.1     scw 	 * is visible in the requested address space
    838  1.1     scw 	 */
    839  1.1     scw 	low = max(vr->vr_locstart, avail_start);
    840  1.1     scw 	high = vr->vr_locstart + (vr->vr_vmeend - vr->vr_vmestart) + 1;
    841  1.1     scw 	bound = (bus_size_t) vr->vr_mask + 1;
    842  1.1     scw 
    843  1.1     scw 	/*
    844  1.1     scw 	 * Allocate physical memory.
    845  1.1     scw 	 *
    846  1.1     scw 	 * Note: This fills in the segments with cpu-relative physical
    847  1.1     scw 	 * addresses. A further call to bus_dmamap_load_raw() (with a
    848  1.3     wiz 	 * DMA map which specifies the same VMEbus address space and
    849  1.1     scw 	 * constraints as the call to here) must be made. The segments
    850  1.3     wiz 	 * of the DMA map will then contain VMEbus-relative physical
    851  1.1     scw 	 * addresses of the memory allocated here.
    852  1.1     scw 	 */
    853  1.1     scw 	return _bus_dmamem_alloc_common(sc->sc_dmat, low, high,
    854  1.1     scw 	    len, 0, bound, segs, nsegs, rsegs, flags);
    855  1.1     scw }
    856  1.1     scw 
    857  1.1     scw void
    858  1.1     scw mvmebus_dmamem_free(vsc, segs, nsegs)
    859  1.1     scw 	void *vsc;
    860  1.1     scw 	bus_dma_segment_t *segs;
    861  1.1     scw 	int nsegs;
    862  1.1     scw {
    863  1.1     scw 	struct mvmebus_softc *sc = vsc;
    864  1.1     scw 
    865  1.1     scw 	bus_dmamem_free(sc->sc_dmat, segs, nsegs);
    866  1.1     scw }
    867  1.1     scw 
    868  1.1     scw int
    869  1.1     scw mvmebus_dmamem_map(t, segs, nsegs, size, kvap, flags)
    870  1.1     scw 	bus_dma_tag_t t;
    871  1.1     scw 	bus_dma_segment_t *segs;
    872  1.1     scw 	int nsegs;
    873  1.1     scw 	size_t size;
    874  1.1     scw 	caddr_t *kvap;
    875  1.1     scw 	int flags;
    876  1.1     scw {
    877  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    878  1.1     scw 
    879  1.1     scw 	return bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags);
    880  1.1     scw }
    881  1.1     scw 
    882  1.1     scw void
    883  1.1     scw mvmebus_dmamem_unmap(t, kva, size)
    884  1.1     scw 	bus_dma_tag_t t;
    885  1.1     scw 	caddr_t kva;
    886  1.1     scw 	size_t size;
    887  1.1     scw {
    888  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    889  1.1     scw 
    890  1.1     scw 	bus_dmamem_unmap(sc->sc_dmat, kva, size);
    891  1.1     scw }
    892  1.1     scw 
    893  1.1     scw paddr_t
    894  1.1     scw mvmebus_dmamem_mmap(t, segs, nsegs, offset, prot, flags)
    895  1.1     scw 	bus_dma_tag_t t;
    896  1.1     scw 	bus_dma_segment_t *segs;
    897  1.1     scw 	int nsegs;
    898  1.1     scw 	off_t offset;
    899  1.1     scw 	int prot;
    900  1.1     scw 	int flags;
    901  1.1     scw {
    902  1.1     scw 	struct mvmebus_softc *sc = t->_cookie;
    903  1.1     scw 
    904  1.1     scw 	return bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, offset, prot, flags);
    905  1.1     scw }
    906  1.1     scw 
    907  1.1     scw #ifdef DEBUG
    908  1.1     scw static const char *
    909  1.1     scw mvmebus_mod_string(addr, len, am, ds)
    910  1.1     scw 	vme_addr_t addr;
    911  1.1     scw 	vme_size_t len;
    912  1.1     scw 	vme_am_t am;
    913  1.1     scw 	vme_datasize_t ds;
    914  1.1     scw {
    915  1.1     scw 	static const char *mode[] = {"BLT64)", "DATA)", "PROG)", "BLT32)"};
    916  1.1     scw 	static const char *dsiz[] = {"(", "(D8,", "(D16,", "(D16-D8,",
    917  1.1     scw 	"(D32,", "(D32,D8,", "(D32-D16,", "(D32-D8,"};
    918  1.5    matt 	static const char *adrfmt[] = { "A32:%08x-%08x ", "A16:%04x-%04x ",
    919  1.5    matt 	    "A24:%06x-%06x ", "USR:%08x-%08x " };
    920  1.1     scw 	static char mstring[40];
    921  1.1     scw 
    922  1.5    matt 	sprintf(mstring,
    923  1.5    matt 	    adrfmt[(am & VME_AM_ADRSIZEMASK) >> VME_AM_ADRSIZESHIFT],
    924  1.5    matt 	    addr, addr + len - 1);
    925  1.1     scw 	strcat(mstring, dsiz[ds & 0x7]);
    926  1.1     scw 
    927  1.1     scw 	if (MVMEBUS_AM_HAS_CAP(am)) {
    928  1.1     scw 		if (am & MVMEBUS_AM_CAP_DATA)
    929  1.1     scw 			strcat(mstring, "D");
    930  1.1     scw 		if (am & MVMEBUS_AM_CAP_PROG)
    931  1.1     scw 			strcat(mstring, "P");
    932  1.1     scw 		if (am & MVMEBUS_AM_CAP_USER)
    933  1.1     scw 			strcat(mstring, "U");
    934  1.1     scw 		if (am & MVMEBUS_AM_CAP_SUPER)
    935  1.1     scw 			strcat(mstring, "S");
    936  1.1     scw 		if (am & MVMEBUS_AM_CAP_BLK)
    937  1.1     scw 			strcat(mstring, "B");
    938  1.1     scw 		if (am & MVMEBUS_AM_CAP_BLKD64)
    939  1.1     scw 			strcat(mstring, "6");
    940  1.1     scw 		strcat(mstring, ")");
    941  1.1     scw 	} else {
    942  1.1     scw 		strcat(mstring, ((am & VME_AM_PRIVMASK) == VME_AM_USER) ?
    943  1.1     scw 		    "USER," : "SUPER,");
    944  1.1     scw 		strcat(mstring, mode[am & VME_AM_MODEMASK]);
    945  1.1     scw 	}
    946  1.1     scw 
    947  1.1     scw 	return (mstring);
    948  1.1     scw }
    949  1.1     scw #endif
    950