1 1.4 chs /* $NetBSD: mvmebus.h,v 1.4 2012/10/27 17:18:27 chs Exp $ */ 2 1.1 scw 3 1.1 scw /*- 4 1.1 scw * Copyright (c) 2000, 2002 The NetBSD Foundation, Inc. 5 1.1 scw * All rights reserved. 6 1.1 scw * 7 1.1 scw * This code is derived from software contributed to The NetBSD Foundation 8 1.1 scw * by Steve C. Woodford. 9 1.1 scw * 10 1.1 scw * Redistribution and use in source and binary forms, with or without 11 1.1 scw * modification, are permitted provided that the following conditions 12 1.1 scw * are met: 13 1.1 scw * 1. Redistributions of source code must retain the above copyright 14 1.1 scw * notice, this list of conditions and the following disclaimer. 15 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 scw * notice, this list of conditions and the following disclaimer in the 17 1.1 scw * documentation and/or other materials provided with the distribution. 18 1.1 scw * 19 1.1 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 scw * POSSIBILITY OF SUCH DAMAGE. 30 1.1 scw */ 31 1.1 scw 32 1.1 scw #ifndef _MVME_MVMEBUS_H 33 1.1 scw #define _MVME_MVMEBUS_H 34 1.1 scw 35 1.1 scw /* 36 1.1 scw * VMEbus master and slave windows are described using 37 1.1 scw * instances of this structure. 38 1.1 scw * 39 1.1 scw * The chip-specific code records the details of the available mappings 40 1.1 scw * for the MVME board. 41 1.1 scw */ 42 1.1 scw struct mvmebus_range { 43 1.1 scw vme_am_t vr_am; /* Address modifier (A16, A24, A32) */ 44 1.1 scw vme_datasize_t vr_datasize; /* Datasize: logical OR of D8,D16,D32 */ 45 1.1 scw paddr_t vr_locstart; /* CPU-relative address of mapping */ 46 1.1 scw paddr_t vr_mask; /* Mask to apply to this mapping */ 47 1.1 scw vme_addr_t vr_vmestart; /* VMEbus start address */ 48 1.1 scw vme_addr_t vr_vmeend; /* VMEbus end address */ 49 1.1 scw }; 50 1.1 scw 51 1.1 scw /* Assigned to vr_am to specify the mapping is not valid */ 52 1.1 scw #define MVMEBUS_AM_DISABLED ((vme_am_t)-1) 53 1.1 scw 54 1.1 scw /* For slave mappings, these specify the slave's capabilities */ 55 1.1 scw #define MVMEBUS_AM_CAP_DATA 0x0100 56 1.1 scw #define MVMEBUS_AM_CAP_PROG 0x0200 57 1.1 scw #define MVMEBUS_AM_CAP_BLK 0x0400 58 1.1 scw #define MVMEBUS_AM_CAP_BLKD64 0x0800 59 1.1 scw #define MVMEBUS_AM_CAP_USER 0x1000 60 1.1 scw #define MVMEBUS_AM_CAP_SUPER 0x2000 61 1.1 scw #define MVMEBUS_AM_HAS_CAP(x) (((x) & 0x3f00) != 0) 62 1.1 scw 63 1.1 scw #define MVMEBUS_AM2CAP(am) (_mvmebus_am_cap[((am) & \ 64 1.1 scw (VME_AM_MODEMASK | VME_AM_PRIVMASK))]) 65 1.1 scw 66 1.1 scw 67 1.1 scw /* 68 1.1 scw * This records VMEbus-specific details of a region of bus_space_map'd 69 1.1 scw * VMEbus address space. 70 1.1 scw */ 71 1.1 scw struct mvmebus_mapresc { 72 1.1 scw bus_space_handle_t mr_handle; 73 1.1 scw bus_addr_t mr_addr; 74 1.1 scw bus_size_t mr_size; 75 1.1 scw vme_am_t mr_am; 76 1.1 scw vme_datasize_t mr_datasize; 77 1.1 scw int mr_range; 78 1.1 scw }; 79 1.1 scw 80 1.1 scw 81 1.1 scw /* 82 1.1 scw * This records the VMEbus-specific details of a region of phyisical 83 1.1 scw * memory accessible through a VMEbus slave map. 84 1.1 scw */ 85 1.1 scw struct mvmebus_dmamap { 86 1.1 scw vme_am_t vm_am; 87 1.1 scw vme_datasize_t vm_datasize; 88 1.1 scw vme_swap_t vm_swap; 89 1.1 scw struct mvmebus_range *vm_slave; 90 1.1 scw }; 91 1.1 scw 92 1.1 scw 93 1.1 scw struct mvmebus_softc { 94 1.4 chs device_t sc_dev; 95 1.1 scw bus_space_tag_t sc_bust; 96 1.1 scw bus_dma_tag_t sc_dmat; 97 1.1 scw short sc_irqref[8]; 98 1.1 scw void *sc_chip; 99 1.1 scw int sc_nmasters; 100 1.1 scw struct mvmebus_range *sc_masters; 101 1.1 scw int sc_nslaves; 102 1.1 scw struct mvmebus_range *sc_slaves; 103 1.1 scw struct evcnt sc_evcnt[7]; 104 1.1 scw void (*sc_intr_establish)(void *, int, int, int, int, 105 1.1 scw int (*)(void *), void *, struct evcnt *); 106 1.1 scw void (*sc_intr_disestablish)(void *, int, int, int, 107 1.1 scw struct evcnt *); 108 1.1 scw struct vme_chipset_tag sc_vct; 109 1.1 scw struct mvme68k_bus_dma_tag sc_mvmedmat; 110 1.1 scw }; 111 1.1 scw 112 1.1 scw 113 1.1 scw void mvmebus_attach(struct mvmebus_softc *); 114 1.1 scw int mvmebus_map(void *, vme_addr_t, vme_size_t, vme_am_t, 115 1.1 scw vme_datasize_t, vme_swap_t, bus_space_tag_t *, 116 1.1 scw bus_space_handle_t *, vme_mapresc_t *); 117 1.1 scw void mvmebus_unmap(void *, vme_mapresc_t); 118 1.1 scw int mvmebus_probe(void *, vme_addr_t, vme_size_t, 119 1.1 scw vme_am_t, vme_datasize_t, 120 1.1 scw int (*) (void *, bus_space_tag_t, bus_space_handle_t), void *arg); 121 1.1 scw int mvmebus_intmap(void *, int, int, vme_intr_handle_t *); 122 1.1 scw const struct evcnt *mvmebus_intr_evcnt(void *, vme_intr_handle_t); 123 1.1 scw void * mvmebus_intr_establish(void *, vme_intr_handle_t, int, 124 1.1 scw int (*) (void *), void *); 125 1.1 scw void mvmebus_intr_disestablish(void *, vme_intr_handle_t); 126 1.1 scw 127 1.1 scw int mvmebus_dmamap_create(void *, vme_size_t, vme_am_t, vme_datasize_t, 128 1.1 scw vme_swap_t, int, vme_size_t, vme_addr_t, int, bus_dmamap_t *); 129 1.1 scw void mvmebus_dmamap_destroy(void *, bus_dmamap_t); 130 1.1 scw int mvmebus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, 131 1.1 scw void *, bus_size_t, struct proc *, int); 132 1.1 scw int mvmebus_dmamap_load_mbuf(bus_dma_tag_t, 133 1.1 scw bus_dmamap_t, struct mbuf *, int); 134 1.1 scw int mvmebus_dmamap_load_uio(bus_dma_tag_t, 135 1.1 scw bus_dmamap_t, struct uio *, int); 136 1.1 scw int mvmebus_dmamap_load_raw(bus_dma_tag_t, 137 1.1 scw bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 138 1.1 scw void mvmebus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 139 1.1 scw void mvmebus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 140 1.1 scw bus_size_t, int); 141 1.1 scw 142 1.1 scw int mvmebus_dmamem_alloc(void *, vme_size_t, vme_am_t, vme_datasize_t, 143 1.1 scw vme_swap_t, bus_dma_segment_t *, int, int *, int); 144 1.1 scw void mvmebus_dmamem_free(void *, bus_dma_segment_t *, int); 145 1.1 scw int mvmebus_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, int, 146 1.2 christos size_t, void **, int); 147 1.2 christos void mvmebus_dmamem_unmap(bus_dma_tag_t, void *, size_t); 148 1.1 scw paddr_t mvmebus_dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, 149 1.1 scw off_t, int, int); 150 1.1 scw 151 1.1 scw extern vme_am_t _mvmebus_am_cap[]; 152 1.1 scw extern const char *mvmebus_irq_name[]; 153 1.1 scw 154 1.1 scw #endif /* _MVME_MVMEBUS_H */ 155