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      1  1.10   andvar /*	$NetBSD: vme_two.c,v 1.10 2025/07/29 19:07:53 andvar Exp $	*/
      2   1.1      scw 
      3   1.1      scw /*-
      4   1.1      scw  * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc.
      5   1.1      scw  * All rights reserved.
      6   1.1      scw  *
      7   1.1      scw  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1      scw  * by Steve C. Woodford.
      9   1.1      scw  *
     10   1.1      scw  * Redistribution and use in source and binary forms, with or without
     11   1.1      scw  * modification, are permitted provided that the following conditions
     12   1.1      scw  * are met:
     13   1.1      scw  * 1. Redistributions of source code must retain the above copyright
     14   1.1      scw  *    notice, this list of conditions and the following disclaimer.
     15   1.1      scw  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      scw  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      scw  *    documentation and/or other materials provided with the distribution.
     18   1.1      scw  *
     19   1.1      scw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1      scw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1      scw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1      scw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1      scw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1      scw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1      scw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1      scw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1      scw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1      scw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1      scw  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1      scw  */
     31   1.1      scw 
     32   1.1      scw /*
     33   1.1      scw  * VME support specific to the VMEchip2 found on all high-end MVME boards
     34   1.1      scw  */
     35   1.2    lukem 
     36   1.2    lukem #include <sys/cdefs.h>
     37  1.10   andvar __KERNEL_RCSID(0, "$NetBSD: vme_two.c,v 1.10 2025/07/29 19:07:53 andvar Exp $");
     38   1.1      scw 
     39   1.1      scw #include "vmetwo.h"
     40   1.1      scw 
     41   1.1      scw #include <sys/param.h>
     42   1.1      scw #include <sys/kernel.h>
     43   1.1      scw #include <sys/systm.h>
     44   1.1      scw #include <sys/device.h>
     45   1.1      scw 
     46   1.6       ad #include <sys/cpu.h>
     47   1.6       ad #include <sys/bus.h>
     48   1.1      scw 
     49   1.1      scw #include <dev/vme/vmereg.h>
     50   1.1      scw #include <dev/vme/vmevar.h>
     51   1.1      scw 
     52   1.1      scw #include <dev/mvme/mvmebus.h>
     53   1.1      scw #include <dev/mvme/vme_tworeg.h>
     54   1.1      scw #include <dev/mvme/vme_twovar.h>
     55   1.1      scw 
     56   1.1      scw void vmetwo_master_range(struct vmetwo_softc *, int, struct mvmebus_range *);
     57   1.1      scw void vmetwo_slave_range(struct vmetwo_softc *, int, vme_am_t,
     58   1.1      scw 	struct mvmebus_range *);
     59   1.1      scw 
     60   1.1      scw /* ARGSUSED */
     61   1.1      scw void
     62   1.8      dsl vmetwo_init(struct vmetwo_softc *sc)
     63   1.1      scw {
     64   1.1      scw 	u_int32_t reg;
     65   1.1      scw 	int i;
     66   1.1      scw 
     67   1.1      scw 	/* Initialise stuff for the common mvmebus front-end */
     68   1.1      scw 	sc->sc_mvmebus.sc_chip = sc;
     69   1.1      scw 	sc->sc_mvmebus.sc_nmasters = VME2_NMASTERS;
     70   1.1      scw 	sc->sc_mvmebus.sc_masters = &sc->sc_master[0];
     71   1.1      scw 	sc->sc_mvmebus.sc_nslaves = VME2_NSLAVES;
     72   1.1      scw 	sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0];
     73   1.1      scw 	sc->sc_mvmebus.sc_intr_establish = vmetwo_intr_establish;
     74   1.1      scw 	sc->sc_mvmebus.sc_intr_disestablish = vmetwo_intr_disestablish;
     75   1.1      scw 
     76   1.1      scw 	/* Initialise interrupts */
     77   1.1      scw 	vmetwo_intr_init(sc);
     78   1.1      scw 
     79   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_BOARD_CONTROL);
     80   1.1      scw 	printf(": Type 2 VMEchip, scon jumper %s\n",
     81   1.1      scw 	    (reg & VME2_BOARD_CONTROL_SCON) ? "enabled" : "disabled");
     82   1.1      scw 
     83   1.1      scw 	/*
     84   1.1      scw 	 * Figure out what bits of the VMEbus we can access.
     85   1.1      scw 	 * First record the `fixed' maps (if they're enabled)
     86   1.1      scw 	 */
     87   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_IO_CONTROL);
     88   1.1      scw 	if (reg & VME2_IO_CONTROL_I1EN) {
     89   1.1      scw 		/* This range is fixed to A16, DATA */
     90   1.1      scw 		sc->sc_master[0].vr_am = VME_AM_A16 | MVMEBUS_AM_CAP_DATA;
     91   1.1      scw 
     92   1.1      scw 		/* However, SUPER/USER is selectable... */
     93   1.1      scw 		if (reg & VME2_IO_CONTROL_I1SU)
     94   1.1      scw 			sc->sc_master[0].vr_am |= MVMEBUS_AM_CAP_SUPER;
     95   1.1      scw 		else
     96   1.1      scw 			sc->sc_master[0].vr_am |= MVMEBUS_AM_CAP_USER;
     97   1.1      scw 
     98   1.1      scw 		/* As is the datasize */
     99   1.4      scw 		sc->sc_master[0].vr_datasize = VME_D32 | VME_D16;
    100   1.1      scw 		if (reg & VME2_IO_CONTROL_I1D16)
    101   1.1      scw 			sc->sc_master[0].vr_datasize &= ~VME_D32;
    102   1.1      scw 
    103   1.1      scw 		sc->sc_master[0].vr_locstart = VME2_IO0_LOCAL_START;
    104   1.1      scw 		sc->sc_master[0].vr_mask = VME2_IO0_MASK;
    105   1.1      scw 		sc->sc_master[0].vr_vmestart = VME2_IO0_VME_START;
    106   1.1      scw 		sc->sc_master[0].vr_vmeend = VME2_IO0_VME_END;
    107   1.1      scw 	} else
    108   1.1      scw 		sc->sc_master[0].vr_am = MVMEBUS_AM_DISABLED;
    109   1.1      scw 
    110   1.1      scw 	if (reg & VME2_IO_CONTROL_I2EN) {
    111   1.1      scw 		/* These two ranges are fixed to A24D16 and A32D16 */
    112   1.1      scw 		sc->sc_master[1].vr_am = VME_AM_A24;
    113   1.4      scw 		sc->sc_master[1].vr_datasize = VME_D16;
    114   1.1      scw 		sc->sc_master[2].vr_am = VME_AM_A32;
    115   1.4      scw 		sc->sc_master[2].vr_datasize = VME_D16;
    116   1.1      scw 
    117   1.1      scw 		/* However, SUPER/USER is selectable */
    118   1.1      scw 		if (reg & VME2_IO_CONTROL_I2SU) {
    119   1.1      scw 			sc->sc_master[1].vr_am |= MVMEBUS_AM_CAP_SUPER;
    120   1.1      scw 			sc->sc_master[2].vr_am |= MVMEBUS_AM_CAP_SUPER;
    121   1.1      scw 		} else {
    122   1.1      scw 			sc->sc_master[1].vr_am |= MVMEBUS_AM_CAP_USER;
    123   1.1      scw 			sc->sc_master[2].vr_am |= MVMEBUS_AM_CAP_USER;
    124   1.1      scw 		}
    125   1.1      scw 
    126   1.1      scw 		/* As is PROGRAM/DATA */
    127   1.1      scw 		if (reg & VME2_IO_CONTROL_I2PD) {
    128   1.1      scw 			sc->sc_master[1].vr_am |= MVMEBUS_AM_CAP_PROG;
    129   1.1      scw 			sc->sc_master[2].vr_am |= MVMEBUS_AM_CAP_PROG;
    130   1.1      scw 		} else {
    131   1.1      scw 			sc->sc_master[1].vr_am |= MVMEBUS_AM_CAP_DATA;
    132   1.1      scw 			sc->sc_master[2].vr_am |= MVMEBUS_AM_CAP_DATA;
    133   1.1      scw 		}
    134   1.1      scw 
    135   1.1      scw 		sc->sc_master[1].vr_locstart = VME2_IO1_LOCAL_START;
    136   1.1      scw 		sc->sc_master[1].vr_mask = VME2_IO1_MASK;
    137   1.1      scw 		sc->sc_master[1].vr_vmestart = VME2_IO1_VME_START;
    138   1.1      scw 		sc->sc_master[1].vr_vmeend = VME2_IO1_VME_END;
    139   1.1      scw 
    140   1.1      scw 		sc->sc_master[2].vr_locstart = VME2_IO2_LOCAL_START;
    141   1.1      scw 		sc->sc_master[2].vr_mask = VME2_IO2_MASK;
    142   1.1      scw 		sc->sc_master[2].vr_vmestart = VME2_IO2_VME_START;
    143   1.1      scw 		sc->sc_master[2].vr_vmeend = VME2_IO2_VME_END;
    144   1.1      scw 	} else {
    145   1.1      scw 		sc->sc_master[1].vr_am = MVMEBUS_AM_DISABLED;
    146   1.1      scw 		sc->sc_master[2].vr_am = MVMEBUS_AM_DISABLED;
    147   1.1      scw 	}
    148   1.1      scw 
    149   1.1      scw 	/*
    150   1.9  msaitoh 	 * Now read the programmable maps
    151   1.1      scw 	 */
    152   1.1      scw 	for (i = 0; i < VME2_MASTER_WINDOWS; i++)
    153   1.1      scw 		vmetwo_master_range(sc, i,
    154   1.1      scw 		    &(sc->sc_master[i + VME2_MASTER_PROG_START]));
    155   1.1      scw 
    156   1.1      scw 	/* XXX: No A16 slave yet :XXX */
    157   1.1      scw 	sc->sc_slave[VME2_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED;
    158   1.1      scw 
    159   1.1      scw 	for (i = 0; i < VME2_SLAVE_WINDOWS; i++) {
    160   1.1      scw 		vmetwo_slave_range(sc, i, VME_AM_A32,
    161   1.1      scw 		    &sc->sc_slave[i + VME2_SLAVE_PROG_START]);
    162   1.1      scw 		vmetwo_slave_range(sc, i, VME_AM_A24,
    163   1.1      scw 		    &sc->sc_slave[i + VME2_SLAVE_PROG_START + 2]);
    164   1.1      scw 	}
    165   1.1      scw 
    166   1.1      scw 	mvmebus_attach(&sc->sc_mvmebus);
    167   1.1      scw }
    168   1.1      scw 
    169   1.1      scw void
    170   1.8      dsl vmetwo_master_range(struct vmetwo_softc *sc, int range, struct mvmebus_range *vr)
    171   1.1      scw {
    172   1.1      scw 	u_int32_t start, end, attr;
    173   1.1      scw 	u_int32_t reg;
    174   1.1      scw 
    175   1.1      scw 	/*
    176   1.1      scw 	 * First, check if the range is actually enabled...
    177   1.1      scw 	 */
    178   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_MASTER_ENABLE);
    179   1.1      scw 	if ((reg & VME2_MASTER_ENABLE(range)) == 0) {
    180   1.1      scw 		vr->vr_am = MVMEBUS_AM_DISABLED;
    181   1.1      scw 		return;
    182   1.1      scw 	}
    183   1.1      scw 
    184   1.1      scw 	/*
    185   1.1      scw 	 * Fetch and record the range's attributes
    186   1.1      scw 	 */
    187   1.1      scw 	attr = vme2_lcsr_read(sc, VME2LCSR_MASTER_ATTR);
    188   1.1      scw 	attr >>= VME2_MASTER_ATTR_AM_SHIFT(range);
    189   1.1      scw 
    190   1.1      scw 	/*
    191   1.1      scw 	 * Fix up the datasizes available through this range
    192   1.1      scw 	 */
    193   1.4      scw 	vr->vr_datasize = VME_D32 | VME_D16;
    194   1.1      scw 	if (attr & VME2_MASTER_ATTR_D16)
    195   1.1      scw 		vr->vr_datasize &= ~VME_D32;
    196   1.1      scw 	attr &= VME2_MASTER_ATTR_AM_MASK;
    197   1.1      scw 
    198   1.1      scw 	vr->vr_am = (attr & VME_AM_ADRSIZEMASK) | MVMEBUS_AM2CAP(attr);
    199   1.1      scw 	switch (vr->vr_am & VME_AM_ADRSIZEMASK) {
    200   1.1      scw 	case VME_AM_A32:
    201   1.1      scw 	default:
    202   1.1      scw 		vr->vr_mask = 0xffffffffu;
    203   1.1      scw 		break;
    204   1.1      scw 
    205   1.1      scw 	case VME_AM_A24:
    206   1.1      scw 		vr->vr_mask = 0x00ffffffu;
    207   1.1      scw 		break;
    208   1.1      scw 
    209   1.1      scw 	case VME_AM_A16:
    210   1.1      scw 		vr->vr_mask = 0x0000ffffu;
    211   1.1      scw 		break;
    212   1.1      scw 	}
    213   1.1      scw 
    214   1.1      scw 	/*
    215   1.1      scw 	 * XXX
    216   1.1      scw 	 * It would be nice if users of the MI VMEbus code could pass down
    217   1.1      scw 	 * whether they can tolerate Write-Posting to their device(s).
    218   1.1      scw 	 * XXX
    219   1.1      scw 	 */
    220   1.1      scw 
    221   1.1      scw 	/*
    222   1.1      scw 	 * Fetch the local-bus start and end addresses for the range
    223   1.1      scw 	 */
    224   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_MASTER_ADDRESS(range));
    225   1.1      scw 	start = (reg & VME2_MAST_ADDRESS_START_MASK);
    226   1.1      scw 	start <<= VME2_MAST_ADDRESS_START_SHIFT;
    227   1.3      scw 	vr->vr_locstart = start & ~vr->vr_mask;
    228   1.1      scw 	end = (reg & VME2_MAST_ADDRESS_END_MASK);
    229   1.1      scw 	end <<= VME2_MAST_ADDRESS_END_SHIFT;
    230   1.3      scw 	end |= 0xffffu;
    231   1.3      scw 	end += 1;
    232   1.1      scw 
    233   1.1      scw 	/*
    234   1.1      scw 	 * Local->VMEbus map '4' has optional translation bits, so
    235   1.1      scw 	 * the VMEbus start and end addresses may need to be adjusted.
    236   1.1      scw 	 */
    237   1.1      scw 	if (range == 3 && (reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS))!=0) {
    238   1.1      scw 		uint32_t addr, sel, len = end - start;
    239   1.1      scw 
    240   1.1      scw 		reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS);
    241   1.1      scw 		reg &= VME2_MAST4_TRANS_SELECT_MASK;
    242   1.1      scw 		sel = reg << VME2_MAST4_TRANS_SELECT_SHIFT;
    243   1.1      scw 
    244   1.1      scw 		reg = vme2_lcsr_read(sc, VME2LCSR_MAST4_TRANS);
    245   1.1      scw 		reg &= VME2_MAST4_TRANS_ADDRESS_MASK;
    246   1.1      scw 		addr = reg << VME2_MAST4_TRANS_ADDRESS_SHIFT;
    247   1.1      scw 
    248   1.1      scw 		start = (addr & sel) | (start & (~sel));
    249   1.1      scw 		end = start + len;
    250   1.1      scw 		vr->vr_mask &= len - 1;
    251   1.3      scw 	}
    252   1.1      scw 
    253   1.1      scw 	/* XXX Deal with overlap of onboard RAM address space */
    254   1.1      scw 	/* XXX Then again, 167-Bug warns about this at setup time ... */
    255   1.1      scw 
    256   1.1      scw 	/*
    257   1.1      scw 	 * Fixup the addresses this range corresponds to
    258   1.1      scw 	 */
    259   1.3      scw 	vr->vr_vmestart = start & vr->vr_mask;
    260   1.3      scw 	vr->vr_vmeend = (end - 1) & vr->vr_mask;
    261   1.1      scw }
    262   1.1      scw 
    263   1.1      scw void
    264   1.8      dsl vmetwo_slave_range(struct vmetwo_softc *sc, int range, vme_am_t am, struct mvmebus_range *vr)
    265   1.1      scw {
    266   1.1      scw 	u_int32_t reg;
    267   1.1      scw 
    268   1.1      scw 	/*
    269   1.1      scw 	 * First, check if the range is actually enabled.
    270  1.10   andvar 	 * Note that bit 1 of `range' is used to indicate if we're
    271   1.1      scw 	 * looking for an A24 range (set) or an A32 range (clear).
    272   1.1      scw 	 */
    273   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_SLAVE_CTRL);
    274   1.1      scw 
    275   1.1      scw 	if (am == VME_AM_A32 && (reg & VME2_SLAVE_AMSEL_A32(range))) {
    276   1.1      scw 		vr->vr_am = VME_AM_A32;
    277   1.1      scw 		vr->vr_mask = 0xffffffffu;
    278   1.1      scw 	} else
    279   1.1      scw 	if (am == VME_AM_A24 && (reg & VME2_SLAVE_AMSEL_A24(range))) {
    280   1.1      scw 		vr->vr_am = VME_AM_A24;
    281   1.1      scw 		vr->vr_mask = 0x00ffffffu;
    282   1.1      scw 	} else {
    283   1.1      scw 		/* The range is not enabled */
    284   1.1      scw 		vr->vr_am = MVMEBUS_AM_DISABLED;
    285   1.1      scw 		return;
    286   1.1      scw 	}
    287   1.1      scw 
    288   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_DAT(range)) != 0)
    289   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_DATA;
    290   1.1      scw 
    291   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_PGM(range)) != 0)
    292   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_PROG;
    293   1.1      scw 
    294   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_USR(range)) != 0)
    295   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_USER;
    296   1.1      scw 
    297   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_SUP(range)) != 0)
    298   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_SUPER;
    299   1.1      scw 
    300   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_BLK(range)) != 0)
    301   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_BLK;
    302   1.1      scw 
    303   1.1      scw 	if ((reg & VME2_SLAVE_AMSEL_BLKD64(range)) != 0)
    304   1.1      scw 		vr->vr_am |= MVMEBUS_AM_CAP_BLKD64;
    305   1.1      scw 
    306   1.1      scw 	vr->vr_datasize = VME_D32 | VME_D16 | VME_D8;
    307   1.1      scw 
    308   1.1      scw 	/*
    309   1.1      scw 	 * Record the VMEbus start and end addresses of the slave image
    310   1.1      scw 	 */
    311   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_SLAVE_ADDRESS(range));
    312   1.1      scw 	vr->vr_vmestart = reg & VME2_SLAVE_ADDRESS_START_MASK;
    313   1.1      scw 	vr->vr_vmestart <<= VME2_SLAVE_ADDRESS_START_SHIFT;
    314   1.1      scw 	vr->vr_vmestart &= vr->vr_mask;
    315   1.1      scw 	vr->vr_vmeend = reg & VME2_SLAVE_ADDRESS_END_MASK;
    316   1.1      scw 	vr->vr_vmeend <<= VME2_SLAVE_ADDRESS_END_SHIFT;
    317   1.1      scw 	vr->vr_vmeend &= vr->vr_mask;
    318   1.1      scw 	vr->vr_vmeend |= 0xffffu;
    319   1.1      scw 
    320   1.1      scw 	/*
    321   1.1      scw 	 * Now figure out the local-bus address
    322   1.1      scw 	 */
    323   1.1      scw 	reg = vme2_lcsr_read(sc, VME2LCSR_SLAVE_CTRL);
    324   1.1      scw 	if ((reg & VME2_SLAVE_CTRL_ADDER(range)) != 0) {
    325   1.1      scw 		reg = vme2_lcsr_read(sc, VME2LCSR_SLAVE_TRANS(range));
    326   1.1      scw 		reg &= VME2_SLAVE_TRANS_ADDRESS_MASK;
    327   1.1      scw 		reg <<= VME2_SLAVE_TRANS_ADDRESS_SHIFT;
    328   1.1      scw 		vr->vr_locstart = vr->vr_vmestart + reg;
    329   1.1      scw 	} else {
    330   1.1      scw 		u_int32_t sel, addr;
    331   1.1      scw 
    332   1.1      scw 		reg = vme2_lcsr_read(sc, VME2LCSR_SLAVE_TRANS(range));
    333   1.1      scw 		sel = reg & VME2_SLAVE_TRANS_SELECT_MASK;
    334   1.1      scw 		sel <<= VME2_SLAVE_TRANS_SELECT_SHIFT;
    335   1.1      scw 		addr = reg & VME2_SLAVE_TRANS_ADDRESS_MASK;
    336   1.1      scw 		addr <<= VME2_SLAVE_TRANS_ADDRESS_SHIFT;
    337   1.1      scw 
    338   1.1      scw 		vr->vr_locstart = addr & sel;
    339   1.1      scw 		vr->vr_locstart |= vr->vr_vmestart & (~sel);
    340   1.1      scw 	}
    341   1.1      scw }
    342