nand.c revision 1.1
1 /* $NetBSD: nand.c,v 1.1 2011/02/26 18:07:31 ahoka Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.1 2011/02/26 18:07:31 ahoka Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/sysctl.h> 46 47 #include <dev/flash/flash.h> 48 #include <dev/nand/nand.h> 49 #include <dev/nand/onfi.h> 50 #include <dev/nand/hamming.h> 51 #include <dev/nand/nand_bbt.h> 52 #include <dev/nand/nand_crc.h> 53 54 #include "opt_nand.h" 55 56 int nand_match(device_t parent, cfdata_t match, void *aux); 57 void nand_attach(device_t parent, device_t self, void *aux); 58 int nand_detach(device_t device, int flags); 59 bool nand_shutdown(device_t self, int howto); 60 61 int nand_print(void *aux, const char *pnp); 62 63 static int nand_search(device_t parent, cfdata_t cf, const int *ldesc, 64 void *aux); 65 static void nand_address_row(device_t self, size_t row); 66 static void nand_address_column(device_t self, size_t row, size_t column); 67 static void nand_readid(device_t self, struct nand_chip *chip); 68 static void nand_read_parameter_page(device_t self, struct nand_chip *chip); 69 static const char *nand_midtoname(int id); 70 static int nand_scan_media(device_t self, struct nand_chip *chip); 71 static bool nand_check_wp(device_t self); 72 73 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 74 nand_match, nand_attach, nand_detach, NULL); 75 76 #ifdef NAND_DEBUG 77 int nanddebug = NAND_DEBUG; 78 #endif 79 80 int nand_cachesync_timeout = 1; 81 int nand_cachesync_nodenum; 82 83 const struct nand_manufacturer nand_mfrs[] = { 84 { NAND_MFR_AMD, "AMD" }, 85 { NAND_MFR_FUJITSU, "Fujitsu" }, 86 { NAND_MFR_RENESAS, "Renesas" }, 87 { NAND_MFR_STMICRO, "ST Micro" }, 88 { NAND_MFR_MICRON, "Micron" }, 89 { NAND_MFR_NATIONAL, "National" }, 90 { NAND_MFR_TOSHIBA, "Toshiba" }, 91 { NAND_MFR_HYNIX, "Hynix" }, 92 { NAND_MFR_SAMSUNG, "Samsung" }, 93 { NAND_MFR_UNKNOWN, "Unknown" } 94 }; 95 96 /* ARGSUSED */ 97 int 98 nand_match(device_t parent, cfdata_t match, void *aux) 99 { 100 /* pseudo device, always attaches */ 101 return 1; 102 } 103 104 void 105 nand_attach(device_t parent, device_t self, void *aux) 106 { 107 struct nand_softc *sc = device_private(self); 108 struct nand_attach_args *naa = aux; 109 struct nand_chip *chip = &sc->sc_chip; 110 // struct flash_interface *flash_if; 111 // int i; 112 113 sc->sc_dev = self; 114 sc->nand_dev = parent; 115 sc->nand_if = naa->naa_nand_if; 116 117 // sc->nand_softc = device_private(parent); 118 119 aprint_naive("\n"); 120 // aprint_normal(": NAND flash memory\n"); 121 122 if (nand_check_wp(self)) { 123 aprint_error("NAND chip is write protected!\n"); 124 return; 125 } 126 if (nand_scan_media(self, chip)) 127 return; 128 129 /* allocate cache */ 130 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 131 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 132 133 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 134 135 if (nand_sync_thread_start(self)) { 136 goto error; 137 } 138 139 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 140 aprint_error_dev(sc->sc_dev, 141 "couldn't establish power handler\n"); 142 143 #ifdef NAND_BBT 144 nand_bbt_init(self); 145 nand_bbt_scan(self); 146 #endif 147 148 /* 149 * Attach all our devices 150 */ 151 config_search_ia(nand_search, self, NULL, NULL); 152 153 return; 154 error: 155 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 156 kmem_free(chip->nc_page_cache, chip->nc_page_size); 157 mutex_destroy(&sc->sc_device_lock); 158 } 159 160 static int 161 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 162 { 163 struct nand_softc *sc = device_private(parent); 164 struct nand_chip *chip = &sc->sc_chip; 165 struct flash_interface *flash_if; 166 struct flash_attach_args faa; 167 168 flash_if = kmem_alloc(sizeof(*flash_if), KM_SLEEP); 169 170 flash_if->type = FLASH_TYPE_NAND; 171 172 flash_if->read = nand_flash_read; 173 flash_if->write = nand_flash_write; 174 flash_if->erase = nand_flash_erase; 175 flash_if->block_isbad = nand_flash_isbad; 176 flash_if->block_markbad = nand_flash_markbad; 177 178 flash_if->submit = nand_io_submit; 179 180 flash_if->erasesize = chip->nc_block_size; 181 flash_if->page_size = chip->nc_page_size; 182 flash_if->writesize = chip->nc_page_size; 183 184 flash_if->partition.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 185 186 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 187 flash_if->size = chip->nc_size - 188 flash_if->partition.part_offset; 189 flash_if->partition.part_size = flash_if->size; 190 } else { 191 flash_if->size = cf->cf_loc[FLASHBUSCF_SIZE]; 192 flash_if->partition.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 193 } 194 195 if (cf->cf_loc[FLASHBUSCF_READONLY]) 196 flash_if->partition.part_flags = FLASH_PART_READONLY; 197 else 198 flash_if->partition.part_flags = 0; 199 200 faa.flash_if = flash_if; 201 202 if (config_match(parent, cf, &faa)) { 203 config_attach(parent, cf, &faa, nand_print); 204 return 0; 205 } else { 206 kmem_free(flash_if, sizeof(*flash_if)); 207 } 208 209 return 1; 210 } 211 212 int 213 nand_detach(device_t self, int flags) 214 { 215 struct nand_softc *sc = device_private(self); 216 struct nand_chip *chip = &sc->sc_chip; 217 int ret = 0; 218 219 #ifdef NAND_BBT 220 nand_bbt_detach(self); 221 #endif 222 nand_sync_thread_stop(self); 223 224 /* free oob cache */ 225 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 226 kmem_free(chip->nc_page_cache, chip->nc_page_size); 227 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 228 229 mutex_destroy(&sc->sc_device_lock); 230 231 pmf_device_deregister(sc->sc_dev); 232 233 return ret; 234 } 235 236 int 237 nand_print(void *aux, const char *pnp) 238 { 239 if (pnp != NULL) 240 aprint_normal("nand at %s\n", pnp); 241 242 return UNCONF; 243 } 244 245 device_t 246 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 247 { 248 struct nand_attach_args arg; 249 250 KASSERT(nand_if != NULL); 251 252 arg.naa_nand_if = nand_if; 253 return config_found_ia(parent, "nandbus", &arg, nand_print); 254 } 255 256 static const char * 257 nand_midtoname(int id) 258 { 259 int i; 260 261 for (i = 0; nand_mfrs[i].id != 0; i++) { 262 if (nand_mfrs[i].id == id) 263 return nand_mfrs[i].name; 264 } 265 266 KASSERT(nand_mfrs[i].id == 0); 267 268 return nand_mfrs[i].name; 269 } 270 271 #if 0 272 /* handle quirks here */ 273 static void 274 nand_quirks(device_t self, struct nand_chip *chip) 275 { 276 /* this is an example only! */ 277 switch (chip->nc_manf_id) { 278 case NAND_MFR_SAMSUNG: 279 if (chip->nc_dev_id == 0x00) { 280 /* do something only samsung chips need */ 281 /* or */ 282 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 283 } 284 } 285 286 return; 287 } 288 #endif 289 290 /** 291 * scan media to determine the chip's properties 292 * this function resets the device 293 */ 294 static int 295 nand_scan_media(device_t self, struct nand_chip *chip) 296 { 297 struct nand_softc *sc = device_private(self); 298 struct nand_ecc *ecc; 299 uint8_t onfi_signature[4]; 300 301 nand_select(self, true); 302 nand_command(self, ONFI_RESET); 303 nand_select(self, false); 304 305 nand_select(self, true); 306 nand_command(self, ONFI_READ_ID); 307 nand_address(self, 0x20); 308 nand_read_byte(self, &onfi_signature[0]); 309 nand_read_byte(self, &onfi_signature[1]); 310 nand_read_byte(self, &onfi_signature[2]); 311 nand_read_byte(self, &onfi_signature[3]); 312 nand_select(self, false); 313 314 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 315 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 316 aprint_error_dev(self, 317 "device does not support the ONFI specification\n"); 318 319 return 1; 320 } 321 322 nand_readid(self, chip); 323 324 aprint_normal(": NAND Flash\n"); 325 326 aprint_debug_dev(self, 327 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 328 chip->nc_manf_id, 329 nand_midtoname(chip->nc_manf_id), 330 chip->nc_dev_id); 331 332 nand_read_parameter_page(self, chip); 333 334 ecc = chip->nc_ecc = &sc->nand_if->ecc; 335 336 /* 337 * calculate the place of ecc data in oob 338 * we try to be compatible with Linux here 339 */ 340 switch (chip->nc_spare_size) { 341 case 8: 342 ecc->necc_offset = 0; 343 break; 344 case 16: 345 ecc->necc_offset = 0; 346 break; 347 case 64: 348 ecc->necc_offset = 40; 349 break; 350 case 128: 351 ecc->necc_offset = 80; 352 break; 353 default: 354 panic("OOB size is unexpected"); 355 } 356 357 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 358 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 359 360 /* check if we fit in oob */ 361 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 362 panic("NAND ECC bits dont fit in OOB"); 363 } 364 365 /* TODO: mark free oob area available for file systems */ 366 367 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 368 369 /* 370 * calculate badblock marker offset in oob 371 * we try to be compatible with linux here 372 */ 373 if (chip->nc_page_size > 512) 374 chip->nc_badmarker_offs = 0; 375 else 376 chip->nc_badmarker_offs = 5; 377 378 /* Calculate page shift and mask */ 379 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 380 chip->nc_page_mask = ~(chip->nc_page_size - 1); 381 /* same for block */ 382 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 383 chip->nc_block_mask = ~(chip->nc_block_size - 1); 384 385 /* look for quirks here if needed in future */ 386 /* nand_quirks(self, chip); */ 387 388 return 0; 389 } 390 391 static void 392 nand_readid(device_t self, struct nand_chip *chip) 393 { 394 nand_select(self, true); 395 nand_command(self, ONFI_READ_ID); 396 nand_address(self, 0x00); 397 nand_read_byte(self, &chip->nc_manf_id); 398 nand_read_byte(self, &chip->nc_dev_id); 399 nand_select(self, false); 400 } 401 402 /* read the parameter page. TODO: check CRC! */ 403 static void 404 nand_read_parameter_page(device_t self, struct nand_chip *chip) 405 { 406 struct onfi_parameter_page params; 407 uint8_t *bufp; 408 uint8_t vendor[13], model[21]; 409 uint16_t crc; 410 int i; 411 412 KASSERT(sizeof(params) == 256); 413 414 nand_select(self, true); 415 nand_command(self, ONFI_READ_PARAMETER_PAGE); 416 nand_address(self, 0x00); 417 418 nand_busy(self); 419 420 bufp = (uint8_t *)¶ms; 421 for (i = 0; i < 256; i++) { 422 nand_read_byte(self, &bufp[i]); 423 } 424 nand_select(self, false); 425 426 /* validate the parameter page with the crc */ 427 crc = nand_crc16(bufp, 254); 428 429 if (crc != params.param_integrity_crc) { 430 aprint_error_dev(self, "parameter page crc check failed\n"); 431 /* TODO: we should read the next parameter page copy */ 432 } 433 434 /* strip manufacturer and model string */ 435 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 436 for (i = 11; i > 0 && vendor[i] == ' '; i--) 437 vendor[i] = 0; 438 strlcpy(model, params.param_model, sizeof(model)); 439 for (i = 19; i > 0 && model[i] == ' '; i--) 440 model[i] = 0; 441 442 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 443 444 aprint_normal_dev(self, 445 "page size: %u bytes, spare size: %u bytes, block size: %u bytes\n", 446 params.param_pagesize, params.param_sparesize, 447 params.param_blocksize * params.param_pagesize); 448 449 aprint_normal_dev(self, 450 "LUN size: %u blocks, LUNs: %u, total storage size: %u MB\n", 451 params.param_lunsize, params.param_numluns, 452 params.param_blocksize * params.param_pagesize * 453 params.param_lunsize * params.param_numluns / 1024 / 1024); 454 455 /* XXX TODO multiple LUNs */ 456 if (__predict_false(params.param_numluns != 1)) 457 panic("more than one LUNs are not supported yet!\n"); 458 459 chip->nc_size = params.param_pagesize * params.param_blocksize * 460 params.param_lunsize * params.param_numluns; 461 462 chip->nc_page_size = params.param_pagesize; 463 chip->nc_block_pages = params.param_blocksize; 464 chip->nc_block_size = params.param_blocksize * params.param_pagesize; 465 chip->nc_spare_size = params.param_sparesize; 466 467 /* the lower 4 bits contain the row address cycles */ 468 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 469 /* the upper 4 bits contain the column address cycles */ 470 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 471 472 #ifdef NAND_VERBOSE 473 aprint_normal_dev(self, "column cycles: %d, row cycles: %d\n", 474 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row); 475 #endif 476 477 if (params.param_features & ONFI_FEATURE_16BIT) 478 chip->nc_flags |= NC_BUSWIDTH_16; 479 480 if (params.param_features & ONFI_FEATURE_EXTENDED_PARAM) 481 chip->nc_flags |= NC_EXTENDED_PARAM; 482 } 483 484 /* ARGSUSED */ 485 bool 486 nand_shutdown(device_t self, int howto) 487 { 488 return true; 489 } 490 491 static void 492 nand_address_column(device_t self, size_t row, size_t column) 493 { 494 struct nand_softc *sc = device_private(self); 495 struct nand_chip *chip = &sc->sc_chip; 496 uint8_t i; 497 498 DPRINTF(("addressing row: 0x%jx column: %zu\n", 499 (uintmax_t )row, column)); 500 501 /* XXX TODO */ 502 row >>= chip->nc_page_shift; 503 // DPRINTF(("row address is: 0x%jx\n", (uintmax_t )row)); 504 505 /* Write the column (subpage) address */ 506 if (chip->nc_flags & NC_BUSWIDTH_16) 507 column >>= 1; 508 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 509 nand_address(self, column & 0xff); 510 511 /* Write the row (page) address */ 512 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 513 nand_address(self, row & 0xff); 514 } 515 516 static void 517 nand_address_row(device_t self, size_t row) 518 { 519 struct nand_softc *sc = device_private(self); 520 struct nand_chip *chip = &sc->sc_chip; 521 off_t i; 522 523 // DPRINTF(("addressing row: %zu\n", row)); 524 525 /* XXX TODO */ 526 row >>= chip->nc_page_shift; 527 528 /* Write the row (page) address */ 529 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 530 nand_address(self, row & 0xff); 531 } 532 533 static inline uint8_t 534 nand_get_status(device_t self) 535 { 536 uint8_t status; 537 538 nand_command(self, ONFI_READ_STATUS); 539 nand_busy(self); 540 nand_read_byte(self, &status); 541 542 return status; 543 } 544 545 static bool 546 nand_check_wp(device_t self) 547 { 548 if (nand_get_status(self) & 0x80) 549 return false; 550 else 551 return true; 552 } 553 554 static void 555 nand_prepare_read(device_t self, flash_addr_t row, flash_addr_t column) 556 { 557 nand_command(self, ONFI_READ); 558 nand_address_column(self, row, column); 559 nand_command(self, ONFI_READ_START); 560 561 nand_busy(self); 562 } 563 564 /* read a page with ecc correction */ 565 int 566 nand_read_page(device_t self, size_t offset, uint8_t *data) 567 { 568 struct nand_softc *sc = device_private(self); 569 struct nand_chip *chip = &sc->sc_chip; 570 size_t b, bs, e, cs; 571 uint8_t *ecc; 572 int result; 573 574 DPRINTF(("nand read page\n")); 575 576 nand_prepare_read(self, offset, 0); 577 578 bs = chip->nc_ecc->necc_block_size; 579 cs = chip->nc_ecc->necc_code_size; 580 581 /* decide if we access by 8 or 16 bits */ 582 if (chip->nc_flags & NC_BUSWIDTH_16) { 583 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 584 nand_ecc_prepare(self, NAND_ECC_READ); 585 nand_read_buf_word(self, data + b, bs); 586 nand_ecc_compute(self, data + b, 587 chip->nc_ecc_cache + e); 588 } 589 } else { 590 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 591 nand_ecc_prepare(self, NAND_ECC_READ); 592 nand_read_buf_byte(self, data + b, bs); 593 nand_ecc_compute(self, data + b, 594 chip->nc_ecc_cache + e); 595 } 596 } 597 598 // nand_dump_data("page", data, chip->nc_page_size); 599 600 nand_read_oob(self, offset, chip->nc_oob_cache); 601 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 602 603 /* useful for debugging new ecc drivers */ 604 #if 0 605 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 606 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 607 printf("0x"); 608 for (b = 0; b < cs; b++) { 609 printf("%.2hhx", ecc[e+b]); 610 } 611 printf(" 0x"); 612 for (b = 0; b < cs; b++) { 613 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 614 } 615 printf("\n"); 616 } 617 printf("--------------\n"); 618 #endif 619 620 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 621 result = nand_ecc_correct(self, data + b, ecc + e, 622 chip->nc_ecc_cache + e); 623 624 switch (result) { 625 case NAND_ECC_OK: 626 break; 627 case NAND_ECC_CORRECTED: 628 aprint_error_dev(self, 629 "data corrected with ECC at page offset 0x%jx " 630 "block %zu\n", (uintmax_t)offset, b); 631 break; 632 case NAND_ECC_TWOBIT: 633 aprint_error_dev(self, 634 "uncorrectable ECC error at page offset 0x%jx " 635 "block %zu\n", (uintmax_t)offset, b); 636 return EIO; 637 break; 638 case NAND_ECC_INVALID: 639 aprint_error_dev(self, 640 "invalid ECC in oob at page offset 0x%jx " 641 "block %zu\n", (uintmax_t)offset, b); 642 return EIO; 643 break; 644 default: 645 panic("invalid ECC correction errno"); 646 } 647 } 648 649 return 0; 650 } 651 652 static int 653 nand_program_page(device_t self, size_t page, const uint8_t *data) 654 { 655 struct nand_softc *sc = device_private(self); 656 struct nand_chip *chip = &sc->sc_chip; 657 size_t bs, cs, e, b; 658 uint8_t status; 659 uint8_t *ecc; 660 661 nand_command(self, ONFI_PAGE_PROGRAM); 662 nand_address_column(self, page, 0); 663 664 nand_busy(self); 665 666 bs = chip->nc_ecc->necc_block_size; 667 cs = chip->nc_ecc->necc_code_size; 668 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 669 670 /* XXX code duplication */ 671 /* decide if we access by 8 or 16 bits */ 672 if (chip->nc_flags & NC_BUSWIDTH_16) { 673 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 674 nand_ecc_prepare(self, NAND_ECC_WRITE); 675 nand_write_buf_word(self, data + b, bs); 676 nand_ecc_compute(self, data + b, ecc + e); 677 } 678 /* write oob with ecc correction code */ 679 nand_write_buf_word(self, chip->nc_oob_cache, 680 chip->nc_spare_size); 681 } else { 682 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 683 nand_ecc_prepare(self, NAND_ECC_WRITE); 684 nand_write_buf_byte(self, data + b, bs); 685 nand_ecc_compute(self, data + b, ecc + e); 686 } 687 /* write oob with ecc correction code */ 688 nand_write_buf_byte(self, chip->nc_oob_cache, 689 chip->nc_spare_size); 690 } 691 692 nand_command(self, ONFI_PAGE_PROGRAM_START); 693 694 nand_busy(self); 695 696 #if 0 697 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 698 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 699 printf("0x"); 700 for (b = 0; b < cs; b++) { 701 printf("%.2hhx", ecc[e+b]); 702 } 703 printf("\n"); 704 } 705 printf("--------------\n"); 706 #endif 707 708 status = nand_get_status(self); 709 KASSERT(status & ONFI_STATUS_RDY); 710 if (status & ONFI_STATUS_FAIL) { 711 aprint_error_dev(self, "page program failed!\n"); 712 return EIO; 713 } 714 715 return 0; 716 } 717 718 int 719 nand_read_oob(device_t self, size_t page, void *oob) 720 { 721 struct nand_softc *sc = device_private(self); 722 struct nand_chip *chip = &sc->sc_chip; 723 724 nand_prepare_read(self, page, chip->nc_page_size); 725 726 if (chip->nc_flags & NC_BUSWIDTH_16) 727 nand_read_buf_word(self, oob, chip->nc_spare_size); 728 else 729 nand_read_buf_byte(self, oob, chip->nc_spare_size); 730 731 // nand_dump_data("oob", oob, chip->nc_spare_size); 732 733 return 0; 734 } 735 736 static int 737 nand_write_oob(device_t self, size_t offset, const void *oob) 738 { 739 struct nand_softc *sc = device_private(self); 740 struct nand_chip *chip = &sc->sc_chip; 741 uint8_t status; 742 743 nand_command(self, ONFI_PAGE_PROGRAM); 744 nand_address_column(self, offset, chip->nc_page_size); 745 nand_command(self, ONFI_PAGE_PROGRAM_START); 746 747 nand_busy(self); 748 749 if (chip->nc_flags & NC_BUSWIDTH_16) 750 nand_write_buf_word(self, oob, chip->nc_spare_size); 751 else 752 nand_write_buf_byte(self, oob, chip->nc_spare_size); 753 754 status = nand_get_status(self); 755 KASSERT(status & ONFI_STATUS_RDY); 756 if (status & ONFI_STATUS_FAIL) 757 return EIO; 758 else 759 return 0; 760 } 761 762 void 763 nand_markbad(device_t self, size_t offset) 764 { 765 struct nand_softc *sc = device_private(self); 766 struct nand_chip *chip = &sc->sc_chip; 767 flash_addr_t blockoffset, marker; 768 #ifdef NAND_BBT 769 flash_addr_t block; 770 771 block = offset / chip->nc_block_size; 772 773 nand_bbt_block_markbad(self, block); 774 #endif 775 blockoffset = offset & chip->nc_block_mask; 776 marker = chip->nc_badmarker_offs & ~0x01; 777 778 /* check if it is already marked bad */ 779 if (nand_isbad(self, blockoffset)) 780 return; 781 782 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 783 784 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 785 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 786 787 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 788 } 789 790 bool 791 nand_isfactorybad(device_t self, flash_addr_t offset) 792 { 793 struct nand_softc *sc = device_private(self); 794 struct nand_chip *chip = &sc->sc_chip; 795 flash_addr_t block, first_page, last_page, page; 796 int i; 797 798 /* Check for factory bad blocks first 799 * Factory bad blocks are marked in the first or last 800 * page of the blocks, see: ONFI 2.2, 3.2.2. 801 */ 802 block = offset / chip->nc_block_size; 803 first_page = block * chip->nc_block_size; 804 last_page = (block + 1) * chip->nc_block_size 805 - chip->nc_page_size; 806 807 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 808 /* address OOB */ 809 nand_prepare_read(self, page, chip->nc_page_size); 810 811 if (chip->nc_flags & NC_BUSWIDTH_16) { 812 uint16_t word; 813 nand_read_word(self, &word); 814 if (word == 0x0000) 815 return true; 816 } else { 817 uint8_t byte; 818 nand_read_byte(self, &byte); 819 if (byte == 0x00) 820 return true; 821 } 822 } 823 824 return false; 825 } 826 827 bool 828 nand_iswornoutbad(device_t self, flash_addr_t offset) 829 { 830 struct nand_softc *sc = device_private(self); 831 struct nand_chip *chip = &sc->sc_chip; 832 flash_addr_t block; 833 834 /* we inspect the first page of the block */ 835 block = offset & chip->nc_block_mask; 836 837 /* Linux/u-boot compatible badblock handling */ 838 if (chip->nc_flags & NC_BUSWIDTH_16) { 839 uint16_t word, mark; 840 841 nand_prepare_read(self, block, 842 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 843 844 nand_read_word(self, &word); 845 mark = htole16(word); 846 if (chip->nc_badmarker_offs & 0x01) 847 mark >>= 8; 848 if ((mark & 0xff) != 0xff) 849 return true; 850 } else { 851 uint8_t byte; 852 853 nand_prepare_read(self, block, 854 chip->nc_page_size + chip->nc_badmarker_offs); 855 856 nand_read_byte(self, &byte); 857 if (byte != 0xff) 858 return true; 859 } 860 861 return false; 862 } 863 864 bool 865 nand_isbad(device_t self, flash_addr_t offset) 866 { 867 #ifdef NAND_BBT 868 struct nand_softc *sc = device_private(self); 869 struct nand_chip *chip = &sc->sc_chip; 870 flash_addr_t block; 871 872 block = offset / chip->nc_block_size; 873 874 return nand_bbt_block_isbad(self, block); 875 #else 876 /* ONFI host requirement */ 877 if (nand_isfactorybad(self, offset)) 878 return true; 879 880 /* Look for Linux/U-Boot compatible bad marker */ 881 if (nand_iswornoutbad(self, offset)) 882 return true; 883 884 return false; 885 #endif 886 } 887 888 int 889 nand_erase_block(device_t self, size_t offset) 890 { 891 // struct nand_softc *sc = device_private(self); 892 // struct nand_chip *chip = &sc->sc_chip; 893 uint8_t status; 894 895 /* xxx calculate first page of block for address? */ 896 897 nand_command(self, ONFI_BLOCK_ERASE); 898 nand_address_row(self, offset); 899 nand_command(self, ONFI_BLOCK_ERASE_START); 900 901 nand_busy(self); 902 903 status = nand_get_status(self); 904 KASSERT(status & ONFI_STATUS_RDY); 905 if (status & ONFI_STATUS_FAIL) { 906 aprint_error_dev(self, "block erase failed!\n"); 907 nand_markbad(self, offset); 908 return EIO; 909 } else { 910 return 0; 911 } 912 } 913 914 /* default functions for driver development */ 915 916 /* default ECC using hamming code of 256 byte chunks */ 917 int 918 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 919 { 920 hamming_compute_256(data, code); 921 922 return 0; 923 } 924 925 int 926 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 927 const uint8_t *compcode) 928 { 929 return hamming_correct_256(data, origcode, compcode); 930 } 931 932 void 933 nand_default_select(device_t self, bool enable) 934 { 935 /* do nothing */ 936 return; 937 } 938 939 /* implementation of the block device API */ 940 941 /* 942 * handle (page) unaligned write to nand 943 */ 944 static int 945 nand_flash_write_unaligned(device_t self, off_t offset, size_t len, 946 size_t *retlen, const uint8_t *buf) 947 { 948 struct nand_softc *sc = device_private(self); 949 struct nand_chip *chip = &sc->sc_chip; 950 flash_addr_t first, last, firstoff; 951 const uint8_t *bufp; 952 flash_addr_t addr; 953 size_t left, count; 954 int error, i; 955 956 /* to debug chfs */ 957 // printf("unaligned write to nand\n"); 958 959 first = offset & chip->nc_page_mask; 960 firstoff = offset & ~chip->nc_page_mask; 961 /* XXX check if this should be len - 1 */ 962 last = (offset + len) & chip->nc_page_mask; 963 count = last - first + 1; 964 965 addr = first; 966 *retlen = 0; 967 968 if (count == 1) { 969 if (nand_isbad(self, addr)) { 970 aprint_error_dev(self, 971 "nand_flash_write_unaligned: " 972 "bad block encountered\n"); 973 return EIO; 974 } 975 976 error = nand_read_page(self, addr, chip->nc_page_cache); 977 if (error) 978 return error; 979 980 memcpy(chip->nc_page_cache + firstoff, buf, len); 981 982 error = nand_program_page(self, addr, chip->nc_page_cache); 983 if (error) 984 return error; 985 986 *retlen = len; 987 return 0; 988 } 989 990 bufp = buf; 991 left = len; 992 993 for (i = 0; i < count && left != 0; i++) { 994 if (nand_isbad(self, addr)) { 995 aprint_error_dev(self, 996 "nand_flash_write_unaligned: " 997 "bad block encountered\n"); 998 return EIO; 999 } 1000 1001 if (i == 0) { 1002 error = nand_read_page(self, 1003 addr, chip->nc_page_cache); 1004 if (error) 1005 return error; 1006 1007 memcpy(chip->nc_page_cache + firstoff, 1008 bufp, chip->nc_page_size - firstoff); 1009 1010 printf("program page: %s: %d\n", __FILE__, __LINE__); 1011 error = nand_program_page(self, 1012 addr, chip->nc_page_cache); 1013 if (error) 1014 return error; 1015 1016 bufp += chip->nc_page_size - firstoff; 1017 left -= chip->nc_page_size - firstoff; 1018 *retlen += chip->nc_page_size - firstoff; 1019 1020 } else if (i == count - 1) { 1021 error = nand_read_page(self, 1022 addr, chip->nc_page_cache); 1023 if (error) 1024 return error; 1025 1026 memcpy(chip->nc_page_cache, bufp, left); 1027 1028 error = nand_program_page(self, 1029 addr, chip->nc_page_cache); 1030 if (error) 1031 return error; 1032 1033 *retlen += left; 1034 KASSERT(left < chip->nc_page_size); 1035 1036 } else { 1037 /* XXX debug */ 1038 if (left > chip->nc_page_size) { 1039 printf("left: %zu, i: %d, count: %zu\n", 1040 (size_t )left, i, count); 1041 } 1042 KASSERT(left > chip->nc_page_size); 1043 1044 error = nand_program_page(self, addr, bufp); 1045 if (error) 1046 return error; 1047 1048 bufp += chip->nc_page_size; 1049 left -= chip->nc_page_size; 1050 *retlen += chip->nc_page_size; 1051 } 1052 1053 addr += chip->nc_page_size; 1054 } 1055 1056 KASSERT(*retlen == len); 1057 1058 return 0; 1059 } 1060 1061 int 1062 nand_flash_write(device_t self, off_t offset, size_t len, size_t *retlen, 1063 const uint8_t *buf) 1064 { 1065 struct nand_softc *sc = device_private(self); 1066 struct nand_chip *chip = &sc->sc_chip; 1067 const uint8_t *bufp; 1068 size_t pages, page; 1069 daddr_t addr; 1070 int error = 0; 1071 1072 if ((offset + len) > chip->nc_size) { 1073 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1074 " is over device size (0x%jx)\n", 1075 (uintmax_t)offset, (uintmax_t)len, 1076 (uintmax_t)chip->nc_size)); 1077 return EINVAL; 1078 } 1079 1080 if (len % chip->nc_page_size != 0 || 1081 offset % chip->nc_page_size != 0) { 1082 return nand_flash_write_unaligned(self, 1083 offset, len, retlen, buf); 1084 } 1085 1086 pages = len / chip->nc_page_size; 1087 KASSERT(pages != 0); 1088 *retlen = 0; 1089 1090 addr = offset; 1091 bufp = buf; 1092 1093 mutex_enter(&sc->sc_device_lock); 1094 for (page = 0; page < pages; page++) { 1095 /* do we need this check here? */ 1096 if (nand_isbad(self, addr)) { 1097 aprint_error_dev(self, 1098 "nand_flash_write: bad block encountered\n"); 1099 1100 error = EIO; 1101 goto out; 1102 } 1103 1104 error = nand_program_page(self, addr, bufp); 1105 if (error) 1106 goto out; 1107 1108 addr += chip->nc_page_size; 1109 bufp += chip->nc_page_size; 1110 *retlen += chip->nc_page_size; 1111 } 1112 out: 1113 mutex_exit(&sc->sc_device_lock); 1114 DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len)); 1115 1116 return error; 1117 } 1118 1119 /* 1120 * handle (page) unaligned read from nand 1121 */ 1122 static int 1123 nand_flash_read_unaligned(device_t self, size_t offset, 1124 size_t len, size_t *retlen, uint8_t *buf) 1125 { 1126 struct nand_softc *sc = device_private(self); 1127 struct nand_chip *chip = &sc->sc_chip; 1128 daddr_t first, last, count, firstoff; 1129 uint8_t *bufp; 1130 daddr_t addr; 1131 size_t left; 1132 int error = 0, i; 1133 1134 /* to debug chfs */ 1135 // printf("unaligned read from nand\n"); 1136 1137 first = offset & chip->nc_page_mask; 1138 firstoff = offset & ~chip->nc_page_mask; 1139 last = (offset + len) & chip->nc_page_mask; 1140 // lastoff = chip->nc_page_size - (offset + len) & ~chip->nc_page_mask; 1141 count = (last - first) / chip->nc_page_size + 1; 1142 1143 addr = first; 1144 bufp = buf; 1145 left = len; 1146 *retlen = 0; 1147 1148 mutex_enter(&sc->sc_device_lock); 1149 if (count == 1) { 1150 error = nand_read_page(self, addr, chip->nc_page_cache); 1151 if (error) 1152 goto out; 1153 1154 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1155 1156 *retlen = len; 1157 goto out; 1158 } 1159 1160 for (i = 0; i < count && left != 0; i++) { 1161 error = nand_read_page(self, addr, chip->nc_page_cache); 1162 if (error) 1163 goto out; 1164 1165 if (i == 0) { 1166 memcpy(bufp, chip->nc_page_cache + firstoff, 1167 chip->nc_page_size - firstoff); 1168 1169 bufp += chip->nc_page_size - firstoff; 1170 left -= chip->nc_page_size - firstoff; 1171 *retlen += chip->nc_page_size - firstoff; 1172 1173 } else if (i == count - 1) { 1174 memcpy(bufp, chip->nc_page_cache, left); 1175 *retlen += left; 1176 KASSERT(left < chip->nc_page_size); 1177 1178 } else { 1179 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1180 1181 bufp += chip->nc_page_size; 1182 left -= chip->nc_page_size; 1183 *retlen += chip->nc_page_size; 1184 } 1185 1186 addr += chip->nc_page_size; 1187 } 1188 1189 KASSERT(*retlen == len); 1190 1191 out: 1192 mutex_exit(&sc->sc_device_lock); 1193 1194 return error; 1195 } 1196 1197 int 1198 nand_flash_read(device_t self, off_t offset, size_t len, size_t *retlen, 1199 uint8_t *buf) 1200 { 1201 struct nand_softc *sc = device_private(self); 1202 struct nand_chip *chip = &sc->sc_chip; 1203 uint8_t *bufp; 1204 size_t addr; 1205 size_t i, pages; 1206 int error = 0; 1207 1208 *retlen = 0; 1209 1210 DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n", 1211 (uintmax_t)offset, len)); 1212 1213 if (__predict_false((offset + len) > chip->nc_size)) { 1214 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu)," 1215 " is over device size (%ju)\n", (uintmax_t)offset, 1216 len, (uintmax_t)chip->nc_size)); 1217 return EINVAL; 1218 } 1219 1220 /* Handle unaligned access, shouldnt be needed when using the 1221 * block device, as strategy handles it, so only low level 1222 * accesses will use this path 1223 */ 1224 // if (len < chip->nc_page_size) 1225 // panic("TODO page size is larger than read size"); 1226 1227 if (len % chip->nc_page_size != 0 || 1228 offset % chip->nc_page_size != 0) { 1229 return nand_flash_read_unaligned(self, 1230 offset, len, retlen, buf); 1231 } 1232 1233 bufp = buf; 1234 addr = offset; 1235 pages = len / chip->nc_page_size; 1236 1237 mutex_enter(&sc->sc_device_lock); 1238 for (i = 0; i < pages; i++) { 1239 /* do we need this check here? */ 1240 if (nand_isbad(self, addr)) { 1241 aprint_error_dev(self, "bad block encountered\n"); 1242 error = EIO; 1243 goto out; 1244 } 1245 error = nand_read_page(self, addr, bufp); 1246 if (error) 1247 goto out; 1248 1249 bufp += chip->nc_page_size; 1250 addr += chip->nc_page_size; 1251 *retlen += chip->nc_page_size; 1252 } 1253 1254 out: 1255 mutex_exit(&sc->sc_device_lock); 1256 1257 return error; 1258 } 1259 1260 int 1261 nand_flash_isbad(device_t self, uint64_t ofs) 1262 { 1263 struct nand_softc *sc = device_private(self); 1264 struct nand_chip *chip = &sc->sc_chip; 1265 bool result; 1266 // uint64_t block_num; 1267 1268 if (ofs > chip->nc_size) { 1269 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1270 " device size (0x%jx)\n", (uintmax_t)ofs, 1271 (uintmax_t)chip->nc_size)); 1272 return EINVAL; 1273 } 1274 1275 if (ofs % chip->nc_block_size != 0) { 1276 panic("offset (0x%jx) is not the multiple of block size (%ju)", 1277 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1278 } 1279 // block_num = ofs / fl->flash_if.erasesize; 1280 1281 mutex_enter(&sc->sc_device_lock); 1282 result = nand_isbad(self, ofs); 1283 mutex_exit(&sc->sc_device_lock); 1284 1285 if (result) 1286 return 1; 1287 else 1288 return 0; 1289 } 1290 1291 int 1292 nand_flash_markbad(device_t self, uint64_t ofs) 1293 { 1294 struct nand_softc *sc = device_private(self); 1295 struct nand_chip *chip = &sc->sc_chip; 1296 1297 // uint64_t block_num; 1298 1299 if (ofs > chip->nc_size) { 1300 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1301 " device size (0x%jx)\n", ofs, 1302 (uintmax_t)chip->nc_size)); 1303 return EINVAL; 1304 } 1305 1306 if (ofs % chip->nc_block_size != 0) { 1307 panic("offset (%ju) is not the multiple of block size (%ju)", 1308 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1309 } 1310 1311 // block_num = ofs / fl->flash_if->erasesize; 1312 1313 mutex_enter(&sc->sc_device_lock); 1314 nand_markbad(self, ofs); 1315 mutex_exit(&sc->sc_device_lock); 1316 1317 return 0; 1318 } 1319 1320 int 1321 nand_flash_erase(device_t self, 1322 struct flash_erase_instruction *ei) 1323 { 1324 struct nand_softc *sc = device_private(self); 1325 struct nand_chip *chip = &sc->sc_chip; 1326 flash_addr_t addr; 1327 int error; 1328 // off_t block_num; 1329 1330 // if (FLASH_CLOSED == sc->sc_flash.status) 1331 // return FLASH_CLOSED; 1332 1333 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1334 return EINVAL; 1335 1336 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1337 DPRINTF(("nand_flash_erase: erase address is over the end" 1338 " of the device\n")); 1339 return EINVAL; 1340 } 1341 1342 if (ei->ei_addr % chip->nc_block_size != 0) { 1343 aprint_error_dev(self, 1344 "nand_flash_erase: ei_addr (%ju) is not" 1345 "the multiple of block size (%ju)", 1346 (uintmax_t)ei->ei_addr, 1347 (uintmax_t)chip->nc_block_size); 1348 return EINVAL; 1349 } 1350 1351 if (ei->ei_len % chip->nc_block_size != 0) { 1352 aprint_error_dev(self, 1353 "nand_flash_erase: ei_len (%ju) is not" 1354 "the multiple of block size (%ju)", 1355 (uintmax_t)ei->ei_addr, 1356 (uintmax_t)chip->nc_block_size); 1357 return EINVAL; 1358 } 1359 1360 mutex_enter(&sc->sc_device_lock); 1361 addr = ei->ei_addr; 1362 while (addr < ei->ei_addr + ei->ei_len) { 1363 if (nand_isbad(self, addr)) { 1364 mutex_exit(&sc->sc_device_lock); 1365 aprint_error_dev(self, "bad block encountered\n"); 1366 ei->ei_state = FLASH_ERASE_FAILED; 1367 return EIO; 1368 } 1369 1370 error = nand_erase_block(self, addr); 1371 if (error) { 1372 mutex_exit(&sc->sc_device_lock); 1373 ei->ei_state = FLASH_ERASE_FAILED; 1374 return error; 1375 } 1376 1377 addr += chip->nc_block_size; 1378 } 1379 mutex_exit(&sc->sc_device_lock); 1380 1381 ei->ei_state = FLASH_ERASE_DONE; 1382 if (ei->ei_callback != NULL) 1383 ei->ei_callback(ei); 1384 1385 return 0; 1386 } 1387 1388 static int 1389 sysctl_nand_verify(SYSCTLFN_ARGS) 1390 { 1391 int error, t; 1392 struct sysctlnode node; 1393 1394 node = *rnode; 1395 t = *(int *)rnode->sysctl_data; 1396 node.sysctl_data = &t; 1397 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 1398 if (error || newp == NULL) 1399 return error; 1400 1401 if (node.sysctl_num == nand_cachesync_nodenum) { 1402 if (t <= 0 || t > 60) 1403 return EINVAL; 1404 } else { 1405 return EINVAL; 1406 } 1407 1408 *(int *)rnode->sysctl_data = t; 1409 1410 return 0; 1411 } 1412 1413 SYSCTL_SETUP(sysctl_nand, "sysctl nand subtree setup") 1414 { 1415 int rc, nand_root_num; 1416 const struct sysctlnode *node; 1417 1418 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 1419 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 1420 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) { 1421 goto error; 1422 } 1423 1424 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1425 CTLFLAG_PERMANENT, CTLTYPE_NODE, "nand", 1426 SYSCTL_DESCR("NAND driver controls"), 1427 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) { 1428 goto error; 1429 } 1430 1431 nand_root_num = node->sysctl_num; 1432 1433 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1434 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 1435 CTLTYPE_INT, "cache_sync_timeout", 1436 SYSCTL_DESCR("NAND write cache sync timeout in seconds"), 1437 sysctl_nand_verify, 0, &nand_cachesync_timeout, 1438 0, CTL_HW, nand_root_num, CTL_CREATE, 1439 CTL_EOL)) != 0) { 1440 goto error; 1441 } 1442 1443 nand_cachesync_nodenum = node->sysctl_num; 1444 1445 return; 1446 1447 error: 1448 aprint_error("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 1449 } 1450 1451 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1452 1453 #ifdef _MODULE 1454 #include "ioconf.c" 1455 #endif 1456 1457 static int 1458 nand_modcmd(modcmd_t cmd, void *opaque) 1459 { 1460 switch (cmd) { 1461 case MODULE_CMD_INIT: 1462 #ifdef _MODULE 1463 return config_init_component(cfdriver_ioconf_nand, 1464 cfattach_ioconf_nand, cfdata_ioconf_nand); 1465 #else 1466 return 0; 1467 #endif 1468 case MODULE_CMD_FINI: 1469 #ifdef _MODULE 1470 return config_fini_component(cfdriver_ioconf_nand, 1471 cfattach_ioconf_nand, cfdata_ioconf_nand); 1472 #else 1473 return 0; 1474 #endif 1475 default: 1476 return ENOTTY; 1477 } 1478 } 1479
Indexes created Mon Sep 22 13:09:51 GMT 2025