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nand.c revision 1.22
      1 /*	$NetBSD: nand.c,v 1.22 2012/11/03 12:45:28 ahoka Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2010 Department of Software Engineering,
      5  *		      University of Szeged, Hungary
      6  * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org>
      7  * All rights reserved.
      8  *
      9  * This code is derived from software contributed to The NetBSD Foundation
     10  * by the Department of Software Engineering, University of Szeged, Hungary
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     28  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  */
     33 
     34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.22 2012/11/03 12:45:28 ahoka Exp $");
     38 
     39 #include "locators.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/types.h>
     43 #include <sys/device.h>
     44 #include <sys/kmem.h>
     45 #include <sys/atomic.h>
     46 
     47 #include <dev/flash/flash.h>
     48 #include <dev/flash/flash_io.h>
     49 #include <dev/nand/nand.h>
     50 #include <dev/nand/onfi.h>
     51 #include <dev/nand/hamming.h>
     52 #include <dev/nand/nand_bbt.h>
     53 #include <dev/nand/nand_crc.h>
     54 
     55 #include "opt_nand.h"
     56 
     57 int nand_match(device_t, cfdata_t, void *);
     58 void nand_attach(device_t, device_t, void *);
     59 int nand_detach(device_t, int);
     60 bool nand_shutdown(device_t, int);
     61 
     62 int nand_print(void *, const char *);
     63 
     64 static int nand_search(device_t, cfdata_t, const int *, void *);
     65 static void nand_address_row(device_t, size_t);
     66 static void nand_address_column(device_t, size_t, size_t);
     67 static int nand_fill_chip_structure(device_t, struct nand_chip *);
     68 static int nand_scan_media(device_t, struct nand_chip *);
     69 static bool nand_check_wp(device_t);
     70 
     71 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc),
     72     nand_match, nand_attach, nand_detach, NULL);
     73 
     74 #ifdef NAND_DEBUG
     75 int	nanddebug = NAND_DEBUG;
     76 #endif
     77 
     78 struct flash_interface nand_flash_if = {
     79 	.type = FLASH_TYPE_NAND,
     80 
     81 	.read = nand_flash_read,
     82 	.write = nand_flash_write,
     83 	.erase = nand_flash_erase,
     84 	.block_isbad = nand_flash_isbad,
     85 	.block_markbad = nand_flash_markbad,
     86 
     87 	.submit = nand_flash_submit
     88 };
     89 
     90 #ifdef NAND_VERBOSE
     91 const struct nand_manufacturer nand_mfrs[] = {
     92 	{ NAND_MFR_AMD,		"AMD" },
     93 	{ NAND_MFR_FUJITSU,	"Fujitsu" },
     94 	{ NAND_MFR_RENESAS,	"Renesas" },
     95 	{ NAND_MFR_STMICRO,	"ST Micro" },
     96 	{ NAND_MFR_MICRON,	"Micron" },
     97 	{ NAND_MFR_NATIONAL,	"National" },
     98 	{ NAND_MFR_TOSHIBA,	"Toshiba" },
     99 	{ NAND_MFR_HYNIX,	"Hynix" },
    100 	{ NAND_MFR_SAMSUNG,	"Samsung" },
    101 	{ NAND_MFR_UNKNOWN,	"Unknown" }
    102 };
    103 
    104 static const char *
    105 nand_midtoname(int id)
    106 {
    107 	int i;
    108 
    109 	for (i = 0; nand_mfrs[i].id != 0; i++) {
    110 		if (nand_mfrs[i].id == id)
    111 			return nand_mfrs[i].name;
    112 	}
    113 
    114 	KASSERT(nand_mfrs[i].id == 0);
    115 
    116 	return nand_mfrs[i].name;
    117 }
    118 #endif
    119 
    120 /* ARGSUSED */
    121 int
    122 nand_match(device_t parent, cfdata_t match, void *aux)
    123 {
    124 	/* pseudo device, always attaches */
    125 	return 1;
    126 }
    127 
    128 void
    129 nand_attach(device_t parent, device_t self, void *aux)
    130 {
    131 	struct nand_softc *sc = device_private(self);
    132 	struct nand_attach_args *naa = aux;
    133 	struct nand_chip *chip = &sc->sc_chip;
    134 
    135 	sc->sc_dev = self;
    136 	sc->controller_dev = parent;
    137 	sc->nand_if = naa->naa_nand_if;
    138 
    139 	aprint_naive("\n");
    140 
    141 	if (nand_check_wp(self)) {
    142 		aprint_error("NAND chip is write protected!\n");
    143 		return;
    144 	}
    145 
    146 	if (nand_scan_media(self, chip)) {
    147 		return;
    148 	}
    149 
    150 	nand_flash_if.erasesize = chip->nc_block_size;
    151 	nand_flash_if.page_size = chip->nc_page_size;
    152 	nand_flash_if.writesize = chip->nc_page_size;
    153 
    154 	/* allocate cache */
    155 	chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP);
    156 	chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP);
    157 
    158 	mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE);
    159 
    160 	if (flash_sync_thread_init(&sc->sc_flash_io, self, &nand_flash_if)) {
    161 		goto error;
    162 	}
    163 
    164 	if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown))
    165 		aprint_error_dev(sc->sc_dev,
    166 		    "couldn't establish power handler\n");
    167 
    168 #ifdef NAND_BBT
    169 	nand_bbt_init(self);
    170 	nand_bbt_scan(self);
    171 #endif
    172 
    173 	/*
    174 	 * Attach all our devices
    175 	 */
    176 	config_search_ia(nand_search, self, NULL, NULL);
    177 
    178 	return;
    179 error:
    180 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    181 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    182 	mutex_destroy(&sc->sc_device_lock);
    183 }
    184 
    185 static int
    186 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    187 {
    188 	struct nand_softc *sc = device_private(parent);
    189 	struct nand_chip *chip = &sc->sc_chip;
    190 	struct flash_attach_args faa;
    191 
    192 	faa.flash_if = &nand_flash_if;
    193 
    194 	faa.partinfo.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET];
    195 
    196 	if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) {
    197 		faa.partinfo.part_size = chip->nc_size -
    198 		    faa.partinfo.part_offset;
    199 	} else {
    200 		faa.partinfo.part_size = cf->cf_loc[FLASHBUSCF_SIZE];
    201 	}
    202 
    203 	if (cf->cf_loc[FLASHBUSCF_READONLY])
    204 		faa.partinfo.part_flags = FLASH_PART_READONLY;
    205 	else
    206 		faa.partinfo.part_flags = 0;
    207 
    208 	if (config_match(parent, cf, &faa)) {
    209 		if (config_attach(parent, cf, &faa, nand_print) != NULL) {
    210 			return 0;
    211 		} else {
    212 			return 1;
    213 		}
    214 	}
    215 
    216 	return 1;
    217 }
    218 
    219 int
    220 nand_detach(device_t self, int flags)
    221 {
    222 	struct nand_softc *sc = device_private(self);
    223 	struct nand_chip *chip = &sc->sc_chip;
    224 	int error = 0;
    225 
    226 	error = config_detach_children(self, flags);
    227 	if (error) {
    228 		return error;
    229 	}
    230 
    231 	flash_sync_thread_destroy(&sc->sc_flash_io);
    232 #ifdef NAND_BBT
    233 	nand_bbt_detach(self);
    234 #endif
    235 	/* free oob cache */
    236 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    237 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    238 	kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size);
    239 
    240 	mutex_destroy(&sc->sc_device_lock);
    241 
    242 	pmf_device_deregister(sc->sc_dev);
    243 
    244 	return error;
    245 }
    246 
    247 int
    248 nand_print(void *aux, const char *pnp)
    249 {
    250 	if (pnp != NULL)
    251 		aprint_normal("nand at %s\n", pnp);
    252 
    253 	return UNCONF;
    254 }
    255 
    256 /* ask for a nand driver to attach to the controller */
    257 device_t
    258 nand_attach_mi(struct nand_interface *nand_if, device_t parent)
    259 {
    260 	struct nand_attach_args arg;
    261 
    262 	KASSERT(nand_if != NULL);
    263 
    264 	/* fill the defaults if we have null pointers */
    265 	if (nand_if->program_page == NULL) {
    266 		nand_if->program_page = &nand_default_program_page;
    267 	}
    268 
    269 	if (nand_if->read_page == NULL) {
    270 		nand_if->read_page = &nand_default_read_page;
    271 	}
    272 
    273 	arg.naa_nand_if = nand_if;
    274 	return config_found_ia(parent, "nandbus", &arg, nand_print);
    275 }
    276 
    277 /* default everything to reasonable values, to ease future api changes */
    278 void
    279 nand_init_interface(struct nand_interface *interface)
    280 {
    281 	interface->select = &nand_default_select;
    282 	interface->command = NULL;
    283 	interface->address = NULL;
    284 	interface->read_buf_1 = NULL;
    285 	interface->read_buf_2 = NULL;
    286 	interface->read_1 = NULL;
    287 	interface->read_2 = NULL;
    288 	interface->write_buf_1 = NULL;
    289 	interface->write_buf_2 = NULL;
    290 	interface->write_1 = NULL;
    291 	interface->write_2 = NULL;
    292 	interface->busy = NULL;
    293 
    294 	/*-
    295 	 * most drivers dont want to change this, but some implement
    296 	 * read/program in one step
    297 	 */
    298 	interface->program_page = &nand_default_program_page;
    299 	interface->read_page = &nand_default_read_page;
    300 
    301 	/* default to soft ecc, that should work everywhere */
    302 	interface->ecc_compute = &nand_default_ecc_compute;
    303 	interface->ecc_correct = &nand_default_ecc_correct;
    304 	interface->ecc_prepare = NULL;
    305 	interface->ecc.necc_code_size = 3;
    306 	interface->ecc.necc_block_size = 256;
    307 	interface->ecc.necc_type = NAND_ECC_TYPE_SW;
    308 }
    309 
    310 #if 0
    311 /* handle quirks here */
    312 static void
    313 nand_quirks(device_t self, struct nand_chip *chip)
    314 {
    315 	/* this is an example only! */
    316 	switch (chip->nc_manf_id) {
    317 	case NAND_MFR_SAMSUNG:
    318 		if (chip->nc_dev_id == 0x00) {
    319 			/* do something only samsung chips need */
    320 			/* or */
    321 			/* chip->nc_quirks |= NC_QUIRK_NO_READ_START */
    322 		}
    323 	}
    324 
    325 	return;
    326 }
    327 #endif
    328 
    329 static int
    330 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip)
    331 {
    332 	switch (chip->nc_manf_id) {
    333 	case NAND_MFR_MICRON:
    334 		return nand_read_parameters_micron(self, chip);
    335 	case NAND_MFR_SAMSUNG:
    336 		return nand_read_parameters_samsung(self, chip);
    337 	default:
    338 		return 1;
    339 	}
    340 
    341 	return 0;
    342 }
    343 
    344 /**
    345  * scan media to determine the chip's properties
    346  * this function resets the device
    347  */
    348 static int
    349 nand_scan_media(device_t self, struct nand_chip *chip)
    350 {
    351 	struct nand_softc *sc = device_private(self);
    352 	struct nand_ecc *ecc;
    353 	uint8_t onfi_signature[4];
    354 
    355 	nand_select(self, true);
    356 	nand_command(self, ONFI_RESET);
    357 	nand_select(self, false);
    358 
    359 	/* check if the device implements the ONFI standard */
    360 	nand_select(self, true);
    361 	nand_command(self, ONFI_READ_ID);
    362 	nand_address(self, 0x20);
    363 	nand_read_1(self, &onfi_signature[0]);
    364 	nand_read_1(self, &onfi_signature[1]);
    365 	nand_read_1(self, &onfi_signature[2]);
    366 	nand_read_1(self, &onfi_signature[3]);
    367 	nand_select(self, false);
    368 
    369 	if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' ||
    370 	    onfi_signature[2] != 'F' || onfi_signature[3] != 'I') {
    371 		chip->nc_isonfi = false;
    372 
    373 		aprint_normal(": Legacy NAND Flash\n");
    374 
    375 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    376 
    377 		if (nand_fill_chip_structure_legacy(self, chip)) {
    378 			aprint_error_dev(self,
    379 			    "can't read device parameters for legacy chip\n");
    380 			return 1;
    381 		}
    382 	} else {
    383 		chip->nc_isonfi = true;
    384 
    385 		aprint_normal(": ONFI NAND Flash\n");
    386 
    387 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    388 
    389 		if (nand_fill_chip_structure(self, chip)) {
    390 			aprint_error_dev(self,
    391 			    "can't read device parameters\n");
    392 			return 1;
    393 		}
    394 	}
    395 
    396 #ifdef NAND_VERBOSE
    397 	aprint_normal_dev(self,
    398 	    "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n",
    399 	    chip->nc_manf_id,
    400 	    nand_midtoname(chip->nc_manf_id),
    401 	    chip->nc_dev_id);
    402 #endif
    403 
    404 	aprint_normal_dev(self,
    405 	    "page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, "
    406 	    "block size: %" PRIu32 " bytes\n",
    407 	    chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size);
    408 
    409 	aprint_normal_dev(self,
    410 	    "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8
    411 	    ", total storage size: %" PRIu64 " MB\n",
    412 	    chip->nc_lun_blocks, chip->nc_num_luns,
    413 	    chip->nc_size / 1024 / 1024);
    414 
    415 	aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %"
    416 	    PRIu8 ", width: %s\n",
    417 	    chip->nc_addr_cycles_column, chip->nc_addr_cycles_row,
    418 	    (chip->nc_flags & NC_BUSWIDTH_16) ? "x16" : "x8");
    419 
    420 	ecc = chip->nc_ecc = &sc->nand_if->ecc;
    421 
    422 	/*
    423 	 * calculate the place of ecc data in oob
    424 	 * we try to be compatible with Linux here
    425 	 */
    426 	switch (chip->nc_spare_size) {
    427 	case 8:
    428 		ecc->necc_offset = 0;
    429 		break;
    430 	case 16:
    431 		ecc->necc_offset = 0;
    432 		break;
    433 	case 32:
    434 		ecc->necc_offset = 0;
    435 		break;
    436 	case 64:
    437 		ecc->necc_offset = 40;
    438 		break;
    439 	case 128:
    440 		ecc->necc_offset = 80;
    441 		break;
    442 	default:
    443 		panic("OOB size %" PRIu32 " is unexpected", chip->nc_spare_size);
    444 	}
    445 
    446 	ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size;
    447 	ecc->necc_size = ecc->necc_steps * ecc->necc_code_size;
    448 
    449 	/* check if we fit in oob */
    450 	if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) {
    451 		panic("NAND ECC bits dont fit in OOB");
    452 	}
    453 
    454 	/* TODO: mark free oob area available for file systems */
    455 
    456 	chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP);
    457 
    458 	/*
    459 	 * calculate badblock marker offset in oob
    460 	 * we try to be compatible with linux here
    461 	 */
    462 	if (chip->nc_page_size > 512)
    463 		chip->nc_badmarker_offs = 0;
    464 	else
    465 		chip->nc_badmarker_offs = 5;
    466 
    467 	/* Calculate page shift and mask */
    468 	chip->nc_page_shift = ffs(chip->nc_page_size) - 1;
    469 	chip->nc_page_mask = ~(chip->nc_page_size - 1);
    470 	/* same for block */
    471 	chip->nc_block_shift = ffs(chip->nc_block_size) - 1;
    472 	chip->nc_block_mask = ~(chip->nc_block_size - 1);
    473 
    474 	/* look for quirks here if needed in future */
    475 	/* nand_quirks(self, chip); */
    476 
    477 	return 0;
    478 }
    479 
    480 void
    481 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev)
    482 {
    483 	nand_select(self, true);
    484 	nand_command(self, ONFI_READ_ID);
    485 	nand_address(self, 0x00);
    486 
    487 	nand_read_1(self, manf);
    488 	nand_read_1(self, dev);
    489 
    490 	nand_select(self, false);
    491 }
    492 
    493 int
    494 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params)
    495 {
    496 	uint8_t *bufp;
    497 	uint16_t crc;
    498 	int i;//, tries = 0;
    499 
    500 	KASSERT(sizeof(*params) == 256);
    501 
    502 //read_params:
    503 //	tries++;
    504 
    505 	nand_select(self, true);
    506 	nand_command(self, ONFI_READ_PARAMETER_PAGE);
    507 	nand_address(self, 0x00);
    508 
    509 	nand_busy(self);
    510 
    511 	/* TODO check the signature if it contains at least 2 letters */
    512 
    513 	bufp = (uint8_t *)params;
    514 	/* XXX why i am not using read_buf? */
    515 	for (i = 0; i < 256; i++) {
    516 		nand_read_1(self, &bufp[i]);
    517 	}
    518 	nand_select(self, false);
    519 
    520 	/* validate the parameter page with the crc */
    521 	crc = nand_crc16(bufp, 254);
    522 
    523 	if (crc != params->param_integrity_crc) {
    524 		aprint_error_dev(self, "parameter page crc check failed\n");
    525 		/* TODO: we should read the next parameter page copy */
    526 		return 1;
    527 	}
    528 
    529 	return 0;
    530 }
    531 
    532 static int
    533 nand_fill_chip_structure(device_t self, struct nand_chip *chip)
    534 {
    535 	struct onfi_parameter_page params;
    536 	uint8_t	vendor[13], model[21];
    537 	int i;
    538 
    539 	if (nand_read_parameter_page(self, &params)) {
    540 		return 1;
    541 	}
    542 
    543 	/* strip manufacturer and model string */
    544 	strlcpy(vendor, params.param_manufacturer, sizeof(vendor));
    545 	for (i = 11; i > 0 && vendor[i] == ' '; i--)
    546 		vendor[i] = 0;
    547 	strlcpy(model, params.param_model, sizeof(model));
    548 	for (i = 19; i > 0 && model[i] == ' '; i--)
    549 		model[i] = 0;
    550 
    551 	aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model);
    552 
    553 	chip->nc_page_size = le32toh(params.param_pagesize);
    554 	chip->nc_block_size =
    555 	    le32toh(params.param_blocksize) * chip->nc_page_size;
    556 	chip->nc_spare_size = le16toh(params.param_sparesize);
    557 	chip->nc_lun_blocks = le32toh(params.param_lunsize);
    558 	chip->nc_num_luns = params.param_numluns;
    559 
    560 	chip->nc_size =
    561 	    chip->nc_block_size * chip->nc_lun_blocks * chip->nc_num_luns;
    562 
    563 	/* the lower 4 bits contain the row address cycles */
    564 	chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07;
    565 	/* the upper 4 bits contain the column address cycles */
    566 	chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4;
    567 
    568 	uint16_t features = le16toh(params.param_features);
    569 	if (features & ONFI_FEATURE_16BIT) {
    570 		chip->nc_flags |= NC_BUSWIDTH_16;
    571 	}
    572 
    573 	if (features & ONFI_FEATURE_EXTENDED_PARAM) {
    574 		chip->nc_flags |= NC_EXTENDED_PARAM;
    575 	}
    576 
    577 	return 0;
    578 }
    579 
    580 /* ARGSUSED */
    581 bool
    582 nand_shutdown(device_t self, int howto)
    583 {
    584 	return true;
    585 }
    586 
    587 static void
    588 nand_address_column(device_t self, size_t row, size_t column)
    589 {
    590 	struct nand_softc *sc = device_private(self);
    591 	struct nand_chip *chip = &sc->sc_chip;
    592 	uint8_t i;
    593 
    594 	DPRINTF(("addressing row: 0x%jx column: %" PRIu32 "\n",
    595 		(uintmax_t )row, column));
    596 
    597 	/* XXX TODO */
    598 	row >>= chip->nc_page_shift;
    599 
    600 	/* Write the column (subpage) address */
    601 	if (chip->nc_flags & NC_BUSWIDTH_16)
    602 		column >>= 1;
    603 	for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8)
    604 		nand_address(self, column & 0xff);
    605 
    606 	/* Write the row (page) address */
    607 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    608 		nand_address(self, row & 0xff);
    609 }
    610 
    611 static void
    612 nand_address_row(device_t self, size_t row)
    613 {
    614 	struct nand_softc *sc = device_private(self);
    615 	struct nand_chip *chip = &sc->sc_chip;
    616 	int i;
    617 
    618 	/* XXX TODO */
    619 	row >>= chip->nc_page_shift;
    620 
    621 	/* Write the row (page) address */
    622 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    623 		nand_address(self, row & 0xff);
    624 }
    625 
    626 static inline uint8_t
    627 nand_get_status(device_t self)
    628 {
    629 	uint8_t status;
    630 
    631 	nand_command(self, ONFI_READ_STATUS);
    632 	nand_busy(self);
    633 	nand_read_1(self, &status);
    634 
    635 	return status;
    636 }
    637 
    638 static bool
    639 nand_check_wp(device_t self)
    640 {
    641 	if (nand_get_status(self) & 0x80)
    642 		return false;
    643 	else
    644 		return true;
    645 }
    646 
    647 static void
    648 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column)
    649 {
    650 	nand_command(self, ONFI_READ);
    651 	nand_address_column(self, row, column);
    652 	nand_command(self, ONFI_READ_START);
    653 
    654 	nand_busy(self);
    655 }
    656 
    657 /* read a page with ecc correction, default implementation */
    658 int
    659 nand_default_read_page(device_t self, size_t offset, uint8_t *data)
    660 {
    661 	struct nand_softc *sc = device_private(self);
    662 	struct nand_chip *chip = &sc->sc_chip;
    663 	size_t b, bs, e, cs;
    664 	uint8_t *ecc;
    665 	int result;
    666 
    667 	nand_prepare_read(self, offset, 0);
    668 
    669 	bs = chip->nc_ecc->necc_block_size;
    670 	cs = chip->nc_ecc->necc_code_size;
    671 
    672 	/* decide if we access by 8 or 16 bits */
    673 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    674 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    675 			nand_ecc_prepare(self, NAND_ECC_READ);
    676 			nand_read_buf_2(self, data + b, bs);
    677 			nand_ecc_compute(self, data + b,
    678 			    chip->nc_ecc_cache + e);
    679 		}
    680 	} else {
    681 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    682 			nand_ecc_prepare(self, NAND_ECC_READ);
    683 			nand_read_buf_1(self, data + b, bs);
    684 			nand_ecc_compute(self, data + b,
    685 			    chip->nc_ecc_cache + e);
    686 		}
    687 	}
    688 
    689 	/* for debugging new drivers */
    690 #if 0
    691 	nand_dump_data("page", data, chip->nc_page_size);
    692 #endif
    693 
    694 	nand_read_oob(self, offset, chip->nc_oob_cache);
    695 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    696 
    697 	/* useful for debugging new ecc drivers */
    698 #if 0
    699 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    700 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    701 		printf("0x");
    702 		for (b = 0; b < cs; b++) {
    703 			printf("%.2hhx", ecc[e+b]);
    704 		}
    705 		printf(" 0x");
    706 		for (b = 0; b < cs; b++) {
    707 			printf("%.2hhx", chip->nc_ecc_cache[e+b]);
    708 		}
    709 		printf("\n");
    710 	}
    711 	printf("--------------\n");
    712 #endif
    713 
    714 	for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    715 		result = nand_ecc_correct(self, data + b, ecc + e,
    716 		    chip->nc_ecc_cache + e);
    717 
    718 		switch (result) {
    719 		case NAND_ECC_OK:
    720 			break;
    721 		case NAND_ECC_CORRECTED:
    722 			aprint_error_dev(self,
    723 			    "data corrected with ECC at page offset 0x%jx "
    724 			    "block %zu\n", (uintmax_t)offset, b);
    725 			break;
    726 		case NAND_ECC_TWOBIT:
    727 			aprint_error_dev(self,
    728 			    "uncorrectable ECC error at page offset 0x%jx "
    729 			    "block %zu\n", (uintmax_t)offset, b);
    730 			return EIO;
    731 			break;
    732 		case NAND_ECC_INVALID:
    733 			aprint_error_dev(self,
    734 			    "invalid ECC in oob at page offset 0x%jx "
    735 			    "block %zu\n", (uintmax_t)offset, b);
    736 			return EIO;
    737 			break;
    738 		default:
    739 			panic("invalid ECC correction errno");
    740 		}
    741 	}
    742 
    743 	return 0;
    744 }
    745 
    746 int
    747 nand_default_program_page(device_t self, size_t page, const uint8_t *data)
    748 {
    749 	struct nand_softc *sc = device_private(self);
    750 	struct nand_chip *chip = &sc->sc_chip;
    751 	size_t bs, cs, e, b;
    752 	uint8_t status;
    753 	uint8_t *ecc;
    754 
    755 	nand_command(self, ONFI_PAGE_PROGRAM);
    756 	nand_address_column(self, page, 0);
    757 
    758 	nand_busy(self);
    759 
    760 	bs = chip->nc_ecc->necc_block_size;
    761 	cs = chip->nc_ecc->necc_code_size;
    762 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    763 
    764 	/* XXX code duplication */
    765 	/* decide if we access by 8 or 16 bits */
    766 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    767 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    768 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    769 			nand_write_buf_2(self, data + b, bs);
    770 			nand_ecc_compute(self, data + b, ecc + e);
    771 		}
    772 		/* write oob with ecc correction code */
    773 		nand_write_buf_2(self, chip->nc_oob_cache,
    774 		    chip->nc_spare_size);
    775 	} else {
    776 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    777 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    778 			nand_write_buf_1(self, data + b, bs);
    779 			nand_ecc_compute(self, data + b, ecc + e);
    780 		}
    781 		/* write oob with ecc correction code */
    782 		nand_write_buf_1(self, chip->nc_oob_cache,
    783 		    chip->nc_spare_size);
    784 	}
    785 
    786 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    787 
    788 	nand_busy(self);
    789 
    790 	/* for debugging ecc */
    791 #if 0
    792 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    793 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    794 		printf("0x");
    795 		for (b = 0; b < cs; b++) {
    796 			printf("%.2hhx", ecc[e+b]);
    797 		}
    798 		printf("\n");
    799 	}
    800 	printf("--------------\n");
    801 #endif
    802 
    803 	status = nand_get_status(self);
    804 	KASSERT(status & ONFI_STATUS_RDY);
    805 	if (status & ONFI_STATUS_FAIL) {
    806 		aprint_error_dev(self, "page program failed!\n");
    807 		return EIO;
    808 	}
    809 
    810 	return 0;
    811 }
    812 
    813 /* read the OOB of a page */
    814 int
    815 nand_read_oob(device_t self, size_t page, uint8_t *oob)
    816 {
    817 	struct nand_softc *sc = device_private(self);
    818 	struct nand_chip *chip = &sc->sc_chip;
    819 
    820 	nand_prepare_read(self, page, chip->nc_page_size);
    821 
    822 	if (chip->nc_flags & NC_BUSWIDTH_16)
    823 		nand_read_buf_2(self, oob, chip->nc_spare_size);
    824 	else
    825 		nand_read_buf_1(self, oob, chip->nc_spare_size);
    826 
    827 	/* for debugging drivers */
    828 #if 0
    829 	nand_dump_data("oob", oob, chip->nc_spare_size);
    830 #endif
    831 
    832 	return 0;
    833 }
    834 
    835 static int
    836 nand_write_oob(device_t self, size_t offset, const void *oob)
    837 {
    838 	struct nand_softc *sc = device_private(self);
    839 	struct nand_chip *chip = &sc->sc_chip;
    840 	uint8_t status;
    841 
    842 	nand_command(self, ONFI_PAGE_PROGRAM);
    843 	nand_address_column(self, offset, chip->nc_page_size);
    844 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    845 
    846 	nand_busy(self);
    847 
    848 	if (chip->nc_flags & NC_BUSWIDTH_16)
    849 		nand_write_buf_2(self, oob, chip->nc_spare_size);
    850 	else
    851 		nand_write_buf_1(self, oob, chip->nc_spare_size);
    852 
    853 	status = nand_get_status(self);
    854 	KASSERT(status & ONFI_STATUS_RDY);
    855 	if (status & ONFI_STATUS_FAIL)
    856 		return EIO;
    857 	else
    858 		return 0;
    859 }
    860 
    861 void
    862 nand_markbad(device_t self, size_t offset)
    863 {
    864 	struct nand_softc *sc = device_private(self);
    865 	struct nand_chip *chip = &sc->sc_chip;
    866 	flash_off_t blockoffset, marker;
    867 #ifdef NAND_BBT
    868 	flash_off_t block;
    869 
    870 	block = offset / chip->nc_block_size;
    871 
    872 	nand_bbt_block_markbad(self, block);
    873 #endif
    874 	blockoffset = offset & chip->nc_block_mask;
    875 	marker = chip->nc_badmarker_offs & ~0x01;
    876 
    877 	/* check if it is already marked bad */
    878 	if (nand_isbad(self, blockoffset))
    879 		return;
    880 
    881 	nand_read_oob(self, blockoffset, chip->nc_oob_cache);
    882 
    883 	chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00;
    884 	chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00;
    885 
    886 	nand_write_oob(self, blockoffset, chip->nc_oob_cache);
    887 }
    888 
    889 bool
    890 nand_isfactorybad(device_t self, flash_off_t offset)
    891 {
    892 	struct nand_softc *sc = device_private(self);
    893 	struct nand_chip *chip = &sc->sc_chip;
    894 	flash_off_t block, first_page, last_page, page;
    895 	int i;
    896 
    897 	/* Check for factory bad blocks first
    898 	 * Factory bad blocks are marked in the first or last
    899 	 * page of the blocks, see: ONFI 2.2, 3.2.2.
    900 	 */
    901 	block = offset / chip->nc_block_size;
    902 	first_page = block * chip->nc_block_size;
    903 	last_page = (block + 1) * chip->nc_block_size
    904 	    - chip->nc_page_size;
    905 
    906 	for (i = 0, page = first_page; i < 2; i++, page = last_page) {
    907 		/* address OOB */
    908 		nand_prepare_read(self, page, chip->nc_page_size);
    909 
    910 		if (chip->nc_flags & NC_BUSWIDTH_16) {
    911 			uint16_t word;
    912 			nand_read_2(self, &word);
    913 			if (word == 0x0000)
    914 				return true;
    915 		} else {
    916 			uint8_t byte;
    917 			nand_read_1(self, &byte);
    918 			if (byte == 0x00)
    919 				return true;
    920 		}
    921 	}
    922 
    923 	return false;
    924 }
    925 
    926 bool
    927 nand_iswornoutbad(device_t self, flash_off_t offset)
    928 {
    929 	struct nand_softc *sc = device_private(self);
    930 	struct nand_chip *chip = &sc->sc_chip;
    931 	flash_off_t block;
    932 
    933 	/* we inspect the first page of the block */
    934 	block = offset & chip->nc_block_mask;
    935 
    936 	/* Linux/u-boot compatible badblock handling */
    937 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    938 		uint16_t word, mark;
    939 
    940 		nand_prepare_read(self, block,
    941 		    chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe));
    942 
    943 		nand_read_2(self, &word);
    944 		mark = htole16(word);
    945 		if (chip->nc_badmarker_offs & 0x01)
    946 			mark >>= 8;
    947 		if ((mark & 0xff) != 0xff)
    948 			return true;
    949 	} else {
    950 		uint8_t byte;
    951 
    952 		nand_prepare_read(self, block,
    953 		    chip->nc_page_size + chip->nc_badmarker_offs);
    954 
    955 		nand_read_1(self, &byte);
    956 		if (byte != 0xff)
    957 			return true;
    958 	}
    959 
    960 	return false;
    961 }
    962 
    963 bool
    964 nand_isbad(device_t self, flash_off_t offset)
    965 {
    966 #ifdef NAND_BBT
    967 	struct nand_softc *sc = device_private(self);
    968 	struct nand_chip *chip = &sc->sc_chip;
    969 	flash_off_t block;
    970 
    971 	block = offset / chip->nc_block_size;
    972 
    973 	return nand_bbt_block_isbad(self, block);
    974 #else
    975 	/* ONFI host requirement */
    976 	if (nand_isfactorybad(self, offset))
    977 		return true;
    978 
    979 	/* Look for Linux/U-Boot compatible bad marker */
    980 	if (nand_iswornoutbad(self, offset))
    981 		return true;
    982 
    983 	return false;
    984 #endif
    985 }
    986 
    987 int
    988 nand_erase_block(device_t self, size_t offset)
    989 {
    990 	uint8_t status;
    991 
    992 	/* xxx calculate first page of block for address? */
    993 
    994 	nand_command(self, ONFI_BLOCK_ERASE);
    995 	nand_address_row(self, offset);
    996 	nand_command(self, ONFI_BLOCK_ERASE_START);
    997 
    998 	nand_busy(self);
    999 
   1000 	status = nand_get_status(self);
   1001 	KASSERT(status & ONFI_STATUS_RDY);
   1002 	if (status & ONFI_STATUS_FAIL) {
   1003 		aprint_error_dev(self, "block erase failed!\n");
   1004 		nand_markbad(self, offset);
   1005 		return EIO;
   1006 	} else {
   1007 		return 0;
   1008 	}
   1009 }
   1010 
   1011 /* default functions for driver development */
   1012 
   1013 /* default ECC using hamming code of 256 byte chunks */
   1014 int
   1015 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code)
   1016 {
   1017 	hamming_compute_256(data, code);
   1018 
   1019 	return 0;
   1020 }
   1021 
   1022 int
   1023 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode,
   1024 	const uint8_t *compcode)
   1025 {
   1026 	return hamming_correct_256(data, origcode, compcode);
   1027 }
   1028 
   1029 void
   1030 nand_default_select(device_t self, bool enable)
   1031 {
   1032 	/* do nothing */
   1033 	return;
   1034 }
   1035 
   1036 /* implementation of the block device API */
   1037 
   1038 int
   1039 nand_flash_submit(device_t self, struct buf * const bp)
   1040 {
   1041 	struct nand_softc *sc = device_private(self);
   1042 
   1043 	return flash_io_submit(&sc->sc_flash_io, bp);
   1044 }
   1045 
   1046 /*
   1047  * handle (page) unaligned write to nand
   1048  */
   1049 static int
   1050 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len,
   1051     size_t *retlen, const uint8_t *buf)
   1052 {
   1053 	struct nand_softc *sc = device_private(self);
   1054 	struct nand_chip *chip = &sc->sc_chip;
   1055 	flash_off_t first, last, firstoff;
   1056 	const uint8_t *bufp;
   1057 	flash_off_t addr;
   1058 	size_t left, count;
   1059 	int error = 0, i;
   1060 
   1061 	first = offset & chip->nc_page_mask;
   1062 	firstoff = offset & ~chip->nc_page_mask;
   1063 	/* XXX check if this should be len - 1 */
   1064 	last = (offset + len) & chip->nc_page_mask;
   1065 	count = last - first + 1;
   1066 
   1067 	addr = first;
   1068 	*retlen = 0;
   1069 
   1070 	mutex_enter(&sc->sc_device_lock);
   1071 	if (count == 1) {
   1072 		if (nand_isbad(self, addr)) {
   1073 			aprint_error_dev(self,
   1074 			    "nand_flash_write_unaligned: "
   1075 			    "bad block encountered\n");
   1076 			error = EIO;
   1077 			goto out;
   1078 		}
   1079 
   1080 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1081 		if (error) {
   1082 			goto out;
   1083 		}
   1084 
   1085 		memcpy(chip->nc_page_cache + firstoff, buf, len);
   1086 
   1087 		error = nand_program_page(self, addr, chip->nc_page_cache);
   1088 		if (error) {
   1089 			goto out;
   1090 		}
   1091 
   1092 		*retlen = len;
   1093 		goto out;
   1094 	}
   1095 
   1096 	bufp = buf;
   1097 	left = len;
   1098 
   1099 	for (i = 0; i < count && left != 0; i++) {
   1100 		if (nand_isbad(self, addr)) {
   1101 			aprint_error_dev(self,
   1102 			    "nand_flash_write_unaligned: "
   1103 			    "bad block encountered\n");
   1104 			error = EIO;
   1105 			goto out;
   1106 		}
   1107 
   1108 		if (i == 0) {
   1109 			error = nand_read_page(self,
   1110 			    addr, chip->nc_page_cache);
   1111 			if (error) {
   1112 				goto out;
   1113 			}
   1114 
   1115 			memcpy(chip->nc_page_cache + firstoff,
   1116 			    bufp, chip->nc_page_size - firstoff);
   1117 
   1118 			printf("program page: %s: %d\n", __FILE__, __LINE__);
   1119 			error = nand_program_page(self,
   1120 			    addr, chip->nc_page_cache);
   1121 			if (error) {
   1122 				goto out;
   1123 			}
   1124 
   1125 			bufp += chip->nc_page_size - firstoff;
   1126 			left -= chip->nc_page_size - firstoff;
   1127 			*retlen += chip->nc_page_size - firstoff;
   1128 
   1129 		} else if (i == count - 1) {
   1130 			error = nand_read_page(self,
   1131 			    addr, chip->nc_page_cache);
   1132 			if (error) {
   1133 				goto out;
   1134 			}
   1135 
   1136 			memcpy(chip->nc_page_cache, bufp, left);
   1137 
   1138 			error = nand_program_page(self,
   1139 			    addr, chip->nc_page_cache);
   1140 			if (error) {
   1141 				goto out;
   1142 			}
   1143 
   1144 			*retlen += left;
   1145 			KASSERT(left < chip->nc_page_size);
   1146 
   1147 		} else {
   1148 			/* XXX debug */
   1149 			if (left > chip->nc_page_size) {
   1150 				printf("left: %zu, i: %d, count: %zu\n",
   1151 				    left, i, count);
   1152 			}
   1153 			KASSERT(left > chip->nc_page_size);
   1154 
   1155 			error = nand_program_page(self, addr, bufp);
   1156 			if (error) {
   1157 				goto out;
   1158 			}
   1159 
   1160 			bufp += chip->nc_page_size;
   1161 			left -= chip->nc_page_size;
   1162 			*retlen += chip->nc_page_size;
   1163 		}
   1164 
   1165 		addr += chip->nc_page_size;
   1166 	}
   1167 
   1168 	KASSERT(*retlen == len);
   1169 out:
   1170 	mutex_exit(&sc->sc_device_lock);
   1171 
   1172 	return error;
   1173 }
   1174 
   1175 int
   1176 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1177     const uint8_t *buf)
   1178 {
   1179 	struct nand_softc *sc = device_private(self);
   1180 	struct nand_chip *chip = &sc->sc_chip;
   1181 	const uint8_t *bufp;
   1182 	size_t pages, page;
   1183 	daddr_t addr;
   1184 	int error = 0;
   1185 
   1186 	if ((offset + len) > chip->nc_size) {
   1187 		DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju),"
   1188 			" is over device size (0x%jx)\n",
   1189 			(uintmax_t)offset, (uintmax_t)len,
   1190 			(uintmax_t)chip->nc_size));
   1191 		return EINVAL;
   1192 	}
   1193 
   1194 	if (len % chip->nc_page_size != 0 ||
   1195 	    offset % chip->nc_page_size != 0) {
   1196 		return nand_flash_write_unaligned(self,
   1197 		    offset, len, retlen, buf);
   1198 	}
   1199 
   1200 	pages = len / chip->nc_page_size;
   1201 	KASSERT(pages != 0);
   1202 	*retlen = 0;
   1203 
   1204 	addr = offset;
   1205 	bufp = buf;
   1206 
   1207 	mutex_enter(&sc->sc_device_lock);
   1208 	for (page = 0; page < pages; page++) {
   1209 		/* do we need this check here? */
   1210 		if (nand_isbad(self, addr)) {
   1211 			aprint_error_dev(self,
   1212 			    "nand_flash_write: bad block encountered\n");
   1213 
   1214 			error = EIO;
   1215 			goto out;
   1216 		}
   1217 
   1218 		error = nand_program_page(self, addr, bufp);
   1219 		if (error) {
   1220 			goto out;
   1221 		}
   1222 
   1223 		addr += chip->nc_page_size;
   1224 		bufp += chip->nc_page_size;
   1225 		*retlen += chip->nc_page_size;
   1226 	}
   1227 out:
   1228 	mutex_exit(&sc->sc_device_lock);
   1229 	DPRINTF(("page programming: retlen: %" PRIu32 ", len: %" PRIu32 "\n", *retlen, len));
   1230 
   1231 	return error;
   1232 }
   1233 
   1234 /*
   1235  * handle (page) unaligned read from nand
   1236  */
   1237 static int
   1238 nand_flash_read_unaligned(device_t self, size_t offset,
   1239     size_t len, size_t *retlen, uint8_t *buf)
   1240 {
   1241 	struct nand_softc *sc = device_private(self);
   1242 	struct nand_chip *chip = &sc->sc_chip;
   1243 	daddr_t first, last, count, firstoff;
   1244 	uint8_t *bufp;
   1245 	daddr_t addr;
   1246 	size_t left;
   1247 	int error = 0, i;
   1248 
   1249 	first = offset & chip->nc_page_mask;
   1250 	firstoff = offset & ~chip->nc_page_mask;
   1251 	last = (offset + len) & chip->nc_page_mask;
   1252 	count = (last - first) / chip->nc_page_size + 1;
   1253 
   1254 	addr = first;
   1255 	bufp = buf;
   1256 	left = len;
   1257 	*retlen = 0;
   1258 
   1259 	mutex_enter(&sc->sc_device_lock);
   1260 	if (count == 1) {
   1261 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1262 		if (error) {
   1263 			goto out;
   1264 		}
   1265 
   1266 		memcpy(bufp, chip->nc_page_cache + firstoff, len);
   1267 
   1268 		*retlen = len;
   1269 		goto out;
   1270 	}
   1271 
   1272 	for (i = 0; i < count && left != 0; i++) {
   1273 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1274 		if (error) {
   1275 			goto out;
   1276 		}
   1277 
   1278 		if (i == 0) {
   1279 			memcpy(bufp, chip->nc_page_cache + firstoff,
   1280 			    chip->nc_page_size - firstoff);
   1281 
   1282 			bufp += chip->nc_page_size - firstoff;
   1283 			left -= chip->nc_page_size - firstoff;
   1284 			*retlen += chip->nc_page_size - firstoff;
   1285 
   1286 		} else if (i == count - 1) {
   1287 			memcpy(bufp, chip->nc_page_cache, left);
   1288 			*retlen += left;
   1289 			KASSERT(left < chip->nc_page_size);
   1290 
   1291 		} else {
   1292 			memcpy(bufp, chip->nc_page_cache, chip->nc_page_size);
   1293 
   1294 			bufp += chip->nc_page_size;
   1295 			left -= chip->nc_page_size;
   1296 			*retlen += chip->nc_page_size;
   1297 		}
   1298 
   1299 		addr += chip->nc_page_size;
   1300 	}
   1301 	KASSERT(*retlen == len);
   1302 out:
   1303 	mutex_exit(&sc->sc_device_lock);
   1304 
   1305 	return error;
   1306 }
   1307 
   1308 int
   1309 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1310     uint8_t *buf)
   1311 {
   1312 	struct nand_softc *sc = device_private(self);
   1313 	struct nand_chip *chip = &sc->sc_chip;
   1314 	uint8_t *bufp;
   1315 	size_t addr;
   1316 	size_t i, pages;
   1317 	int error = 0;
   1318 
   1319 	*retlen = 0;
   1320 
   1321 	DPRINTF(("nand_flash_read: off: 0x%jx, len: %" PRIu32 "\n",
   1322 		(uintmax_t)offset, len));
   1323 
   1324 	if (__predict_false((offset + len) > chip->nc_size)) {
   1325 		DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %" PRIu32 "),"
   1326 			" is over device size (%ju)\n", (uintmax_t)offset,
   1327 			len, (uintmax_t)chip->nc_size));
   1328 		return EINVAL;
   1329 	}
   1330 
   1331 	/* Handle unaligned access, shouldnt be needed when using the
   1332 	 * block device, as strategy handles it, so only low level
   1333 	 * accesses will use this path
   1334 	 */
   1335 	/* XXX^2 */
   1336 #if 0
   1337 	if (len < chip->nc_page_size)
   1338 		panic("TODO page size is larger than read size");
   1339 #endif
   1340 
   1341 	if (len % chip->nc_page_size != 0 ||
   1342 	    offset % chip->nc_page_size != 0) {
   1343 		return nand_flash_read_unaligned(self,
   1344 		    offset, len, retlen, buf);
   1345 	}
   1346 
   1347 	bufp = buf;
   1348 	addr = offset;
   1349 	pages = len / chip->nc_page_size;
   1350 
   1351 	mutex_enter(&sc->sc_device_lock);
   1352 	for (i = 0; i < pages; i++) {
   1353 		/* XXX do we need this check here? */
   1354 		if (nand_isbad(self, addr)) {
   1355 			aprint_error_dev(self, "bad block encountered\n");
   1356 			error = EIO;
   1357 			goto out;
   1358 		}
   1359 		error = nand_read_page(self, addr, bufp);
   1360 		if (error)
   1361 			goto out;
   1362 
   1363 		bufp += chip->nc_page_size;
   1364 		addr += chip->nc_page_size;
   1365 		*retlen += chip->nc_page_size;
   1366 	}
   1367 out:
   1368 	mutex_exit(&sc->sc_device_lock);
   1369 
   1370 	return error;
   1371 }
   1372 
   1373 int
   1374 nand_flash_isbad(device_t self, flash_off_t ofs, bool *is_bad)
   1375 {
   1376 	struct nand_softc *sc = device_private(self);
   1377 	struct nand_chip *chip = &sc->sc_chip;
   1378 	bool result;
   1379 
   1380 	if (ofs > chip->nc_size) {
   1381 		DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than"
   1382 			" device size (0x%jx)\n", (uintmax_t)ofs,
   1383 			(uintmax_t)chip->nc_size));
   1384 		return EINVAL;
   1385 	}
   1386 
   1387 	if (ofs % chip->nc_block_size != 0) {
   1388 		DPRINTF(("offset (0x%jx) is not a multiple of block size "
   1389 			"(%ju)",
   1390 			(uintmax_t)ofs, (uintmax_t)chip->nc_block_size));
   1391 		return EINVAL;
   1392 	}
   1393 
   1394 	mutex_enter(&sc->sc_device_lock);
   1395 	result = nand_isbad(self, ofs);
   1396 	mutex_exit(&sc->sc_device_lock);
   1397 
   1398 	*is_bad = result;
   1399 
   1400 	return 0;
   1401 }
   1402 
   1403 int
   1404 nand_flash_markbad(device_t self, flash_off_t ofs)
   1405 {
   1406 	struct nand_softc *sc = device_private(self);
   1407 	struct nand_chip *chip = &sc->sc_chip;
   1408 
   1409 	if (ofs > chip->nc_size) {
   1410 		DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than"
   1411 			" device size (0x%jx)\n", ofs,
   1412 			(uintmax_t)chip->nc_size));
   1413 		return EINVAL;
   1414 	}
   1415 
   1416 	if (ofs % chip->nc_block_size != 0) {
   1417 		panic("offset (%ju) is not a multiple of block size (%ju)",
   1418 		    (uintmax_t)ofs, (uintmax_t)chip->nc_block_size);
   1419 	}
   1420 
   1421 	mutex_enter(&sc->sc_device_lock);
   1422 	nand_markbad(self, ofs);
   1423 	mutex_exit(&sc->sc_device_lock);
   1424 
   1425 	return 0;
   1426 }
   1427 
   1428 int
   1429 nand_flash_erase(device_t self,
   1430     struct flash_erase_instruction *ei)
   1431 {
   1432 	struct nand_softc *sc = device_private(self);
   1433 	struct nand_chip *chip = &sc->sc_chip;
   1434 	flash_off_t addr;
   1435 	int error = 0;
   1436 
   1437 	if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size)
   1438 		return EINVAL;
   1439 
   1440 	if (ei->ei_addr + ei->ei_len > chip->nc_size) {
   1441 		DPRINTF(("nand_flash_erase: erase address is over the end"
   1442 			" of the device\n"));
   1443 		return EINVAL;
   1444 	}
   1445 
   1446 	if (ei->ei_addr % chip->nc_block_size != 0) {
   1447 		aprint_error_dev(self,
   1448 		    "nand_flash_erase: ei_addr (%ju) is not"
   1449 		    " a multiple of block size (%ju)",
   1450 		    (uintmax_t)ei->ei_addr,
   1451 		    (uintmax_t)chip->nc_block_size);
   1452 		return EINVAL;
   1453 	}
   1454 
   1455 	if (ei->ei_len % chip->nc_block_size != 0) {
   1456 		aprint_error_dev(self,
   1457 		    "nand_flash_erase: ei_len (%ju) is not"
   1458 		    " a multiple of block size (%ju)",
   1459 		    (uintmax_t)ei->ei_len,
   1460 		    (uintmax_t)chip->nc_block_size);
   1461 		return EINVAL;
   1462 	}
   1463 
   1464 	mutex_enter(&sc->sc_device_lock);
   1465 	addr = ei->ei_addr;
   1466 	while (addr < ei->ei_addr + ei->ei_len) {
   1467 		if (nand_isbad(self, addr)) {
   1468 			aprint_error_dev(self, "bad block encountered\n");
   1469 			ei->ei_state = FLASH_ERASE_FAILED;
   1470 			error = EIO;
   1471 			goto out;
   1472 		}
   1473 
   1474 		error = nand_erase_block(self, addr);
   1475 		if (error) {
   1476 			ei->ei_state = FLASH_ERASE_FAILED;
   1477 			goto out;
   1478 		}
   1479 
   1480 		addr += chip->nc_block_size;
   1481 	}
   1482 	mutex_exit(&sc->sc_device_lock);
   1483 
   1484 	ei->ei_state = FLASH_ERASE_DONE;
   1485 	if (ei->ei_callback != NULL) {
   1486 		ei->ei_callback(ei);
   1487 	}
   1488 
   1489 	return 0;
   1490 out:
   1491 	mutex_exit(&sc->sc_device_lock);
   1492 
   1493 	return error;
   1494 }
   1495 
   1496 MODULE(MODULE_CLASS_DRIVER, nand, "flash");
   1497 
   1498 #ifdef _MODULE
   1499 #include "ioconf.c"
   1500 #endif
   1501 
   1502 static int
   1503 nand_modcmd(modcmd_t cmd, void *opaque)
   1504 {
   1505 	switch (cmd) {
   1506 	case MODULE_CMD_INIT:
   1507 #ifdef _MODULE
   1508 		return config_init_component(cfdriver_ioconf_nand,
   1509 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1510 #else
   1511 		return 0;
   1512 #endif
   1513 	case MODULE_CMD_FINI:
   1514 #ifdef _MODULE
   1515 		return config_fini_component(cfdriver_ioconf_nand,
   1516 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1517 #else
   1518 		return 0;
   1519 #endif
   1520 	default:
   1521 		return ENOTTY;
   1522 	}
   1523 }
   1524