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nand.c revision 1.27.20.1
      1 /*	$NetBSD: nand.c,v 1.27.20.1 2021/03/20 19:33:41 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2010 Department of Software Engineering,
      5  *		      University of Szeged, Hungary
      6  * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org>
      7  * All rights reserved.
      8  *
      9  * This code is derived from software contributed to The NetBSD Foundation
     10  * by the Department of Software Engineering, University of Szeged, Hungary
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     28  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  */
     33 
     34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.27.20.1 2021/03/20 19:33:41 thorpej Exp $");
     38 
     39 #include "locators.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/types.h>
     43 #include <sys/device.h>
     44 #include <sys/kmem.h>
     45 #include <sys/atomic.h>
     46 
     47 #include <dev/flash/flash.h>
     48 #include <dev/flash/flash_io.h>
     49 #include <dev/nand/nand.h>
     50 #include <dev/nand/onfi.h>
     51 #include <dev/nand/hamming.h>
     52 #include <dev/nand/nand_bbt.h>
     53 #include <dev/nand/nand_crc.h>
     54 
     55 #include "opt_nand.h"
     56 
     57 int nand_match(device_t, cfdata_t, void *);
     58 void nand_attach(device_t, device_t, void *);
     59 int nand_detach(device_t, int);
     60 bool nand_shutdown(device_t, int);
     61 
     62 int nand_print(void *, const char *);
     63 
     64 static int nand_search(device_t, cfdata_t, const int *, void *);
     65 static void nand_address_row(device_t, size_t);
     66 static inline uint8_t nand_get_status(device_t);
     67 static void nand_address_column(device_t, size_t, size_t);
     68 static int nand_fill_chip_structure(device_t, struct nand_chip *);
     69 static int nand_scan_media(device_t, struct nand_chip *);
     70 static bool nand_check_wp(device_t);
     71 
     72 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc),
     73     nand_match, nand_attach, nand_detach, NULL);
     74 
     75 #ifdef NAND_DEBUG
     76 int	nanddebug = NAND_DEBUG;
     77 #endif
     78 
     79 struct flash_interface nand_flash_if = {
     80 	.type = FLASH_TYPE_NAND,
     81 
     82 	.read = nand_flash_read,
     83 	.write = nand_flash_write,
     84 	.erase = nand_flash_erase,
     85 	.block_isbad = nand_flash_isbad,
     86 	.block_markbad = nand_flash_markbad,
     87 
     88 	.submit = nand_flash_submit
     89 };
     90 
     91 const struct nand_manufacturer nand_mfrs[] = {
     92 	{ NAND_MFR_AMD,		"AMD" },
     93 	{ NAND_MFR_FUJITSU,	"Fujitsu" },
     94 	{ NAND_MFR_RENESAS,	"Renesas" },
     95 	{ NAND_MFR_STMICRO,	"ST Micro" },
     96 	{ NAND_MFR_MICRON,	"Micron" },
     97 	{ NAND_MFR_NATIONAL,	"National" },
     98 	{ NAND_MFR_TOSHIBA,	"Toshiba" },
     99 	{ NAND_MFR_HYNIX,	"Hynix" },
    100 	{ NAND_MFR_SAMSUNG,	"Samsung" },
    101 	{ NAND_MFR_UNKNOWN,	"Unknown" }
    102 };
    103 
    104 static const char *
    105 nand_midtoname(int id)
    106 {
    107 	int i;
    108 
    109 	for (i = 0; nand_mfrs[i].id != 0; i++) {
    110 		if (nand_mfrs[i].id == id)
    111 			return nand_mfrs[i].name;
    112 	}
    113 
    114 	KASSERT(nand_mfrs[i].id == 0);
    115 
    116 	return nand_mfrs[i].name;
    117 }
    118 
    119 /* ARGSUSED */
    120 int
    121 nand_match(device_t parent, cfdata_t match, void *aux)
    122 {
    123 	/* pseudo device, always attaches */
    124 	return 1;
    125 }
    126 
    127 void
    128 nand_attach(device_t parent, device_t self, void *aux)
    129 {
    130 	struct nand_softc *sc = device_private(self);
    131 	struct nand_attach_args *naa = aux;
    132 	struct nand_chip *chip = &sc->sc_chip;
    133 
    134 	sc->sc_dev = self;
    135 	sc->controller_dev = parent;
    136 	sc->nand_if = naa->naa_nand_if;
    137 
    138 	aprint_naive("\n");
    139 
    140 	if (nand_check_wp(self)) {
    141 		aprint_error("NAND chip is write protected!\n");
    142 		return;
    143 	}
    144 
    145 	if (nand_scan_media(self, chip)) {
    146 		return;
    147 	}
    148 
    149 	nand_flash_if.erasesize = chip->nc_block_size;
    150 	nand_flash_if.page_size = chip->nc_page_size;
    151 	nand_flash_if.writesize = chip->nc_page_size;
    152 
    153 	/* allocate cache */
    154 	chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP);
    155 	chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP);
    156 
    157 	mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE);
    158 
    159 	if (flash_sync_thread_init(&sc->sc_flash_io, self, &nand_flash_if)) {
    160 		goto error;
    161 	}
    162 
    163 	if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown))
    164 		aprint_error_dev(sc->sc_dev,
    165 		    "couldn't establish power handler\n");
    166 
    167 #ifdef NAND_BBT
    168 	nand_bbt_init(self);
    169 	nand_bbt_scan(self);
    170 #endif
    171 
    172 	/*
    173 	 * Attach all our devices
    174 	 */
    175 	config_search(self, NULL,
    176 	    CFARG_SUBMATCH, nand_search,
    177 	    CFARG_EOL);
    178 
    179 	return;
    180 error:
    181 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    182 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    183 	mutex_destroy(&sc->sc_device_lock);
    184 }
    185 
    186 static int
    187 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    188 {
    189 	struct nand_softc *sc = device_private(parent);
    190 	struct nand_chip *chip = &sc->sc_chip;
    191 	struct flash_attach_args faa;
    192 
    193 	if (cf->cf_loc[FLASHBUSCF_DYNAMIC] != 0)
    194 		return 0;
    195 
    196 	faa.flash_if = &nand_flash_if;
    197 
    198 	faa.partinfo.part_name = NULL;
    199 	faa.partinfo.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET];
    200 
    201 	if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) {
    202 		faa.partinfo.part_size = chip->nc_size -
    203 		    faa.partinfo.part_offset;
    204 	} else {
    205 		faa.partinfo.part_size = cf->cf_loc[FLASHBUSCF_SIZE];
    206 	}
    207 
    208 	if (cf->cf_loc[FLASHBUSCF_READONLY])
    209 		faa.partinfo.part_flags = FLASH_PART_READONLY;
    210 	else
    211 		faa.partinfo.part_flags = 0;
    212 
    213 	if (config_match(parent, cf, &faa)) {
    214 		if (config_attach(parent, cf, &faa, nand_print) != NULL) {
    215 			return 0;
    216 		} else {
    217 			return 1;
    218 		}
    219 	}
    220 
    221 	return 1;
    222 }
    223 
    224 void
    225 nand_attach_mtdparts(device_t parent, const char *mtd_id, const char *cmdline)
    226 {
    227 	struct nand_softc *sc = device_private(parent);
    228 	struct nand_chip *chip = &sc->sc_chip;
    229 
    230 	flash_attach_mtdparts(&nand_flash_if, parent, chip->nc_size,
    231 	    mtd_id, cmdline);
    232 }
    233 
    234 int
    235 nand_detach(device_t self, int flags)
    236 {
    237 	struct nand_softc *sc = device_private(self);
    238 	struct nand_chip *chip = &sc->sc_chip;
    239 	int error = 0;
    240 
    241 	error = config_detach_children(self, flags);
    242 	if (error) {
    243 		return error;
    244 	}
    245 
    246 	flash_sync_thread_destroy(&sc->sc_flash_io);
    247 #ifdef NAND_BBT
    248 	nand_bbt_detach(self);
    249 #endif
    250 	/* free oob cache */
    251 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    252 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    253 	kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size);
    254 
    255 	mutex_destroy(&sc->sc_device_lock);
    256 
    257 	pmf_device_deregister(sc->sc_dev);
    258 
    259 	return error;
    260 }
    261 
    262 int
    263 nand_print(void *aux, const char *pnp)
    264 {
    265 	if (pnp != NULL)
    266 		aprint_normal("nand at %s\n", pnp);
    267 
    268 	return UNCONF;
    269 }
    270 
    271 /* ask for a nand driver to attach to the controller */
    272 device_t
    273 nand_attach_mi(struct nand_interface *nand_if, device_t parent)
    274 {
    275 	struct nand_attach_args arg;
    276 
    277 	KASSERT(nand_if != NULL);
    278 
    279 	/* fill the defaults if we have null pointers */
    280 	if (nand_if->program_page == NULL) {
    281 		nand_if->program_page = &nand_default_program_page;
    282 	}
    283 
    284 	if (nand_if->read_page == NULL) {
    285 		nand_if->read_page = &nand_default_read_page;
    286 	}
    287 
    288 	arg.naa_nand_if = nand_if;
    289 	return config_found_ia(parent, "nandbus", &arg, nand_print);
    290 }
    291 
    292 /* default everything to reasonable values, to ease future api changes */
    293 void
    294 nand_init_interface(struct nand_interface *interface)
    295 {
    296 	interface->select = &nand_default_select;
    297 	interface->command = NULL;
    298 	interface->address = NULL;
    299 	interface->read_buf_1 = NULL;
    300 	interface->read_buf_2 = NULL;
    301 	interface->read_1 = NULL;
    302 	interface->read_2 = NULL;
    303 	interface->write_buf_1 = NULL;
    304 	interface->write_buf_2 = NULL;
    305 	interface->write_1 = NULL;
    306 	interface->write_2 = NULL;
    307 	interface->busy = NULL;
    308 
    309 	/*-
    310 	 * most drivers dont want to change this, but some implement
    311 	 * read/program in one step
    312 	 */
    313 	interface->program_page = &nand_default_program_page;
    314 	interface->read_page = &nand_default_read_page;
    315 
    316 	/* default to soft ecc, that should work everywhere */
    317 	interface->ecc_compute = &nand_default_ecc_compute;
    318 	interface->ecc_correct = &nand_default_ecc_correct;
    319 	interface->ecc_prepare = NULL;
    320 	interface->ecc.necc_code_size = 3;
    321 	interface->ecc.necc_block_size = 256;
    322 	interface->ecc.necc_type = NAND_ECC_TYPE_SW;
    323 }
    324 
    325 #if 0
    326 /* handle quirks here */
    327 static void
    328 nand_quirks(device_t self, struct nand_chip *chip)
    329 {
    330 	/* this is an example only! */
    331 	switch (chip->nc_manf_id) {
    332 	case NAND_MFR_SAMSUNG:
    333 		if (chip->nc_dev_id == 0x00) {
    334 			/* do something only samsung chips need */
    335 			/* or */
    336 			/* chip->nc_quirks |= NC_QUIRK_NO_READ_START */
    337 		}
    338 	}
    339 
    340 	return;
    341 }
    342 #endif
    343 
    344 static int
    345 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip)
    346 {
    347 	switch (chip->nc_manf_id) {
    348 	case NAND_MFR_MICRON:
    349 		return nand_read_parameters_micron(self, chip);
    350 	case NAND_MFR_SAMSUNG:
    351 		return nand_read_parameters_samsung(self, chip);
    352 	case NAND_MFR_TOSHIBA:
    353 		return nand_read_parameters_toshiba(self, chip);
    354 	default:
    355 		return 1;
    356 	}
    357 
    358 	return 0;
    359 }
    360 
    361 /**
    362  * scan media to determine the chip's properties
    363  * this function resets the device
    364  */
    365 static int
    366 nand_scan_media(device_t self, struct nand_chip *chip)
    367 {
    368 	struct nand_softc *sc = device_private(self);
    369 	struct nand_ecc *ecc;
    370 	uint8_t onfi_signature[4];
    371 
    372 	nand_select(self, true);
    373 	nand_command(self, ONFI_RESET);
    374 	KASSERT(nand_get_status(self) & ONFI_STATUS_RDY);
    375 	nand_select(self, false);
    376 
    377 	/* check if the device implements the ONFI standard */
    378 	nand_select(self, true);
    379 	nand_command(self, ONFI_READ_ID);
    380 	nand_address(self, 0x20);
    381 	nand_read_1(self, &onfi_signature[0]);
    382 	nand_read_1(self, &onfi_signature[1]);
    383 	nand_read_1(self, &onfi_signature[2]);
    384 	nand_read_1(self, &onfi_signature[3]);
    385 	nand_select(self, false);
    386 
    387 #ifdef NAND_DEBUG
    388 	device_printf(self, "signature: %02x %02x %02x %02x\n",
    389 	    onfi_signature[0], onfi_signature[1],
    390 	    onfi_signature[2], onfi_signature[3]);
    391 #endif
    392 
    393 	if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' ||
    394 	    onfi_signature[2] != 'F' || onfi_signature[3] != 'I') {
    395 		chip->nc_isonfi = false;
    396 
    397 		aprint_normal(": Legacy NAND Flash\n");
    398 
    399 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    400 
    401 		if (nand_fill_chip_structure_legacy(self, chip)) {
    402 			aprint_error_dev(self,
    403 			    "can't read device parameters for legacy chip\n");
    404 			return 1;
    405 		}
    406 	} else {
    407 		chip->nc_isonfi = true;
    408 
    409 		aprint_normal(": ONFI NAND Flash\n");
    410 
    411 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    412 
    413 		if (nand_fill_chip_structure(self, chip)) {
    414 			aprint_error_dev(self,
    415 			    "can't read device parameters\n");
    416 			return 1;
    417 		}
    418 	}
    419 
    420 	aprint_normal_dev(self,
    421 	    "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n",
    422 	    chip->nc_manf_id,
    423 	    nand_midtoname(chip->nc_manf_id),
    424 	    chip->nc_dev_id);
    425 
    426 	aprint_normal_dev(self,
    427 	    "page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, "
    428 	    "block size: %" PRIu32 " bytes\n",
    429 	    chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size);
    430 
    431 	aprint_normal_dev(self,
    432 	    "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8
    433 	    ", total storage size: %" PRIu64 " MB\n",
    434 	    chip->nc_lun_blocks, chip->nc_num_luns,
    435 	    chip->nc_size / 1024 / 1024);
    436 
    437 	aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %"
    438 	    PRIu8 ", width: %s\n",
    439 	    chip->nc_addr_cycles_column, chip->nc_addr_cycles_row,
    440 	    (chip->nc_flags & NC_BUSWIDTH_16) ? "x16" : "x8");
    441 
    442 	ecc = chip->nc_ecc = &sc->nand_if->ecc;
    443 
    444 	/*
    445 	 * calculate the place of ecc data in oob
    446 	 * we try to be compatible with Linux here
    447 	 */
    448 	switch (chip->nc_spare_size) {
    449 	case 8:
    450 		ecc->necc_offset = 0;
    451 		break;
    452 	case 16:
    453 		ecc->necc_offset = 0;
    454 		break;
    455 	case 32:
    456 		ecc->necc_offset = 0;
    457 		break;
    458 	case 64:
    459 		ecc->necc_offset = 40;
    460 		break;
    461 	case 128:
    462 		ecc->necc_offset = 80;
    463 		break;
    464 	default:
    465 		panic("OOB size %" PRIu32 " is unexpected", chip->nc_spare_size);
    466 	}
    467 
    468 	ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size;
    469 	ecc->necc_size = ecc->necc_steps * ecc->necc_code_size;
    470 
    471 	/* check if we fit in oob */
    472 	if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) {
    473 		panic("NAND ECC bits dont fit in OOB");
    474 	}
    475 
    476 	/* TODO: mark free oob area available for file systems */
    477 
    478 	chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP);
    479 
    480 	/*
    481 	 * calculate badblock marker offset in oob
    482 	 * we try to be compatible with linux here
    483 	 */
    484 	if (chip->nc_page_size > 512)
    485 		chip->nc_badmarker_offs = 0;
    486 	else
    487 		chip->nc_badmarker_offs = 5;
    488 
    489 	/* Calculate page shift and mask */
    490 	chip->nc_page_shift = ffs(chip->nc_page_size) - 1;
    491 	chip->nc_page_mask = ~(chip->nc_page_size - 1);
    492 	/* same for block */
    493 	chip->nc_block_shift = ffs(chip->nc_block_size) - 1;
    494 	chip->nc_block_mask = ~(chip->nc_block_size - 1);
    495 
    496 	/* look for quirks here if needed in future */
    497 	/* nand_quirks(self, chip); */
    498 
    499 	return 0;
    500 }
    501 
    502 void
    503 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev)
    504 {
    505 	nand_select(self, true);
    506 	nand_command(self, ONFI_READ_ID);
    507 	nand_address(self, 0x00);
    508 
    509 	nand_read_1(self, manf);
    510 	nand_read_1(self, dev);
    511 
    512 	nand_select(self, false);
    513 }
    514 
    515 int
    516 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params)
    517 {
    518 	uint8_t *bufp;
    519 	uint16_t crc;
    520 	int i;//, tries = 0;
    521 
    522 	KASSERT(sizeof(*params) == 256);
    523 
    524 //read_params:
    525 //	tries++;
    526 
    527 	nand_select(self, true);
    528 	nand_command(self, ONFI_READ_PARAMETER_PAGE);
    529 	nand_address(self, 0x00);
    530 
    531 	nand_busy(self);
    532 
    533 	/* TODO check the signature if it contains at least 2 letters */
    534 
    535 	bufp = (uint8_t *)params;
    536 	/* XXX why i am not using read_buf? */
    537 	for (i = 0; i < 256; i++) {
    538 		nand_read_1(self, &bufp[i]);
    539 	}
    540 	nand_select(self, false);
    541 
    542 	/* validate the parameter page with the crc */
    543 	crc = nand_crc16(bufp, 254);
    544 
    545 	if (crc != params->param_integrity_crc) {
    546 		aprint_error_dev(self, "parameter page crc check failed\n");
    547 		/* TODO: we should read the next parameter page copy */
    548 		return 1;
    549 	}
    550 
    551 	return 0;
    552 }
    553 
    554 static int
    555 nand_fill_chip_structure(device_t self, struct nand_chip *chip)
    556 {
    557 	struct onfi_parameter_page params;
    558 	uint8_t	vendor[13], model[21];
    559 	int i;
    560 
    561 	if (nand_read_parameter_page(self, &params)) {
    562 		return 1;
    563 	}
    564 
    565 	/* strip manufacturer and model string */
    566 	strlcpy(vendor, params.param_manufacturer, sizeof(vendor));
    567 	for (i = 11; i > 0 && vendor[i] == ' '; i--)
    568 		vendor[i] = 0;
    569 	strlcpy(model, params.param_model, sizeof(model));
    570 	for (i = 19; i > 0 && model[i] == ' '; i--)
    571 		model[i] = 0;
    572 
    573 	aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model);
    574 
    575 	chip->nc_page_size = le32toh(params.param_pagesize);
    576 	chip->nc_block_size =
    577 	    le32toh(params.param_blocksize) * chip->nc_page_size;
    578 	chip->nc_spare_size = le16toh(params.param_sparesize);
    579 	chip->nc_lun_blocks = le32toh(params.param_lunsize);
    580 	chip->nc_num_luns = params.param_numluns;
    581 
    582 	chip->nc_size =
    583 	    chip->nc_block_size * chip->nc_lun_blocks * chip->nc_num_luns;
    584 
    585 	/* the lower 4 bits contain the row address cycles */
    586 	chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07;
    587 	/* the upper 4 bits contain the column address cycles */
    588 	chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4;
    589 
    590 	uint16_t features = le16toh(params.param_features);
    591 	if (features & ONFI_FEATURE_16BIT) {
    592 		chip->nc_flags |= NC_BUSWIDTH_16;
    593 	}
    594 
    595 	if (features & ONFI_FEATURE_EXTENDED_PARAM) {
    596 		chip->nc_flags |= NC_EXTENDED_PARAM;
    597 	}
    598 
    599 	return 0;
    600 }
    601 
    602 /* ARGSUSED */
    603 bool
    604 nand_shutdown(device_t self, int howto)
    605 {
    606 	return true;
    607 }
    608 
    609 static void
    610 nand_address_column(device_t self, size_t row, size_t column)
    611 {
    612 	struct nand_softc *sc = device_private(self);
    613 	struct nand_chip *chip = &sc->sc_chip;
    614 	uint8_t i;
    615 
    616 	DPRINTF(("addressing row: 0x%jx column: %" PRIu32 "\n",
    617 		(uintmax_t )row, column));
    618 
    619 	/* XXX TODO */
    620 	row >>= chip->nc_page_shift;
    621 
    622 	/* Write the column (subpage) address */
    623 	if (chip->nc_flags & NC_BUSWIDTH_16)
    624 		column >>= 1;
    625 	for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8)
    626 		nand_address(self, column & 0xff);
    627 
    628 	/* Write the row (page) address */
    629 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    630 		nand_address(self, row & 0xff);
    631 }
    632 
    633 static void
    634 nand_address_row(device_t self, size_t row)
    635 {
    636 	struct nand_softc *sc = device_private(self);
    637 	struct nand_chip *chip = &sc->sc_chip;
    638 	int i;
    639 
    640 	/* XXX TODO */
    641 	row >>= chip->nc_page_shift;
    642 
    643 	/* Write the row (page) address */
    644 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    645 		nand_address(self, row & 0xff);
    646 }
    647 
    648 static inline uint8_t
    649 nand_get_status(device_t self)
    650 {
    651 	uint8_t status;
    652 
    653 	nand_command(self, ONFI_READ_STATUS);
    654 	nand_busy(self);
    655 	nand_read_1(self, &status);
    656 
    657 	return status;
    658 }
    659 
    660 static bool
    661 nand_check_wp(device_t self)
    662 {
    663 	if (nand_get_status(self) & ONFI_STATUS_WP)
    664 		return false;
    665 	else
    666 		return true;
    667 }
    668 
    669 static void
    670 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column)
    671 {
    672 	nand_command(self, ONFI_READ);
    673 	nand_address_column(self, row, column);
    674 	nand_command(self, ONFI_READ_START);
    675 
    676 	nand_busy(self);
    677 }
    678 
    679 /* read a page with ecc correction, default implementation */
    680 int
    681 nand_default_read_page(device_t self, size_t offset, uint8_t *data)
    682 {
    683 	struct nand_softc *sc = device_private(self);
    684 	struct nand_chip *chip = &sc->sc_chip;
    685 	size_t b, bs, e, cs;
    686 	uint8_t *ecc;
    687 	int result;
    688 
    689 	nand_prepare_read(self, offset, 0);
    690 
    691 	bs = chip->nc_ecc->necc_block_size;
    692 	cs = chip->nc_ecc->necc_code_size;
    693 
    694 	/* decide if we access by 8 or 16 bits */
    695 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    696 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    697 			nand_ecc_prepare(self, NAND_ECC_READ);
    698 			nand_read_buf_2(self, data + b, bs);
    699 			nand_ecc_compute(self, data + b,
    700 			    chip->nc_ecc_cache + e);
    701 		}
    702 	} else {
    703 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    704 			nand_ecc_prepare(self, NAND_ECC_READ);
    705 			nand_read_buf_1(self, data + b, bs);
    706 			nand_ecc_compute(self, data + b,
    707 			    chip->nc_ecc_cache + e);
    708 		}
    709 	}
    710 
    711 	/* for debugging new drivers */
    712 #if 0
    713 	nand_dump_data("page", data, chip->nc_page_size);
    714 #endif
    715 
    716 	nand_read_oob(self, offset, chip->nc_oob_cache);
    717 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    718 
    719 	/* useful for debugging new ecc drivers */
    720 #if 0
    721 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    722 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    723 		printf("0x");
    724 		for (b = 0; b < cs; b++) {
    725 			printf("%.2hhx", ecc[e+b]);
    726 		}
    727 		printf(" 0x");
    728 		for (b = 0; b < cs; b++) {
    729 			printf("%.2hhx", chip->nc_ecc_cache[e+b]);
    730 		}
    731 		printf("\n");
    732 	}
    733 	printf("--------------\n");
    734 #endif
    735 
    736 	for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    737 		result = nand_ecc_correct(self, data + b, ecc + e,
    738 		    chip->nc_ecc_cache + e);
    739 
    740 		switch (result) {
    741 		case NAND_ECC_OK:
    742 			break;
    743 		case NAND_ECC_CORRECTED:
    744 			aprint_error_dev(self,
    745 			    "data corrected with ECC at page offset 0x%jx "
    746 			    "block %zu\n", (uintmax_t)offset, b);
    747 			break;
    748 		case NAND_ECC_TWOBIT:
    749 			aprint_error_dev(self,
    750 			    "uncorrectable ECC error at page offset 0x%jx "
    751 			    "block %zu\n", (uintmax_t)offset, b);
    752 			return EIO;
    753 			break;
    754 		case NAND_ECC_INVALID:
    755 			aprint_error_dev(self,
    756 			    "invalid ECC in oob at page offset 0x%jx "
    757 			    "block %zu\n", (uintmax_t)offset, b);
    758 			return EIO;
    759 			break;
    760 		default:
    761 			panic("invalid ECC correction errno");
    762 		}
    763 	}
    764 
    765 	return 0;
    766 }
    767 
    768 int
    769 nand_default_program_page(device_t self, size_t page, const uint8_t *data)
    770 {
    771 	struct nand_softc *sc = device_private(self);
    772 	struct nand_chip *chip = &sc->sc_chip;
    773 	size_t bs, cs, e, b;
    774 	uint8_t status;
    775 	uint8_t *ecc;
    776 
    777 	nand_command(self, ONFI_PAGE_PROGRAM);
    778 	nand_address_column(self, page, 0);
    779 
    780 	nand_busy(self);
    781 
    782 	bs = chip->nc_ecc->necc_block_size;
    783 	cs = chip->nc_ecc->necc_code_size;
    784 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    785 
    786 	/* XXX code duplication */
    787 	/* decide if we access by 8 or 16 bits */
    788 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    789 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    790 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    791 			nand_write_buf_2(self, data + b, bs);
    792 			nand_ecc_compute(self, data + b, ecc + e);
    793 		}
    794 		/* write oob with ecc correction code */
    795 		nand_write_buf_2(self, chip->nc_oob_cache,
    796 		    chip->nc_spare_size);
    797 	} else {
    798 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    799 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    800 			nand_write_buf_1(self, data + b, bs);
    801 			nand_ecc_compute(self, data + b, ecc + e);
    802 		}
    803 		/* write oob with ecc correction code */
    804 		nand_write_buf_1(self, chip->nc_oob_cache,
    805 		    chip->nc_spare_size);
    806 	}
    807 
    808 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    809 
    810 	nand_busy(self);
    811 
    812 	/* for debugging ecc */
    813 #if 0
    814 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    815 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    816 		printf("0x");
    817 		for (b = 0; b < cs; b++) {
    818 			printf("%.2hhx", ecc[e+b]);
    819 		}
    820 		printf("\n");
    821 	}
    822 	printf("--------------\n");
    823 #endif
    824 
    825 	status = nand_get_status(self);
    826 	KASSERT(status & ONFI_STATUS_RDY);
    827 	if (status & ONFI_STATUS_FAIL) {
    828 		aprint_error_dev(self, "page program failed!\n");
    829 		return EIO;
    830 	}
    831 
    832 	return 0;
    833 }
    834 
    835 /* read the OOB of a page */
    836 int
    837 nand_read_oob(device_t self, size_t page, uint8_t *oob)
    838 {
    839 	struct nand_softc *sc = device_private(self);
    840 	struct nand_chip *chip = &sc->sc_chip;
    841 
    842 	nand_prepare_read(self, page, chip->nc_page_size);
    843 
    844 	if (chip->nc_flags & NC_BUSWIDTH_16)
    845 		nand_read_buf_2(self, oob, chip->nc_spare_size);
    846 	else
    847 		nand_read_buf_1(self, oob, chip->nc_spare_size);
    848 
    849 	/* for debugging drivers */
    850 #if 0
    851 	nand_dump_data("oob", oob, chip->nc_spare_size);
    852 #endif
    853 
    854 	return 0;
    855 }
    856 
    857 static int
    858 nand_write_oob(device_t self, size_t offset, const void *oob)
    859 {
    860 	struct nand_softc *sc = device_private(self);
    861 	struct nand_chip *chip = &sc->sc_chip;
    862 	uint8_t status;
    863 
    864 	nand_command(self, ONFI_PAGE_PROGRAM);
    865 	nand_address_column(self, offset, chip->nc_page_size);
    866 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    867 
    868 	nand_busy(self);
    869 
    870 	if (chip->nc_flags & NC_BUSWIDTH_16)
    871 		nand_write_buf_2(self, oob, chip->nc_spare_size);
    872 	else
    873 		nand_write_buf_1(self, oob, chip->nc_spare_size);
    874 
    875 	status = nand_get_status(self);
    876 	KASSERT(status & ONFI_STATUS_RDY);
    877 	if (status & ONFI_STATUS_FAIL)
    878 		return EIO;
    879 	else
    880 		return 0;
    881 }
    882 
    883 void
    884 nand_markbad(device_t self, size_t offset)
    885 {
    886 	struct nand_softc *sc = device_private(self);
    887 	struct nand_chip *chip = &sc->sc_chip;
    888 	flash_off_t blockoffset;
    889 #ifdef NAND_BBT
    890 	flash_off_t block;
    891 
    892 	block = offset / chip->nc_block_size;
    893 
    894 	nand_bbt_block_markbad(self, block);
    895 #endif
    896 	blockoffset = offset & chip->nc_block_mask;
    897 
    898 	/* check if it is already marked bad */
    899 	if (nand_isbad(self, blockoffset))
    900 		return;
    901 
    902 	nand_read_oob(self, blockoffset, chip->nc_oob_cache);
    903 
    904 	chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00;
    905 	chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00;
    906 
    907 	nand_write_oob(self, blockoffset, chip->nc_oob_cache);
    908 }
    909 
    910 bool
    911 nand_isfactorybad(device_t self, flash_off_t offset)
    912 {
    913 	struct nand_softc *sc = device_private(self);
    914 	struct nand_chip *chip = &sc->sc_chip;
    915 	flash_off_t block, first_page, last_page, page;
    916 	int i;
    917 
    918 	/* Check for factory bad blocks first
    919 	 * Factory bad blocks are marked in the first or last
    920 	 * page of the blocks, see: ONFI 2.2, 3.2.2.
    921 	 */
    922 	block = offset / chip->nc_block_size;
    923 	first_page = block * chip->nc_block_size;
    924 	last_page = (block + 1) * chip->nc_block_size
    925 	    - chip->nc_page_size;
    926 
    927 	for (i = 0, page = first_page; i < 2; i++, page = last_page) {
    928 		/* address OOB */
    929 		nand_prepare_read(self, page, chip->nc_page_size);
    930 
    931 		if (chip->nc_flags & NC_BUSWIDTH_16) {
    932 			uint16_t word;
    933 			nand_read_2(self, &word);
    934 			if (word == 0x0000)
    935 				return true;
    936 		} else {
    937 			uint8_t byte;
    938 			nand_read_1(self, &byte);
    939 			if (byte == 0x00)
    940 				return true;
    941 		}
    942 	}
    943 
    944 	return false;
    945 }
    946 
    947 bool
    948 nand_iswornoutbad(device_t self, flash_off_t offset)
    949 {
    950 	struct nand_softc *sc = device_private(self);
    951 	struct nand_chip *chip = &sc->sc_chip;
    952 	flash_off_t block;
    953 
    954 	/* we inspect the first page of the block */
    955 	block = offset & chip->nc_block_mask;
    956 
    957 	/* Linux/u-boot compatible badblock handling */
    958 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    959 		uint16_t word, mark;
    960 
    961 		nand_prepare_read(self, block,
    962 		    chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe));
    963 
    964 		nand_read_2(self, &word);
    965 		mark = htole16(word);
    966 		if (chip->nc_badmarker_offs & 0x01)
    967 			mark >>= 8;
    968 		if ((mark & 0xff) != 0xff)
    969 			return true;
    970 	} else {
    971 		uint8_t byte;
    972 
    973 		nand_prepare_read(self, block,
    974 		    chip->nc_page_size + chip->nc_badmarker_offs);
    975 
    976 		nand_read_1(self, &byte);
    977 		if (byte != 0xff)
    978 			return true;
    979 	}
    980 
    981 	return false;
    982 }
    983 
    984 bool
    985 nand_isbad(device_t self, flash_off_t offset)
    986 {
    987 #ifdef NAND_BBT
    988 	struct nand_softc *sc = device_private(self);
    989 	struct nand_chip *chip = &sc->sc_chip;
    990 	flash_off_t block;
    991 
    992 	block = offset / chip->nc_block_size;
    993 
    994 	return nand_bbt_block_isbad(self, block);
    995 #else
    996 	/* ONFI host requirement */
    997 	if (nand_isfactorybad(self, offset))
    998 		return true;
    999 
   1000 	/* Look for Linux/U-Boot compatible bad marker */
   1001 	if (nand_iswornoutbad(self, offset))
   1002 		return true;
   1003 
   1004 	return false;
   1005 #endif
   1006 }
   1007 
   1008 int
   1009 nand_erase_block(device_t self, size_t offset)
   1010 {
   1011 	uint8_t status;
   1012 
   1013 	/* xxx calculate first page of block for address? */
   1014 
   1015 	nand_command(self, ONFI_BLOCK_ERASE);
   1016 	nand_address_row(self, offset);
   1017 	nand_command(self, ONFI_BLOCK_ERASE_START);
   1018 
   1019 	nand_busy(self);
   1020 
   1021 	status = nand_get_status(self);
   1022 	KASSERT(status & ONFI_STATUS_RDY);
   1023 	if (status & ONFI_STATUS_FAIL) {
   1024 		aprint_error_dev(self, "block erase failed!\n");
   1025 		nand_markbad(self, offset);
   1026 		return EIO;
   1027 	} else {
   1028 		return 0;
   1029 	}
   1030 }
   1031 
   1032 /* default functions for driver development */
   1033 
   1034 /* default ECC using hamming code of 256 byte chunks */
   1035 int
   1036 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code)
   1037 {
   1038 	hamming_compute_256(data, code);
   1039 
   1040 	return 0;
   1041 }
   1042 
   1043 int
   1044 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode,
   1045 	const uint8_t *compcode)
   1046 {
   1047 	return hamming_correct_256(data, origcode, compcode);
   1048 }
   1049 
   1050 void
   1051 nand_default_select(device_t self, bool enable)
   1052 {
   1053 	/* do nothing */
   1054 	return;
   1055 }
   1056 
   1057 /* implementation of the block device API */
   1058 
   1059 int
   1060 nand_flash_submit(device_t self, struct buf * const bp)
   1061 {
   1062 	struct nand_softc *sc = device_private(self);
   1063 
   1064 	return flash_io_submit(&sc->sc_flash_io, bp);
   1065 }
   1066 
   1067 /*
   1068  * handle (page) unaligned write to nand
   1069  */
   1070 static int
   1071 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len,
   1072     size_t *retlen, const uint8_t *buf)
   1073 {
   1074 	struct nand_softc *sc = device_private(self);
   1075 	struct nand_chip *chip = &sc->sc_chip;
   1076 	flash_off_t first, last, firstoff;
   1077 	const uint8_t *bufp;
   1078 	flash_off_t addr;
   1079 	size_t left, count;
   1080 	int error = 0, i;
   1081 
   1082 	first = offset & chip->nc_page_mask;
   1083 	firstoff = offset & ~chip->nc_page_mask;
   1084 	/* XXX check if this should be len - 1 */
   1085 	last = (offset + len) & chip->nc_page_mask;
   1086 	count = last - first + 1;
   1087 
   1088 	addr = first;
   1089 	*retlen = 0;
   1090 
   1091 	mutex_enter(&sc->sc_device_lock);
   1092 	if (count == 1) {
   1093 		if (nand_isbad(self, addr)) {
   1094 			aprint_error_dev(self,
   1095 			    "nand_flash_write_unaligned: "
   1096 			    "bad block encountered\n");
   1097 			error = EIO;
   1098 			goto out;
   1099 		}
   1100 
   1101 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1102 		if (error) {
   1103 			goto out;
   1104 		}
   1105 
   1106 		memcpy(chip->nc_page_cache + firstoff, buf, len);
   1107 
   1108 		error = nand_program_page(self, addr, chip->nc_page_cache);
   1109 		if (error) {
   1110 			goto out;
   1111 		}
   1112 
   1113 		*retlen = len;
   1114 		goto out;
   1115 	}
   1116 
   1117 	bufp = buf;
   1118 	left = len;
   1119 
   1120 	for (i = 0; i < count && left != 0; i++) {
   1121 		if (nand_isbad(self, addr)) {
   1122 			aprint_error_dev(self,
   1123 			    "nand_flash_write_unaligned: "
   1124 			    "bad block encountered\n");
   1125 			error = EIO;
   1126 			goto out;
   1127 		}
   1128 
   1129 		if (i == 0) {
   1130 			error = nand_read_page(self,
   1131 			    addr, chip->nc_page_cache);
   1132 			if (error) {
   1133 				goto out;
   1134 			}
   1135 
   1136 			memcpy(chip->nc_page_cache + firstoff,
   1137 			    bufp, chip->nc_page_size - firstoff);
   1138 
   1139 			printf("program page: %s: %d\n", __FILE__, __LINE__);
   1140 			error = nand_program_page(self,
   1141 			    addr, chip->nc_page_cache);
   1142 			if (error) {
   1143 				goto out;
   1144 			}
   1145 
   1146 			bufp += chip->nc_page_size - firstoff;
   1147 			left -= chip->nc_page_size - firstoff;
   1148 			*retlen += chip->nc_page_size - firstoff;
   1149 
   1150 		} else if (i == count - 1) {
   1151 			error = nand_read_page(self,
   1152 			    addr, chip->nc_page_cache);
   1153 			if (error) {
   1154 				goto out;
   1155 			}
   1156 
   1157 			memcpy(chip->nc_page_cache, bufp, left);
   1158 
   1159 			error = nand_program_page(self,
   1160 			    addr, chip->nc_page_cache);
   1161 			if (error) {
   1162 				goto out;
   1163 			}
   1164 
   1165 			*retlen += left;
   1166 			KASSERT(left < chip->nc_page_size);
   1167 
   1168 		} else {
   1169 			/* XXX debug */
   1170 			if (left > chip->nc_page_size) {
   1171 				printf("left: %zu, i: %d, count: %zu\n",
   1172 				    left, i, count);
   1173 			}
   1174 			KASSERT(left > chip->nc_page_size);
   1175 
   1176 			error = nand_program_page(self, addr, bufp);
   1177 			if (error) {
   1178 				goto out;
   1179 			}
   1180 
   1181 			bufp += chip->nc_page_size;
   1182 			left -= chip->nc_page_size;
   1183 			*retlen += chip->nc_page_size;
   1184 		}
   1185 
   1186 		addr += chip->nc_page_size;
   1187 	}
   1188 
   1189 	KASSERT(*retlen == len);
   1190 out:
   1191 	mutex_exit(&sc->sc_device_lock);
   1192 
   1193 	return error;
   1194 }
   1195 
   1196 int
   1197 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1198     const uint8_t *buf)
   1199 {
   1200 	struct nand_softc *sc = device_private(self);
   1201 	struct nand_chip *chip = &sc->sc_chip;
   1202 	const uint8_t *bufp;
   1203 	size_t pages, page;
   1204 	daddr_t addr;
   1205 	int error = 0;
   1206 
   1207 	if ((offset + len) > chip->nc_size) {
   1208 		DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju),"
   1209 			" is over device size (0x%jx)\n",
   1210 			(uintmax_t)offset, (uintmax_t)len,
   1211 			(uintmax_t)chip->nc_size));
   1212 		return EINVAL;
   1213 	}
   1214 
   1215 	if (len % chip->nc_page_size != 0 ||
   1216 	    offset % chip->nc_page_size != 0) {
   1217 		return nand_flash_write_unaligned(self,
   1218 		    offset, len, retlen, buf);
   1219 	}
   1220 
   1221 	pages = len / chip->nc_page_size;
   1222 	KASSERT(pages != 0);
   1223 	*retlen = 0;
   1224 
   1225 	addr = offset;
   1226 	bufp = buf;
   1227 
   1228 	mutex_enter(&sc->sc_device_lock);
   1229 	for (page = 0; page < pages; page++) {
   1230 		/* do we need this check here? */
   1231 		if (nand_isbad(self, addr)) {
   1232 			aprint_error_dev(self,
   1233 			    "nand_flash_write: bad block encountered\n");
   1234 
   1235 			error = EIO;
   1236 			goto out;
   1237 		}
   1238 
   1239 		error = nand_program_page(self, addr, bufp);
   1240 		if (error) {
   1241 			goto out;
   1242 		}
   1243 
   1244 		addr += chip->nc_page_size;
   1245 		bufp += chip->nc_page_size;
   1246 		*retlen += chip->nc_page_size;
   1247 	}
   1248 out:
   1249 	mutex_exit(&sc->sc_device_lock);
   1250 	DPRINTF(("page programming: retlen: %" PRIu32 ", len: %" PRIu32 "\n", *retlen, len));
   1251 
   1252 	return error;
   1253 }
   1254 
   1255 /*
   1256  * handle (page) unaligned read from nand
   1257  */
   1258 static int
   1259 nand_flash_read_unaligned(device_t self, size_t offset,
   1260     size_t len, size_t *retlen, uint8_t *buf)
   1261 {
   1262 	struct nand_softc *sc = device_private(self);
   1263 	struct nand_chip *chip = &sc->sc_chip;
   1264 	daddr_t first, last, count, firstoff;
   1265 	uint8_t *bufp;
   1266 	daddr_t addr;
   1267 	size_t left;
   1268 	int error = 0, i;
   1269 
   1270 	first = offset & chip->nc_page_mask;
   1271 	firstoff = offset & ~chip->nc_page_mask;
   1272 	last = (offset + len) & chip->nc_page_mask;
   1273 	count = (last - first) / chip->nc_page_size + 1;
   1274 
   1275 	addr = first;
   1276 	bufp = buf;
   1277 	left = len;
   1278 	*retlen = 0;
   1279 
   1280 	mutex_enter(&sc->sc_device_lock);
   1281 	if (count == 1) {
   1282 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1283 		if (error) {
   1284 			goto out;
   1285 		}
   1286 
   1287 		memcpy(bufp, chip->nc_page_cache + firstoff, len);
   1288 
   1289 		*retlen = len;
   1290 		goto out;
   1291 	}
   1292 
   1293 	for (i = 0; i < count && left != 0; i++) {
   1294 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1295 		if (error) {
   1296 			goto out;
   1297 		}
   1298 
   1299 		if (i == 0) {
   1300 			memcpy(bufp, chip->nc_page_cache + firstoff,
   1301 			    chip->nc_page_size - firstoff);
   1302 
   1303 			bufp += chip->nc_page_size - firstoff;
   1304 			left -= chip->nc_page_size - firstoff;
   1305 			*retlen += chip->nc_page_size - firstoff;
   1306 
   1307 		} else if (i == count - 1) {
   1308 			memcpy(bufp, chip->nc_page_cache, left);
   1309 			*retlen += left;
   1310 			KASSERT(left < chip->nc_page_size);
   1311 
   1312 		} else {
   1313 			memcpy(bufp, chip->nc_page_cache, chip->nc_page_size);
   1314 
   1315 			bufp += chip->nc_page_size;
   1316 			left -= chip->nc_page_size;
   1317 			*retlen += chip->nc_page_size;
   1318 		}
   1319 
   1320 		addr += chip->nc_page_size;
   1321 	}
   1322 	KASSERT(*retlen == len);
   1323 out:
   1324 	mutex_exit(&sc->sc_device_lock);
   1325 
   1326 	return error;
   1327 }
   1328 
   1329 int
   1330 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1331     uint8_t *buf)
   1332 {
   1333 	struct nand_softc *sc = device_private(self);
   1334 	struct nand_chip *chip = &sc->sc_chip;
   1335 	uint8_t *bufp;
   1336 	size_t addr;
   1337 	size_t i, pages;
   1338 	int error = 0;
   1339 
   1340 	*retlen = 0;
   1341 
   1342 	DPRINTF(("nand_flash_read: off: 0x%jx, len: %" PRIu32 "\n",
   1343 		(uintmax_t)offset, len));
   1344 
   1345 	if (__predict_false((offset + len) > chip->nc_size)) {
   1346 		DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %" PRIu32 "),"
   1347 			" is over device size (%ju)\n", (uintmax_t)offset,
   1348 			len, (uintmax_t)chip->nc_size));
   1349 		return EINVAL;
   1350 	}
   1351 
   1352 	/* Handle unaligned access, shouldnt be needed when using the
   1353 	 * block device, as strategy handles it, so only low level
   1354 	 * accesses will use this path
   1355 	 */
   1356 	/* XXX^2 */
   1357 #if 0
   1358 	if (len < chip->nc_page_size)
   1359 		panic("TODO page size is larger than read size");
   1360 #endif
   1361 
   1362 	if (len % chip->nc_page_size != 0 ||
   1363 	    offset % chip->nc_page_size != 0) {
   1364 		return nand_flash_read_unaligned(self,
   1365 		    offset, len, retlen, buf);
   1366 	}
   1367 
   1368 	bufp = buf;
   1369 	addr = offset;
   1370 	pages = len / chip->nc_page_size;
   1371 
   1372 	mutex_enter(&sc->sc_device_lock);
   1373 	for (i = 0; i < pages; i++) {
   1374 		/* XXX do we need this check here? */
   1375 		if (nand_isbad(self, addr)) {
   1376 			aprint_error_dev(self, "bad block encountered\n");
   1377 			error = EIO;
   1378 			goto out;
   1379 		}
   1380 		error = nand_read_page(self, addr, bufp);
   1381 		if (error)
   1382 			goto out;
   1383 
   1384 		bufp += chip->nc_page_size;
   1385 		addr += chip->nc_page_size;
   1386 		*retlen += chip->nc_page_size;
   1387 	}
   1388 out:
   1389 	mutex_exit(&sc->sc_device_lock);
   1390 
   1391 	return error;
   1392 }
   1393 
   1394 int
   1395 nand_flash_isbad(device_t self, flash_off_t ofs, bool *is_bad)
   1396 {
   1397 	struct nand_softc *sc = device_private(self);
   1398 	struct nand_chip *chip = &sc->sc_chip;
   1399 	bool result;
   1400 
   1401 	if (ofs > chip->nc_size) {
   1402 		DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than"
   1403 			" device size (0x%jx)\n", (uintmax_t)ofs,
   1404 			(uintmax_t)chip->nc_size));
   1405 		return EINVAL;
   1406 	}
   1407 
   1408 	if (ofs % chip->nc_block_size != 0) {
   1409 		DPRINTF(("offset (0x%jx) is not a multiple of block size "
   1410 			"(%ju)",
   1411 			(uintmax_t)ofs, (uintmax_t)chip->nc_block_size));
   1412 		return EINVAL;
   1413 	}
   1414 
   1415 	mutex_enter(&sc->sc_device_lock);
   1416 	result = nand_isbad(self, ofs);
   1417 	mutex_exit(&sc->sc_device_lock);
   1418 
   1419 	*is_bad = result;
   1420 
   1421 	return 0;
   1422 }
   1423 
   1424 int
   1425 nand_flash_markbad(device_t self, flash_off_t ofs)
   1426 {
   1427 	struct nand_softc *sc = device_private(self);
   1428 	struct nand_chip *chip = &sc->sc_chip;
   1429 
   1430 	if (ofs > chip->nc_size) {
   1431 		DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than"
   1432 			" device size (0x%jx)\n", ofs,
   1433 			(uintmax_t)chip->nc_size));
   1434 		return EINVAL;
   1435 	}
   1436 
   1437 	if (ofs % chip->nc_block_size != 0) {
   1438 		panic("offset (%ju) is not a multiple of block size (%ju)",
   1439 		    (uintmax_t)ofs, (uintmax_t)chip->nc_block_size);
   1440 	}
   1441 
   1442 	mutex_enter(&sc->sc_device_lock);
   1443 	nand_markbad(self, ofs);
   1444 	mutex_exit(&sc->sc_device_lock);
   1445 
   1446 	return 0;
   1447 }
   1448 
   1449 int
   1450 nand_flash_erase(device_t self,
   1451     struct flash_erase_instruction *ei)
   1452 {
   1453 	struct nand_softc *sc = device_private(self);
   1454 	struct nand_chip *chip = &sc->sc_chip;
   1455 	flash_off_t addr;
   1456 	int error = 0;
   1457 
   1458 	if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size)
   1459 		return EINVAL;
   1460 
   1461 	if (ei->ei_addr + ei->ei_len > chip->nc_size) {
   1462 		DPRINTF(("nand_flash_erase: erase address is over the end"
   1463 			" of the device\n"));
   1464 		return EINVAL;
   1465 	}
   1466 
   1467 	if (ei->ei_addr % chip->nc_block_size != 0) {
   1468 		aprint_error_dev(self,
   1469 		    "nand_flash_erase: ei_addr (%ju) is not"
   1470 		    " a multiple of block size (%ju)",
   1471 		    (uintmax_t)ei->ei_addr,
   1472 		    (uintmax_t)chip->nc_block_size);
   1473 		return EINVAL;
   1474 	}
   1475 
   1476 	if (ei->ei_len % chip->nc_block_size != 0) {
   1477 		aprint_error_dev(self,
   1478 		    "nand_flash_erase: ei_len (%ju) is not"
   1479 		    " a multiple of block size (%ju)",
   1480 		    (uintmax_t)ei->ei_len,
   1481 		    (uintmax_t)chip->nc_block_size);
   1482 		return EINVAL;
   1483 	}
   1484 
   1485 	mutex_enter(&sc->sc_device_lock);
   1486 	addr = ei->ei_addr;
   1487 	while (addr < ei->ei_addr + ei->ei_len) {
   1488 		if (nand_isbad(self, addr)) {
   1489 			aprint_error_dev(self, "bad block encountered\n");
   1490 			ei->ei_state = FLASH_ERASE_FAILED;
   1491 			error = EIO;
   1492 			goto out;
   1493 		}
   1494 
   1495 		error = nand_erase_block(self, addr);
   1496 		if (error) {
   1497 			ei->ei_state = FLASH_ERASE_FAILED;
   1498 			goto out;
   1499 		}
   1500 
   1501 		addr += chip->nc_block_size;
   1502 	}
   1503 	mutex_exit(&sc->sc_device_lock);
   1504 
   1505 	ei->ei_state = FLASH_ERASE_DONE;
   1506 	if (ei->ei_callback != NULL) {
   1507 		ei->ei_callback(ei);
   1508 	}
   1509 
   1510 	return 0;
   1511 out:
   1512 	mutex_exit(&sc->sc_device_lock);
   1513 
   1514 	return error;
   1515 }
   1516 
   1517 MODULE(MODULE_CLASS_DRIVER, nand, "flash");
   1518 
   1519 #ifdef _MODULE
   1520 #include "ioconf.c"
   1521 #endif
   1522 
   1523 static int
   1524 nand_modcmd(modcmd_t cmd, void *opaque)
   1525 {
   1526 	switch (cmd) {
   1527 	case MODULE_CMD_INIT:
   1528 #ifdef _MODULE
   1529 		return config_init_component(cfdriver_ioconf_nand,
   1530 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1531 #else
   1532 		return 0;
   1533 #endif
   1534 	case MODULE_CMD_FINI:
   1535 #ifdef _MODULE
   1536 		return config_fini_component(cfdriver_ioconf_nand,
   1537 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1538 #else
   1539 		return 0;
   1540 #endif
   1541 	default:
   1542 		return ENOTTY;
   1543 	}
   1544 }
   1545