nand.c revision 1.5
1 /* $NetBSD: nand.c,v 1.5 2011/03/09 12:33:59 ahoka Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.5 2011/03/09 12:33:59 ahoka Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/sysctl.h> 46 47 #include <dev/flash/flash.h> 48 #include <dev/nand/nand.h> 49 #include <dev/nand/onfi.h> 50 #include <dev/nand/hamming.h> 51 #include <dev/nand/nand_bbt.h> 52 #include <dev/nand/nand_crc.h> 53 54 #include "opt_nand.h" 55 56 int nand_match(device_t, cfdata_t, void *); 57 void nand_attach(device_t, device_t, void *); 58 int nand_detach(device_t, int); 59 bool nand_shutdown(device_t, int); 60 61 int nand_print(void *, const char *); 62 63 static int nand_search(device_t, cfdata_t, const int *, void *); 64 static void nand_address_row(device_t, size_t); 65 static void nand_address_column(device_t, size_t, size_t); 66 static void nand_readid(device_t, struct nand_chip *); 67 static void nand_read_parameter_page(device_t, struct nand_chip *); 68 static const char *nand_midtoname(int); 69 static int nand_scan_media(device_t, struct nand_chip *); 70 static bool nand_check_wp(device_t); 71 72 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 73 nand_match, nand_attach, nand_detach, NULL); 74 75 #ifdef NAND_DEBUG 76 int nanddebug = NAND_DEBUG; 77 #endif 78 79 int nand_cachesync_timeout = 1; 80 int nand_cachesync_nodenum; 81 82 const struct nand_manufacturer nand_mfrs[] = { 83 { NAND_MFR_AMD, "AMD" }, 84 { NAND_MFR_FUJITSU, "Fujitsu" }, 85 { NAND_MFR_RENESAS, "Renesas" }, 86 { NAND_MFR_STMICRO, "ST Micro" }, 87 { NAND_MFR_MICRON, "Micron" }, 88 { NAND_MFR_NATIONAL, "National" }, 89 { NAND_MFR_TOSHIBA, "Toshiba" }, 90 { NAND_MFR_HYNIX, "Hynix" }, 91 { NAND_MFR_SAMSUNG, "Samsung" }, 92 { NAND_MFR_UNKNOWN, "Unknown" } 93 }; 94 95 /* ARGSUSED */ 96 int 97 nand_match(device_t parent, cfdata_t match, void *aux) 98 { 99 /* pseudo device, always attaches */ 100 return 1; 101 } 102 103 void 104 nand_attach(device_t parent, device_t self, void *aux) 105 { 106 struct nand_softc *sc = device_private(self); 107 struct nand_attach_args *naa = aux; 108 struct nand_chip *chip = &sc->sc_chip; 109 110 sc->sc_dev = self; 111 sc->nand_dev = parent; 112 sc->nand_if = naa->naa_nand_if; 113 114 aprint_naive("\n"); 115 116 if (nand_check_wp(self)) { 117 aprint_error("NAND chip is write protected!\n"); 118 return; 119 } 120 121 if (nand_scan_media(self, chip)) { 122 return; 123 } 124 125 /* allocate cache */ 126 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 127 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 128 129 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 130 131 if (nand_sync_thread_start(self)) { 132 goto error; 133 } 134 135 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 136 aprint_error_dev(sc->sc_dev, 137 "couldn't establish power handler\n"); 138 139 #ifdef NAND_BBT 140 nand_bbt_init(self); 141 nand_bbt_scan(self); 142 #endif 143 144 /* 145 * Attach all our devices 146 */ 147 config_search_ia(nand_search, self, NULL, NULL); 148 149 return; 150 error: 151 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 152 kmem_free(chip->nc_page_cache, chip->nc_page_size); 153 mutex_destroy(&sc->sc_device_lock); 154 } 155 156 static int 157 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 158 { 159 struct nand_softc *sc = device_private(parent); 160 struct nand_chip *chip = &sc->sc_chip; 161 struct flash_interface *flash_if; 162 struct flash_attach_args faa; 163 164 flash_if = kmem_alloc(sizeof(*flash_if), KM_SLEEP); 165 166 flash_if->type = FLASH_TYPE_NAND; 167 168 flash_if->read = nand_flash_read; 169 flash_if->write = nand_flash_write; 170 flash_if->erase = nand_flash_erase; 171 flash_if->block_isbad = nand_flash_isbad; 172 flash_if->block_markbad = nand_flash_markbad; 173 174 flash_if->submit = nand_io_submit; 175 176 flash_if->erasesize = chip->nc_block_size; 177 flash_if->page_size = chip->nc_page_size; 178 flash_if->writesize = chip->nc_page_size; 179 180 flash_if->partition.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 181 182 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 183 flash_if->size = chip->nc_size - 184 flash_if->partition.part_offset; 185 flash_if->partition.part_size = flash_if->size; 186 } else { 187 flash_if->size = cf->cf_loc[FLASHBUSCF_SIZE]; 188 flash_if->partition.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 189 } 190 191 if (cf->cf_loc[FLASHBUSCF_READONLY]) 192 flash_if->partition.part_flags = FLASH_PART_READONLY; 193 else 194 flash_if->partition.part_flags = 0; 195 196 faa.flash_if = flash_if; 197 198 if (config_match(parent, cf, &faa)) { 199 config_attach(parent, cf, &faa, nand_print); 200 return 0; 201 } else { 202 kmem_free(flash_if, sizeof(*flash_if)); 203 } 204 205 return 1; 206 } 207 208 int 209 nand_detach(device_t self, int flags) 210 { 211 struct nand_softc *sc = device_private(self); 212 struct nand_chip *chip = &sc->sc_chip; 213 int ret = 0; 214 215 #ifdef NAND_BBT 216 nand_bbt_detach(self); 217 #endif 218 nand_sync_thread_stop(self); 219 220 /* free oob cache */ 221 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 222 kmem_free(chip->nc_page_cache, chip->nc_page_size); 223 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 224 225 mutex_destroy(&sc->sc_device_lock); 226 227 pmf_device_deregister(sc->sc_dev); 228 229 return ret; 230 } 231 232 int 233 nand_print(void *aux, const char *pnp) 234 { 235 if (pnp != NULL) 236 aprint_normal("nand at %s\n", pnp); 237 238 return UNCONF; 239 } 240 241 device_t 242 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 243 { 244 struct nand_attach_args arg; 245 246 KASSERT(nand_if != NULL); 247 248 arg.naa_nand_if = nand_if; 249 return config_found_ia(parent, "nandbus", &arg, nand_print); 250 } 251 252 static const char * 253 nand_midtoname(int id) 254 { 255 int i; 256 257 for (i = 0; nand_mfrs[i].id != 0; i++) { 258 if (nand_mfrs[i].id == id) 259 return nand_mfrs[i].name; 260 } 261 262 KASSERT(nand_mfrs[i].id == 0); 263 264 return nand_mfrs[i].name; 265 } 266 267 #if 0 268 /* handle quirks here */ 269 static void 270 nand_quirks(device_t self, struct nand_chip *chip) 271 { 272 /* this is an example only! */ 273 switch (chip->nc_manf_id) { 274 case NAND_MFR_SAMSUNG: 275 if (chip->nc_dev_id == 0x00) { 276 /* do something only samsung chips need */ 277 /* or */ 278 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 279 } 280 } 281 282 return; 283 } 284 #endif 285 286 static int 287 nand_read_legacy_parameters(device_t self, struct nand_chip *chip) 288 { 289 switch (chip->nc_manf_id) { 290 case NAND_MFR_MICRON: 291 return nand_read_parameters_micron(self, chip); 292 default: 293 return 1; 294 } 295 296 return 0; 297 } 298 299 /** 300 * scan media to determine the chip's properties 301 * this function resets the device 302 */ 303 static int 304 nand_scan_media(device_t self, struct nand_chip *chip) 305 { 306 struct nand_softc *sc = device_private(self); 307 struct nand_ecc *ecc; 308 uint8_t onfi_signature[4]; 309 310 nand_select(self, true); 311 nand_command(self, ONFI_RESET); 312 nand_select(self, false); 313 314 /* check if the device implements the ONFI standard */ 315 nand_select(self, true); 316 nand_command(self, ONFI_READ_ID); 317 nand_address(self, 0x20); 318 nand_read_byte(self, &onfi_signature[0]); 319 nand_read_byte(self, &onfi_signature[1]); 320 nand_read_byte(self, &onfi_signature[2]); 321 nand_read_byte(self, &onfi_signature[3]); 322 nand_select(self, false); 323 324 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 325 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 326 chip->nc_isonfi = false; 327 328 aprint_normal(": Legacy NAND Flash\n"); 329 330 nand_readid(self, chip); 331 332 if (nand_read_legacy_parameters(self, chip)) { 333 aprint_error_dev(self, 334 "can't read device parameters for legacy chip\n"); 335 return 1; 336 } 337 } else { 338 chip->nc_isonfi = true; 339 340 aprint_normal(": ONFI NAND Flash\n"); 341 342 nand_readid(self, chip); 343 nand_read_parameter_page(self, chip); 344 } 345 346 #ifdef NAND_VERBOSE 347 aprint_normal_dev(self, 348 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 349 chip->nc_manf_id, 350 nand_midtoname(chip->nc_manf_id), 351 chip->nc_dev_id); 352 #endif 353 354 aprint_normal_dev(self, 355 "page size: %zu bytes, spare size: %zu bytes, " 356 "block size: %zu bytes\n", 357 chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size); 358 359 aprint_normal_dev(self, 360 "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8 361 ", total storage size: %zu MB\n", 362 chip->nc_lun_blocks, chip->nc_num_luns, 363 chip->nc_size / 1024 / 1024); 364 365 #ifdef NAND_VERBOSE 366 aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %" 367 PRIu8 "\n", 368 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row); 369 #endif 370 371 ecc = chip->nc_ecc = &sc->nand_if->ecc; 372 373 /* 374 * calculate the place of ecc data in oob 375 * we try to be compatible with Linux here 376 */ 377 switch (chip->nc_spare_size) { 378 case 8: 379 ecc->necc_offset = 0; 380 break; 381 case 16: 382 ecc->necc_offset = 0; 383 break; 384 case 64: 385 ecc->necc_offset = 40; 386 break; 387 case 128: 388 ecc->necc_offset = 80; 389 break; 390 default: 391 panic("OOB size is unexpected"); 392 } 393 394 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 395 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 396 397 /* check if we fit in oob */ 398 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 399 panic("NAND ECC bits dont fit in OOB"); 400 } 401 402 /* TODO: mark free oob area available for file systems */ 403 404 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 405 406 /* 407 * calculate badblock marker offset in oob 408 * we try to be compatible with linux here 409 */ 410 if (chip->nc_page_size > 512) 411 chip->nc_badmarker_offs = 0; 412 else 413 chip->nc_badmarker_offs = 5; 414 415 /* Calculate page shift and mask */ 416 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 417 chip->nc_page_mask = ~(chip->nc_page_size - 1); 418 /* same for block */ 419 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 420 chip->nc_block_mask = ~(chip->nc_block_size - 1); 421 422 /* look for quirks here if needed in future */ 423 /* nand_quirks(self, chip); */ 424 425 return 0; 426 } 427 428 static void 429 nand_readid(device_t self, struct nand_chip *chip) 430 { 431 nand_select(self, true); 432 nand_command(self, ONFI_READ_ID); 433 nand_address(self, 0x00); 434 435 nand_read_byte(self, &chip->nc_manf_id); 436 nand_read_byte(self, &chip->nc_dev_id); 437 438 nand_select(self, false); 439 } 440 441 static void 442 nand_read_parameter_page(device_t self, struct nand_chip *chip) 443 { 444 struct onfi_parameter_page params; 445 uint8_t *bufp; 446 uint8_t vendor[13], model[21]; 447 uint16_t crc; 448 int i; 449 450 KASSERT(sizeof(params) == 256); 451 452 nand_select(self, true); 453 nand_command(self, ONFI_READ_PARAMETER_PAGE); 454 nand_address(self, 0x00); 455 456 nand_busy(self); 457 458 bufp = (uint8_t *)¶ms; 459 for (i = 0; i < 256; i++) { 460 nand_read_byte(self, &bufp[i]); 461 } 462 nand_select(self, false); 463 464 /* validate the parameter page with the crc */ 465 crc = nand_crc16(bufp, 254); 466 467 if (crc != params.param_integrity_crc) { 468 aprint_error_dev(self, "parameter page crc check failed\n"); 469 /* TODO: we should read the next parameter page copy */ 470 } 471 472 /* strip manufacturer and model string */ 473 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 474 for (i = 11; i > 0 && vendor[i] == ' '; i--) 475 vendor[i] = 0; 476 strlcpy(model, params.param_model, sizeof(model)); 477 for (i = 19; i > 0 && model[i] == ' '; i--) 478 model[i] = 0; 479 480 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 481 482 /* XXX TODO multiple LUNs */ 483 if (__predict_false(params.param_numluns != 1)) { 484 panic("more than one LUNs are not supported yet!\n"); 485 } 486 487 chip->nc_size = params.param_pagesize * params.param_blocksize * 488 params.param_lunsize * params.param_numluns; 489 490 chip->nc_page_size = params.param_pagesize; 491 chip->nc_block_pages = params.param_blocksize; 492 chip->nc_block_size = params.param_blocksize * params.param_pagesize; 493 chip->nc_spare_size = params.param_sparesize; 494 chip->nc_lun_blocks = params.param_lunsize; 495 chip->nc_num_luns = params.param_numluns; 496 497 /* the lower 4 bits contain the row address cycles */ 498 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 499 /* the upper 4 bits contain the column address cycles */ 500 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 501 502 if (params.param_features & ONFI_FEATURE_16BIT) 503 chip->nc_flags |= NC_BUSWIDTH_16; 504 505 if (params.param_features & ONFI_FEATURE_EXTENDED_PARAM) 506 chip->nc_flags |= NC_EXTENDED_PARAM; 507 } 508 509 /* ARGSUSED */ 510 bool 511 nand_shutdown(device_t self, int howto) 512 { 513 return true; 514 } 515 516 static void 517 nand_address_column(device_t self, size_t row, size_t column) 518 { 519 struct nand_softc *sc = device_private(self); 520 struct nand_chip *chip = &sc->sc_chip; 521 uint8_t i; 522 523 DPRINTF(("addressing row: 0x%jx column: %zu\n", 524 (uintmax_t )row, column)); 525 526 /* XXX TODO */ 527 row >>= chip->nc_page_shift; 528 529 /* Write the column (subpage) address */ 530 if (chip->nc_flags & NC_BUSWIDTH_16) 531 column >>= 1; 532 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 533 nand_address(self, column & 0xff); 534 535 /* Write the row (page) address */ 536 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 537 nand_address(self, row & 0xff); 538 } 539 540 static void 541 nand_address_row(device_t self, size_t row) 542 { 543 struct nand_softc *sc = device_private(self); 544 struct nand_chip *chip = &sc->sc_chip; 545 off_t i; 546 547 /* XXX TODO */ 548 row >>= chip->nc_page_shift; 549 550 /* Write the row (page) address */ 551 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 552 nand_address(self, row & 0xff); 553 } 554 555 static inline uint8_t 556 nand_get_status(device_t self) 557 { 558 uint8_t status; 559 560 nand_command(self, ONFI_READ_STATUS); 561 nand_busy(self); 562 nand_read_byte(self, &status); 563 564 return status; 565 } 566 567 static bool 568 nand_check_wp(device_t self) 569 { 570 if (nand_get_status(self) & 0x80) 571 return false; 572 else 573 return true; 574 } 575 576 static void 577 nand_prepare_read(device_t self, flash_addr_t row, flash_addr_t column) 578 { 579 nand_command(self, ONFI_READ); 580 nand_address_column(self, row, column); 581 nand_command(self, ONFI_READ_START); 582 583 nand_busy(self); 584 } 585 586 /* read a page with ecc correction */ 587 int 588 nand_read_page(device_t self, size_t offset, uint8_t *data) 589 { 590 struct nand_softc *sc = device_private(self); 591 struct nand_chip *chip = &sc->sc_chip; 592 size_t b, bs, e, cs; 593 uint8_t *ecc; 594 int result; 595 596 nand_prepare_read(self, offset, 0); 597 598 bs = chip->nc_ecc->necc_block_size; 599 cs = chip->nc_ecc->necc_code_size; 600 601 /* decide if we access by 8 or 16 bits */ 602 if (chip->nc_flags & NC_BUSWIDTH_16) { 603 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 604 nand_ecc_prepare(self, NAND_ECC_READ); 605 nand_read_buf_word(self, data + b, bs); 606 nand_ecc_compute(self, data + b, 607 chip->nc_ecc_cache + e); 608 } 609 } else { 610 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 611 nand_ecc_prepare(self, NAND_ECC_READ); 612 nand_read_buf_byte(self, data + b, bs); 613 nand_ecc_compute(self, data + b, 614 chip->nc_ecc_cache + e); 615 } 616 } 617 618 /* for debugging new drivers */ 619 #if 0 620 nand_dump_data("page", data, chip->nc_page_size); 621 #endif 622 623 nand_read_oob(self, offset, chip->nc_oob_cache); 624 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 625 626 /* useful for debugging new ecc drivers */ 627 #if 0 628 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 629 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 630 printf("0x"); 631 for (b = 0; b < cs; b++) { 632 printf("%.2hhx", ecc[e+b]); 633 } 634 printf(" 0x"); 635 for (b = 0; b < cs; b++) { 636 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 637 } 638 printf("\n"); 639 } 640 printf("--------------\n"); 641 #endif 642 643 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 644 result = nand_ecc_correct(self, data + b, ecc + e, 645 chip->nc_ecc_cache + e); 646 647 switch (result) { 648 case NAND_ECC_OK: 649 break; 650 case NAND_ECC_CORRECTED: 651 aprint_error_dev(self, 652 "data corrected with ECC at page offset 0x%jx " 653 "block %zu\n", (uintmax_t)offset, b); 654 break; 655 case NAND_ECC_TWOBIT: 656 aprint_error_dev(self, 657 "uncorrectable ECC error at page offset 0x%jx " 658 "block %zu\n", (uintmax_t)offset, b); 659 return EIO; 660 break; 661 case NAND_ECC_INVALID: 662 aprint_error_dev(self, 663 "invalid ECC in oob at page offset 0x%jx " 664 "block %zu\n", (uintmax_t)offset, b); 665 return EIO; 666 break; 667 default: 668 panic("invalid ECC correction errno"); 669 } 670 } 671 672 return 0; 673 } 674 675 static int 676 nand_program_page(device_t self, size_t page, const uint8_t *data) 677 { 678 struct nand_softc *sc = device_private(self); 679 struct nand_chip *chip = &sc->sc_chip; 680 size_t bs, cs, e, b; 681 uint8_t status; 682 uint8_t *ecc; 683 684 nand_command(self, ONFI_PAGE_PROGRAM); 685 nand_address_column(self, page, 0); 686 687 nand_busy(self); 688 689 bs = chip->nc_ecc->necc_block_size; 690 cs = chip->nc_ecc->necc_code_size; 691 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 692 693 /* XXX code duplication */ 694 /* decide if we access by 8 or 16 bits */ 695 if (chip->nc_flags & NC_BUSWIDTH_16) { 696 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 697 nand_ecc_prepare(self, NAND_ECC_WRITE); 698 nand_write_buf_word(self, data + b, bs); 699 nand_ecc_compute(self, data + b, ecc + e); 700 } 701 /* write oob with ecc correction code */ 702 nand_write_buf_word(self, chip->nc_oob_cache, 703 chip->nc_spare_size); 704 } else { 705 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 706 nand_ecc_prepare(self, NAND_ECC_WRITE); 707 nand_write_buf_byte(self, data + b, bs); 708 nand_ecc_compute(self, data + b, ecc + e); 709 } 710 /* write oob with ecc correction code */ 711 nand_write_buf_byte(self, chip->nc_oob_cache, 712 chip->nc_spare_size); 713 } 714 715 nand_command(self, ONFI_PAGE_PROGRAM_START); 716 717 nand_busy(self); 718 719 /* for debugging ecc */ 720 #if 0 721 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 722 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 723 printf("0x"); 724 for (b = 0; b < cs; b++) { 725 printf("%.2hhx", ecc[e+b]); 726 } 727 printf("\n"); 728 } 729 printf("--------------\n"); 730 #endif 731 732 status = nand_get_status(self); 733 KASSERT(status & ONFI_STATUS_RDY); 734 if (status & ONFI_STATUS_FAIL) { 735 aprint_error_dev(self, "page program failed!\n"); 736 return EIO; 737 } 738 739 return 0; 740 } 741 742 int 743 nand_read_oob(device_t self, size_t page, void *oob) 744 { 745 struct nand_softc *sc = device_private(self); 746 struct nand_chip *chip = &sc->sc_chip; 747 748 nand_prepare_read(self, page, chip->nc_page_size); 749 750 if (chip->nc_flags & NC_BUSWIDTH_16) 751 nand_read_buf_word(self, oob, chip->nc_spare_size); 752 else 753 nand_read_buf_byte(self, oob, chip->nc_spare_size); 754 755 /* for debugging drivers */ 756 #if 0 757 nand_dump_data("oob", oob, chip->nc_spare_size); 758 #endif 759 760 return 0; 761 } 762 763 static int 764 nand_write_oob(device_t self, size_t offset, const void *oob) 765 { 766 struct nand_softc *sc = device_private(self); 767 struct nand_chip *chip = &sc->sc_chip; 768 uint8_t status; 769 770 nand_command(self, ONFI_PAGE_PROGRAM); 771 nand_address_column(self, offset, chip->nc_page_size); 772 nand_command(self, ONFI_PAGE_PROGRAM_START); 773 774 nand_busy(self); 775 776 if (chip->nc_flags & NC_BUSWIDTH_16) 777 nand_write_buf_word(self, oob, chip->nc_spare_size); 778 else 779 nand_write_buf_byte(self, oob, chip->nc_spare_size); 780 781 status = nand_get_status(self); 782 KASSERT(status & ONFI_STATUS_RDY); 783 if (status & ONFI_STATUS_FAIL) 784 return EIO; 785 else 786 return 0; 787 } 788 789 void 790 nand_markbad(device_t self, size_t offset) 791 { 792 struct nand_softc *sc = device_private(self); 793 struct nand_chip *chip = &sc->sc_chip; 794 flash_addr_t blockoffset, marker; 795 #ifdef NAND_BBT 796 flash_addr_t block; 797 798 block = offset / chip->nc_block_size; 799 800 nand_bbt_block_markbad(self, block); 801 #endif 802 blockoffset = offset & chip->nc_block_mask; 803 marker = chip->nc_badmarker_offs & ~0x01; 804 805 /* check if it is already marked bad */ 806 if (nand_isbad(self, blockoffset)) 807 return; 808 809 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 810 811 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 812 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 813 814 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 815 } 816 817 bool 818 nand_isfactorybad(device_t self, flash_addr_t offset) 819 { 820 struct nand_softc *sc = device_private(self); 821 struct nand_chip *chip = &sc->sc_chip; 822 flash_addr_t block, first_page, last_page, page; 823 int i; 824 825 /* Check for factory bad blocks first 826 * Factory bad blocks are marked in the first or last 827 * page of the blocks, see: ONFI 2.2, 3.2.2. 828 */ 829 block = offset / chip->nc_block_size; 830 first_page = block * chip->nc_block_size; 831 last_page = (block + 1) * chip->nc_block_size 832 - chip->nc_page_size; 833 834 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 835 /* address OOB */ 836 nand_prepare_read(self, page, chip->nc_page_size); 837 838 if (chip->nc_flags & NC_BUSWIDTH_16) { 839 uint16_t word; 840 nand_read_word(self, &word); 841 if (word == 0x0000) 842 return true; 843 } else { 844 uint8_t byte; 845 nand_read_byte(self, &byte); 846 if (byte == 0x00) 847 return true; 848 } 849 } 850 851 return false; 852 } 853 854 bool 855 nand_iswornoutbad(device_t self, flash_addr_t offset) 856 { 857 struct nand_softc *sc = device_private(self); 858 struct nand_chip *chip = &sc->sc_chip; 859 flash_addr_t block; 860 861 /* we inspect the first page of the block */ 862 block = offset & chip->nc_block_mask; 863 864 /* Linux/u-boot compatible badblock handling */ 865 if (chip->nc_flags & NC_BUSWIDTH_16) { 866 uint16_t word, mark; 867 868 nand_prepare_read(self, block, 869 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 870 871 nand_read_word(self, &word); 872 mark = htole16(word); 873 if (chip->nc_badmarker_offs & 0x01) 874 mark >>= 8; 875 if ((mark & 0xff) != 0xff) 876 return true; 877 } else { 878 uint8_t byte; 879 880 nand_prepare_read(self, block, 881 chip->nc_page_size + chip->nc_badmarker_offs); 882 883 nand_read_byte(self, &byte); 884 if (byte != 0xff) 885 return true; 886 } 887 888 return false; 889 } 890 891 bool 892 nand_isbad(device_t self, flash_addr_t offset) 893 { 894 #ifdef NAND_BBT 895 struct nand_softc *sc = device_private(self); 896 struct nand_chip *chip = &sc->sc_chip; 897 flash_addr_t block; 898 899 block = offset / chip->nc_block_size; 900 901 return nand_bbt_block_isbad(self, block); 902 #else 903 /* ONFI host requirement */ 904 if (nand_isfactorybad(self, offset)) 905 return true; 906 907 /* Look for Linux/U-Boot compatible bad marker */ 908 if (nand_iswornoutbad(self, offset)) 909 return true; 910 911 return false; 912 #endif 913 } 914 915 int 916 nand_erase_block(device_t self, size_t offset) 917 { 918 uint8_t status; 919 920 /* xxx calculate first page of block for address? */ 921 922 nand_command(self, ONFI_BLOCK_ERASE); 923 nand_address_row(self, offset); 924 nand_command(self, ONFI_BLOCK_ERASE_START); 925 926 nand_busy(self); 927 928 status = nand_get_status(self); 929 KASSERT(status & ONFI_STATUS_RDY); 930 if (status & ONFI_STATUS_FAIL) { 931 aprint_error_dev(self, "block erase failed!\n"); 932 nand_markbad(self, offset); 933 return EIO; 934 } else { 935 return 0; 936 } 937 } 938 939 /* default functions for driver development */ 940 941 /* default ECC using hamming code of 256 byte chunks */ 942 int 943 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 944 { 945 hamming_compute_256(data, code); 946 947 return 0; 948 } 949 950 int 951 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 952 const uint8_t *compcode) 953 { 954 return hamming_correct_256(data, origcode, compcode); 955 } 956 957 void 958 nand_default_select(device_t self, bool enable) 959 { 960 /* do nothing */ 961 return; 962 } 963 964 /* implementation of the block device API */ 965 966 /* 967 * handle (page) unaligned write to nand 968 */ 969 static int 970 nand_flash_write_unaligned(device_t self, off_t offset, size_t len, 971 size_t *retlen, const uint8_t *buf) 972 { 973 struct nand_softc *sc = device_private(self); 974 struct nand_chip *chip = &sc->sc_chip; 975 flash_addr_t first, last, firstoff; 976 const uint8_t *bufp; 977 flash_addr_t addr; 978 size_t left, count; 979 int error, i; 980 981 first = offset & chip->nc_page_mask; 982 firstoff = offset & ~chip->nc_page_mask; 983 /* XXX check if this should be len - 1 */ 984 last = (offset + len) & chip->nc_page_mask; 985 count = last - first + 1; 986 987 addr = first; 988 *retlen = 0; 989 990 if (count == 1) { 991 if (nand_isbad(self, addr)) { 992 aprint_error_dev(self, 993 "nand_flash_write_unaligned: " 994 "bad block encountered\n"); 995 return EIO; 996 } 997 998 error = nand_read_page(self, addr, chip->nc_page_cache); 999 if (error) 1000 return error; 1001 1002 memcpy(chip->nc_page_cache + firstoff, buf, len); 1003 1004 error = nand_program_page(self, addr, chip->nc_page_cache); 1005 if (error) 1006 return error; 1007 1008 *retlen = len; 1009 return 0; 1010 } 1011 1012 bufp = buf; 1013 left = len; 1014 1015 for (i = 0; i < count && left != 0; i++) { 1016 if (nand_isbad(self, addr)) { 1017 aprint_error_dev(self, 1018 "nand_flash_write_unaligned: " 1019 "bad block encountered\n"); 1020 return EIO; 1021 } 1022 1023 if (i == 0) { 1024 error = nand_read_page(self, 1025 addr, chip->nc_page_cache); 1026 if (error) 1027 return error; 1028 1029 memcpy(chip->nc_page_cache + firstoff, 1030 bufp, chip->nc_page_size - firstoff); 1031 1032 printf("program page: %s: %d\n", __FILE__, __LINE__); 1033 error = nand_program_page(self, 1034 addr, chip->nc_page_cache); 1035 if (error) 1036 return error; 1037 1038 bufp += chip->nc_page_size - firstoff; 1039 left -= chip->nc_page_size - firstoff; 1040 *retlen += chip->nc_page_size - firstoff; 1041 1042 } else if (i == count - 1) { 1043 error = nand_read_page(self, 1044 addr, chip->nc_page_cache); 1045 if (error) 1046 return error; 1047 1048 memcpy(chip->nc_page_cache, bufp, left); 1049 1050 error = nand_program_page(self, 1051 addr, chip->nc_page_cache); 1052 if (error) 1053 return error; 1054 1055 *retlen += left; 1056 KASSERT(left < chip->nc_page_size); 1057 1058 } else { 1059 /* XXX debug */ 1060 if (left > chip->nc_page_size) { 1061 printf("left: %zu, i: %d, count: %zu\n", 1062 (size_t )left, i, count); 1063 } 1064 KASSERT(left > chip->nc_page_size); 1065 1066 error = nand_program_page(self, addr, bufp); 1067 if (error) 1068 return error; 1069 1070 bufp += chip->nc_page_size; 1071 left -= chip->nc_page_size; 1072 *retlen += chip->nc_page_size; 1073 } 1074 1075 addr += chip->nc_page_size; 1076 } 1077 1078 KASSERT(*retlen == len); 1079 1080 return 0; 1081 } 1082 1083 int 1084 nand_flash_write(device_t self, off_t offset, size_t len, size_t *retlen, 1085 const uint8_t *buf) 1086 { 1087 struct nand_softc *sc = device_private(self); 1088 struct nand_chip *chip = &sc->sc_chip; 1089 const uint8_t *bufp; 1090 size_t pages, page; 1091 daddr_t addr; 1092 int error = 0; 1093 1094 if ((offset + len) > chip->nc_size) { 1095 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1096 " is over device size (0x%jx)\n", 1097 (uintmax_t)offset, (uintmax_t)len, 1098 (uintmax_t)chip->nc_size)); 1099 return EINVAL; 1100 } 1101 1102 if (len % chip->nc_page_size != 0 || 1103 offset % chip->nc_page_size != 0) { 1104 return nand_flash_write_unaligned(self, 1105 offset, len, retlen, buf); 1106 } 1107 1108 pages = len / chip->nc_page_size; 1109 KASSERT(pages != 0); 1110 *retlen = 0; 1111 1112 addr = offset; 1113 bufp = buf; 1114 1115 mutex_enter(&sc->sc_device_lock); 1116 for (page = 0; page < pages; page++) { 1117 /* do we need this check here? */ 1118 if (nand_isbad(self, addr)) { 1119 aprint_error_dev(self, 1120 "nand_flash_write: bad block encountered\n"); 1121 1122 error = EIO; 1123 goto out; 1124 } 1125 1126 error = nand_program_page(self, addr, bufp); 1127 if (error) 1128 goto out; 1129 1130 addr += chip->nc_page_size; 1131 bufp += chip->nc_page_size; 1132 *retlen += chip->nc_page_size; 1133 } 1134 out: 1135 mutex_exit(&sc->sc_device_lock); 1136 DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len)); 1137 1138 return error; 1139 } 1140 1141 /* 1142 * handle (page) unaligned read from nand 1143 */ 1144 static int 1145 nand_flash_read_unaligned(device_t self, size_t offset, 1146 size_t len, size_t *retlen, uint8_t *buf) 1147 { 1148 struct nand_softc *sc = device_private(self); 1149 struct nand_chip *chip = &sc->sc_chip; 1150 daddr_t first, last, count, firstoff; 1151 uint8_t *bufp; 1152 daddr_t addr; 1153 size_t left; 1154 int error = 0, i; 1155 1156 first = offset & chip->nc_page_mask; 1157 firstoff = offset & ~chip->nc_page_mask; 1158 last = (offset + len) & chip->nc_page_mask; 1159 count = (last - first) / chip->nc_page_size + 1; 1160 1161 addr = first; 1162 bufp = buf; 1163 left = len; 1164 *retlen = 0; 1165 1166 mutex_enter(&sc->sc_device_lock); 1167 if (count == 1) { 1168 error = nand_read_page(self, addr, chip->nc_page_cache); 1169 if (error) 1170 goto out; 1171 1172 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1173 1174 *retlen = len; 1175 goto out; 1176 } 1177 1178 for (i = 0; i < count && left != 0; i++) { 1179 error = nand_read_page(self, addr, chip->nc_page_cache); 1180 if (error) 1181 goto out; 1182 1183 if (i == 0) { 1184 memcpy(bufp, chip->nc_page_cache + firstoff, 1185 chip->nc_page_size - firstoff); 1186 1187 bufp += chip->nc_page_size - firstoff; 1188 left -= chip->nc_page_size - firstoff; 1189 *retlen += chip->nc_page_size - firstoff; 1190 1191 } else if (i == count - 1) { 1192 memcpy(bufp, chip->nc_page_cache, left); 1193 *retlen += left; 1194 KASSERT(left < chip->nc_page_size); 1195 1196 } else { 1197 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1198 1199 bufp += chip->nc_page_size; 1200 left -= chip->nc_page_size; 1201 *retlen += chip->nc_page_size; 1202 } 1203 1204 addr += chip->nc_page_size; 1205 } 1206 1207 KASSERT(*retlen == len); 1208 1209 out: 1210 mutex_exit(&sc->sc_device_lock); 1211 1212 return error; 1213 } 1214 1215 int 1216 nand_flash_read(device_t self, off_t offset, size_t len, size_t *retlen, 1217 uint8_t *buf) 1218 { 1219 struct nand_softc *sc = device_private(self); 1220 struct nand_chip *chip = &sc->sc_chip; 1221 uint8_t *bufp; 1222 size_t addr; 1223 size_t i, pages; 1224 int error = 0; 1225 1226 *retlen = 0; 1227 1228 DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n", 1229 (uintmax_t)offset, len)); 1230 1231 if (__predict_false((offset + len) > chip->nc_size)) { 1232 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu)," 1233 " is over device size (%ju)\n", (uintmax_t)offset, 1234 len, (uintmax_t)chip->nc_size)); 1235 return EINVAL; 1236 } 1237 1238 /* Handle unaligned access, shouldnt be needed when using the 1239 * block device, as strategy handles it, so only low level 1240 * accesses will use this path 1241 */ 1242 /* XXX^2 */ 1243 #if 0 1244 if (len < chip->nc_page_size) 1245 panic("TODO page size is larger than read size"); 1246 #endif 1247 1248 1249 if (len % chip->nc_page_size != 0 || 1250 offset % chip->nc_page_size != 0) { 1251 return nand_flash_read_unaligned(self, 1252 offset, len, retlen, buf); 1253 } 1254 1255 bufp = buf; 1256 addr = offset; 1257 pages = len / chip->nc_page_size; 1258 1259 mutex_enter(&sc->sc_device_lock); 1260 for (i = 0; i < pages; i++) { 1261 /* XXX do we need this check here? */ 1262 if (nand_isbad(self, addr)) { 1263 aprint_error_dev(self, "bad block encountered\n"); 1264 error = EIO; 1265 goto out; 1266 } 1267 error = nand_read_page(self, addr, bufp); 1268 if (error) 1269 goto out; 1270 1271 bufp += chip->nc_page_size; 1272 addr += chip->nc_page_size; 1273 *retlen += chip->nc_page_size; 1274 } 1275 1276 out: 1277 mutex_exit(&sc->sc_device_lock); 1278 1279 return error; 1280 } 1281 1282 int 1283 nand_flash_isbad(device_t self, uint64_t ofs) 1284 { 1285 struct nand_softc *sc = device_private(self); 1286 struct nand_chip *chip = &sc->sc_chip; 1287 bool result; 1288 1289 if (ofs > chip->nc_size) { 1290 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1291 " device size (0x%jx)\n", (uintmax_t)ofs, 1292 (uintmax_t)chip->nc_size)); 1293 return EINVAL; 1294 } 1295 1296 if (ofs % chip->nc_block_size != 0) { 1297 panic("offset (0x%jx) is not the multiple of block size (%ju)", 1298 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1299 } 1300 1301 mutex_enter(&sc->sc_device_lock); 1302 result = nand_isbad(self, ofs); 1303 mutex_exit(&sc->sc_device_lock); 1304 1305 if (result) 1306 return 1; 1307 else 1308 return 0; 1309 } 1310 1311 int 1312 nand_flash_markbad(device_t self, uint64_t ofs) 1313 { 1314 struct nand_softc *sc = device_private(self); 1315 struct nand_chip *chip = &sc->sc_chip; 1316 1317 if (ofs > chip->nc_size) { 1318 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1319 " device size (0x%jx)\n", ofs, 1320 (uintmax_t)chip->nc_size)); 1321 return EINVAL; 1322 } 1323 1324 if (ofs % chip->nc_block_size != 0) { 1325 panic("offset (%ju) is not the multiple of block size (%ju)", 1326 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1327 } 1328 1329 mutex_enter(&sc->sc_device_lock); 1330 nand_markbad(self, ofs); 1331 mutex_exit(&sc->sc_device_lock); 1332 1333 return 0; 1334 } 1335 1336 int 1337 nand_flash_erase(device_t self, 1338 struct flash_erase_instruction *ei) 1339 { 1340 struct nand_softc *sc = device_private(self); 1341 struct nand_chip *chip = &sc->sc_chip; 1342 flash_addr_t addr; 1343 int error; 1344 1345 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1346 return EINVAL; 1347 1348 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1349 DPRINTF(("nand_flash_erase: erase address is over the end" 1350 " of the device\n")); 1351 return EINVAL; 1352 } 1353 1354 if (ei->ei_addr % chip->nc_block_size != 0) { 1355 aprint_error_dev(self, 1356 "nand_flash_erase: ei_addr (%ju) is not" 1357 "the multiple of block size (%ju)", 1358 (uintmax_t)ei->ei_addr, 1359 (uintmax_t)chip->nc_block_size); 1360 return EINVAL; 1361 } 1362 1363 if (ei->ei_len % chip->nc_block_size != 0) { 1364 aprint_error_dev(self, 1365 "nand_flash_erase: ei_len (%ju) is not" 1366 "the multiple of block size (%ju)", 1367 (uintmax_t)ei->ei_addr, 1368 (uintmax_t)chip->nc_block_size); 1369 return EINVAL; 1370 } 1371 1372 mutex_enter(&sc->sc_device_lock); 1373 addr = ei->ei_addr; 1374 while (addr < ei->ei_addr + ei->ei_len) { 1375 if (nand_isbad(self, addr)) { 1376 mutex_exit(&sc->sc_device_lock); 1377 aprint_error_dev(self, "bad block encountered\n"); 1378 ei->ei_state = FLASH_ERASE_FAILED; 1379 return EIO; 1380 } 1381 1382 error = nand_erase_block(self, addr); 1383 if (error) { 1384 mutex_exit(&sc->sc_device_lock); 1385 ei->ei_state = FLASH_ERASE_FAILED; 1386 return error; 1387 } 1388 1389 addr += chip->nc_block_size; 1390 } 1391 mutex_exit(&sc->sc_device_lock); 1392 1393 ei->ei_state = FLASH_ERASE_DONE; 1394 if (ei->ei_callback != NULL) 1395 ei->ei_callback(ei); 1396 1397 return 0; 1398 } 1399 1400 static int 1401 sysctl_nand_verify(SYSCTLFN_ARGS) 1402 { 1403 int error, t; 1404 struct sysctlnode node; 1405 1406 node = *rnode; 1407 t = *(int *)rnode->sysctl_data; 1408 node.sysctl_data = &t; 1409 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 1410 if (error || newp == NULL) 1411 return error; 1412 1413 if (node.sysctl_num == nand_cachesync_nodenum) { 1414 if (t <= 0 || t > 60) 1415 return EINVAL; 1416 } else { 1417 return EINVAL; 1418 } 1419 1420 *(int *)rnode->sysctl_data = t; 1421 1422 return 0; 1423 } 1424 1425 SYSCTL_SETUP(sysctl_nand, "sysctl nand subtree setup") 1426 { 1427 int rc, nand_root_num; 1428 const struct sysctlnode *node; 1429 1430 if ((rc = sysctl_createv(clog, 0, NULL, NULL, 1431 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 1432 NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) { 1433 goto error; 1434 } 1435 1436 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1437 CTLFLAG_PERMANENT, CTLTYPE_NODE, "nand", 1438 SYSCTL_DESCR("NAND driver controls"), 1439 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) { 1440 goto error; 1441 } 1442 1443 nand_root_num = node->sysctl_num; 1444 1445 if ((rc = sysctl_createv(clog, 0, NULL, &node, 1446 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 1447 CTLTYPE_INT, "cache_sync_timeout", 1448 SYSCTL_DESCR("NAND write cache sync timeout in seconds"), 1449 sysctl_nand_verify, 0, &nand_cachesync_timeout, 1450 0, CTL_HW, nand_root_num, CTL_CREATE, 1451 CTL_EOL)) != 0) { 1452 goto error; 1453 } 1454 1455 nand_cachesync_nodenum = node->sysctl_num; 1456 1457 return; 1458 1459 error: 1460 aprint_error("%s: sysctl_createv failed (rc = %d)\n", __func__, rc); 1461 } 1462 1463 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1464 1465 #ifdef _MODULE 1466 #include "ioconf.c" 1467 #endif 1468 1469 static int 1470 nand_modcmd(modcmd_t cmd, void *opaque) 1471 { 1472 switch (cmd) { 1473 case MODULE_CMD_INIT: 1474 #ifdef _MODULE 1475 return config_init_component(cfdriver_ioconf_nand, 1476 cfattach_ioconf_nand, cfdata_ioconf_nand); 1477 #else 1478 return 0; 1479 #endif 1480 case MODULE_CMD_FINI: 1481 #ifdef _MODULE 1482 return config_fini_component(cfdriver_ioconf_nand, 1483 cfattach_ioconf_nand, cfdata_ioconf_nand); 1484 #else 1485 return 0; 1486 #endif 1487 default: 1488 return ENOTTY; 1489 } 1490 } 1491
Indexes created Tue Sep 23 07:09:52 GMT 2025