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nand.c revision 1.8
      1 /*	$NetBSD: nand.c,v 1.8 2011/04/10 12:48:09 ahoka Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2010 Department of Software Engineering,
      5  *		      University of Szeged, Hungary
      6  * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org>
      7  * All rights reserved.
      8  *
      9  * This code is derived from software contributed to The NetBSD Foundation
     10  * by the Department of Software Engineering, University of Szeged, Hungary
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     28  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  */
     33 
     34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.8 2011/04/10 12:48:09 ahoka Exp $");
     38 
     39 #include "locators.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/types.h>
     43 #include <sys/device.h>
     44 #include <sys/kmem.h>
     45 #include <sys/sysctl.h>
     46 
     47 #include <dev/flash/flash.h>
     48 #include <dev/nand/nand.h>
     49 #include <dev/nand/onfi.h>
     50 #include <dev/nand/hamming.h>
     51 #include <dev/nand/nand_bbt.h>
     52 #include <dev/nand/nand_crc.h>
     53 
     54 #include "opt_nand.h"
     55 
     56 int nand_match(device_t, cfdata_t, void *);
     57 void nand_attach(device_t, device_t, void *);
     58 int nand_detach(device_t, int);
     59 bool nand_shutdown(device_t, int);
     60 
     61 int nand_print(void *, const char *);
     62 
     63 static int nand_search(device_t, cfdata_t, const int *, void *);
     64 static void nand_address_row(device_t, size_t);
     65 static void nand_address_column(device_t, size_t, size_t);
     66 static int nand_fill_chip_structure(device_t, struct nand_chip *);
     67 static int nand_scan_media(device_t, struct nand_chip *);
     68 static bool nand_check_wp(device_t);
     69 
     70 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc),
     71     nand_match, nand_attach, nand_detach, NULL);
     72 
     73 #ifdef NAND_DEBUG
     74 int	nanddebug = NAND_DEBUG;
     75 #endif
     76 
     77 int nand_cachesync_timeout = 1;
     78 int nand_cachesync_nodenum;
     79 
     80 #ifdef NAND_VERBOSE
     81 const struct nand_manufacturer nand_mfrs[] = {
     82 	{ NAND_MFR_AMD,		"AMD" },
     83 	{ NAND_MFR_FUJITSU,	"Fujitsu" },
     84 	{ NAND_MFR_RENESAS,	"Renesas" },
     85 	{ NAND_MFR_STMICRO,	"ST Micro" },
     86 	{ NAND_MFR_MICRON,	"Micron" },
     87 	{ NAND_MFR_NATIONAL,	"National" },
     88 	{ NAND_MFR_TOSHIBA,	"Toshiba" },
     89 	{ NAND_MFR_HYNIX,	"Hynix" },
     90 	{ NAND_MFR_SAMSUNG,	"Samsung" },
     91 	{ NAND_MFR_UNKNOWN,	"Unknown" }
     92 };
     93 
     94 static const char *
     95 nand_midtoname(int id)
     96 {
     97 	int i;
     98 
     99 	for (i = 0; nand_mfrs[i].id != 0; i++) {
    100 		if (nand_mfrs[i].id == id)
    101 			return nand_mfrs[i].name;
    102 	}
    103 
    104 	KASSERT(nand_mfrs[i].id == 0);
    105 
    106 	return nand_mfrs[i].name;
    107 }
    108 #endif
    109 
    110 /* ARGSUSED */
    111 int
    112 nand_match(device_t parent, cfdata_t match, void *aux)
    113 {
    114 	/* pseudo device, always attaches */
    115 	return 1;
    116 }
    117 
    118 void
    119 nand_attach(device_t parent, device_t self, void *aux)
    120 {
    121 	struct nand_softc *sc = device_private(self);
    122 	struct nand_attach_args *naa = aux;
    123 	struct nand_chip *chip = &sc->sc_chip;
    124 
    125 	sc->sc_dev = self;
    126 	sc->controller_dev = parent;
    127 	sc->nand_if = naa->naa_nand_if;
    128 
    129 	aprint_naive("\n");
    130 
    131 	if (nand_check_wp(self)) {
    132 		aprint_error("NAND chip is write protected!\n");
    133 		return;
    134 	}
    135 
    136 	if (nand_scan_media(self, chip)) {
    137 		return;
    138 	}
    139 
    140 	/* allocate cache */
    141 	chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP);
    142 	chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP);
    143 
    144 	mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE);
    145 
    146 	if (nand_sync_thread_start(self)) {
    147 		goto error;
    148 	}
    149 
    150 	if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown))
    151 		aprint_error_dev(sc->sc_dev,
    152 		    "couldn't establish power handler\n");
    153 
    154 #ifdef NAND_BBT
    155 	nand_bbt_init(self);
    156 	nand_bbt_scan(self);
    157 #endif
    158 
    159 	/*
    160 	 * Attach all our devices
    161 	 */
    162 	config_search_ia(nand_search, self, NULL, NULL);
    163 
    164 	return;
    165 error:
    166 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    167 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    168 	mutex_destroy(&sc->sc_device_lock);
    169 }
    170 
    171 static int
    172 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    173 {
    174 	struct nand_softc *sc = device_private(parent);
    175 	struct nand_chip *chip = &sc->sc_chip;
    176 	struct flash_interface *flash_if;
    177 	struct flash_attach_args faa;
    178 
    179 	flash_if = kmem_alloc(sizeof(*flash_if), KM_SLEEP);
    180 
    181 	flash_if->type = FLASH_TYPE_NAND;
    182 
    183 	flash_if->read = nand_flash_read;
    184 	flash_if->write = nand_flash_write;
    185 	flash_if->erase = nand_flash_erase;
    186 	flash_if->block_isbad = nand_flash_isbad;
    187 	flash_if->block_markbad = nand_flash_markbad;
    188 
    189 	flash_if->submit = nand_io_submit;
    190 
    191 	flash_if->erasesize = chip->nc_block_size;
    192 	flash_if->page_size = chip->nc_page_size;
    193 	flash_if->writesize = chip->nc_page_size;
    194 
    195 	flash_if->partition.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET];
    196 
    197 	if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) {
    198 		flash_if->size = chip->nc_size -
    199 		    flash_if->partition.part_offset;
    200 		flash_if->partition.part_size = flash_if->size;
    201 	} else {
    202 		flash_if->size = cf->cf_loc[FLASHBUSCF_SIZE];
    203 		flash_if->partition.part_size = cf->cf_loc[FLASHBUSCF_SIZE];
    204 	}
    205 
    206 	if (cf->cf_loc[FLASHBUSCF_READONLY])
    207 		flash_if->partition.part_flags = FLASH_PART_READONLY;
    208 	else
    209 		flash_if->partition.part_flags = 0;
    210 
    211 	faa.flash_if = flash_if;
    212 
    213 	if (config_match(parent, cf, &faa)) {
    214 		config_attach(parent, cf, &faa, nand_print);
    215 		return 0;
    216 	} else {
    217 		kmem_free(flash_if, sizeof(*flash_if));
    218 	}
    219 
    220 	return 1;
    221 }
    222 
    223 int
    224 nand_detach(device_t self, int flags)
    225 {
    226 	struct nand_softc *sc = device_private(self);
    227 	struct nand_chip *chip = &sc->sc_chip;
    228 	int ret = 0;
    229 
    230 #ifdef NAND_BBT
    231 	nand_bbt_detach(self);
    232 #endif
    233 	nand_sync_thread_stop(self);
    234 
    235 	/* free oob cache */
    236 	kmem_free(chip->nc_oob_cache, chip->nc_spare_size);
    237 	kmem_free(chip->nc_page_cache, chip->nc_page_size);
    238 	kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size);
    239 
    240 	mutex_destroy(&sc->sc_device_lock);
    241 
    242 	pmf_device_deregister(sc->sc_dev);
    243 
    244 	return ret;
    245 }
    246 
    247 int
    248 nand_print(void *aux, const char *pnp)
    249 {
    250 	if (pnp != NULL)
    251 		aprint_normal("nand at %s\n", pnp);
    252 
    253 	return UNCONF;
    254 }
    255 
    256 /* ask for a nand driver to attach to the controller */
    257 device_t
    258 nand_attach_mi(struct nand_interface *nand_if, device_t parent)
    259 {
    260 	struct nand_attach_args arg;
    261 
    262 	KASSERT(nand_if != NULL);
    263 
    264 	/* fill the defaults if we have null pointers */
    265 	if (nand_if->program_page == NULL) {
    266 		nand_if->program_page = &nand_default_program_page;
    267 	}
    268 
    269 	if (nand_if->read_page == NULL) {
    270 		nand_if->read_page = &nand_default_read_page;
    271 	}
    272 
    273 	arg.naa_nand_if = nand_if;
    274 	return config_found_ia(parent, "nandbus", &arg, nand_print);
    275 }
    276 
    277 /* default everything to reasonable values, to ease future api changes */
    278 void
    279 nand_init_interface(struct nand_interface *interface)
    280 {
    281 	interface->select = &nand_default_select;
    282 	interface->command = NULL;
    283 	interface->address = NULL;
    284 	interface->read_buf_byte = NULL;
    285 	interface->read_buf_word = NULL;
    286 	interface->read_byte = NULL;
    287 	interface->read_word = NULL;
    288 	interface->write_buf_byte = NULL;
    289 	interface->write_buf_word = NULL;
    290 	interface->write_byte = NULL;
    291 	interface->write_word = NULL;
    292 	interface->busy = NULL;
    293 
    294 	/*-
    295 	 * most drivers dont want to change this, but some implement
    296 	 * read/program in one step
    297 	 */
    298 	interface->program_page = &nand_default_program_page;
    299 	interface->read_page = &nand_default_read_page;
    300 
    301 	/* default to soft ecc, that should work everywhere */
    302 	interface->ecc_compute = &nand_default_ecc_compute;
    303 	interface->ecc_correct = &nand_default_ecc_correct;
    304 	interface->ecc_prepare = NULL;
    305 	interface->ecc.necc_code_size = 3;
    306 	interface->ecc.necc_block_size = 256;
    307 	interface->ecc.necc_type = NAND_ECC_TYPE_SW;
    308 }
    309 
    310 #if 0
    311 /* handle quirks here */
    312 static void
    313 nand_quirks(device_t self, struct nand_chip *chip)
    314 {
    315 	/* this is an example only! */
    316 	switch (chip->nc_manf_id) {
    317 	case NAND_MFR_SAMSUNG:
    318 		if (chip->nc_dev_id == 0x00) {
    319 			/* do something only samsung chips need */
    320 			/* or */
    321 			/* chip->nc_quirks |= NC_QUIRK_NO_READ_START */
    322 		}
    323 	}
    324 
    325 	return;
    326 }
    327 #endif
    328 
    329 static int
    330 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip)
    331 {
    332 	switch (chip->nc_manf_id) {
    333 	case NAND_MFR_MICRON:
    334 		return nand_read_parameters_micron(self, chip);
    335 	default:
    336 		return 1;
    337 	}
    338 
    339 	return 0;
    340 }
    341 
    342 /**
    343  * scan media to determine the chip's properties
    344  * this function resets the device
    345  */
    346 static int
    347 nand_scan_media(device_t self, struct nand_chip *chip)
    348 {
    349 	struct nand_softc *sc = device_private(self);
    350 	struct nand_ecc *ecc;
    351 	uint8_t onfi_signature[4];
    352 
    353 	nand_select(self, true);
    354 	nand_command(self, ONFI_RESET);
    355 	nand_select(self, false);
    356 
    357 	/* check if the device implements the ONFI standard */
    358 	nand_select(self, true);
    359 	nand_command(self, ONFI_READ_ID);
    360 	nand_address(self, 0x20);
    361 	nand_read_byte(self, &onfi_signature[0]);
    362 	nand_read_byte(self, &onfi_signature[1]);
    363 	nand_read_byte(self, &onfi_signature[2]);
    364 	nand_read_byte(self, &onfi_signature[3]);
    365 	nand_select(self, false);
    366 
    367 	if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' ||
    368 	    onfi_signature[2] != 'F' || onfi_signature[3] != 'I') {
    369 		chip->nc_isonfi = false;
    370 
    371 		aprint_normal(": Legacy NAND Flash\n");
    372 
    373 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    374 
    375 		if (nand_fill_chip_structure_legacy(self, chip)) {
    376 			aprint_error_dev(self,
    377 			    "can't read device parameters for legacy chip\n");
    378 			return 1;
    379 		}
    380 	} else {
    381 		chip->nc_isonfi = true;
    382 
    383 		aprint_normal(": ONFI NAND Flash\n");
    384 
    385 		nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id);
    386 
    387 		if (nand_fill_chip_structure(self, chip)) {
    388 			aprint_error_dev(self,
    389 			    "can't read device parameters\n");
    390 
    391 			return 1;
    392 		}
    393 	}
    394 
    395 #ifdef NAND_VERBOSE
    396 	aprint_normal_dev(self,
    397 	    "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n",
    398 	    chip->nc_manf_id,
    399 	    nand_midtoname(chip->nc_manf_id),
    400 	    chip->nc_dev_id);
    401 #endif
    402 
    403 	aprint_normal_dev(self,
    404 	    "page size: %zu bytes, spare size: %zu bytes, "
    405 	    "block size: %zu bytes\n",
    406 	    chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size);
    407 
    408 	aprint_normal_dev(self,
    409 	    "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8
    410 	    ", total storage size: %zu MB\n",
    411 	    chip->nc_lun_blocks, chip->nc_num_luns,
    412 	    chip->nc_size / 1024 / 1024);
    413 
    414 #ifdef NAND_VERBOSE
    415 	aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %"
    416 	    PRIu8 "\n",
    417 	    chip->nc_addr_cycles_column, chip->nc_addr_cycles_row);
    418 #endif
    419 
    420 	ecc = chip->nc_ecc = &sc->nand_if->ecc;
    421 
    422 	/*
    423 	 * calculate the place of ecc data in oob
    424 	 * we try to be compatible with Linux here
    425 	 */
    426 	switch (chip->nc_spare_size) {
    427 	case 8:
    428 		ecc->necc_offset = 0;
    429 		break;
    430 	case 16:
    431 		ecc->necc_offset = 0;
    432 		break;
    433 	case 64:
    434 		ecc->necc_offset = 40;
    435 		break;
    436 	case 128:
    437 		ecc->necc_offset = 80;
    438 		break;
    439 	default:
    440 		panic("OOB size is unexpected");
    441 	}
    442 
    443 	ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size;
    444 	ecc->necc_size = ecc->necc_steps * ecc->necc_code_size;
    445 
    446 	/* check if we fit in oob */
    447 	if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) {
    448 		panic("NAND ECC bits dont fit in OOB");
    449 	}
    450 
    451 	/* TODO: mark free oob area available for file systems */
    452 
    453 	chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP);
    454 
    455 	/*
    456 	 * calculate badblock marker offset in oob
    457 	 * we try to be compatible with linux here
    458 	 */
    459 	if (chip->nc_page_size > 512)
    460 		chip->nc_badmarker_offs = 0;
    461 	else
    462 		chip->nc_badmarker_offs = 5;
    463 
    464 	/* Calculate page shift and mask */
    465 	chip->nc_page_shift = ffs(chip->nc_page_size) - 1;
    466 	chip->nc_page_mask = ~(chip->nc_page_size - 1);
    467 	/* same for block */
    468 	chip->nc_block_shift = ffs(chip->nc_block_size) - 1;
    469 	chip->nc_block_mask = ~(chip->nc_block_size - 1);
    470 
    471 	/* look for quirks here if needed in future */
    472 	/* nand_quirks(self, chip); */
    473 
    474 	return 0;
    475 }
    476 
    477 void
    478 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev)
    479 {
    480 	nand_select(self, true);
    481 	nand_command(self, ONFI_READ_ID);
    482 	nand_address(self, 0x00);
    483 
    484 	nand_read_byte(self, manf);
    485 	nand_read_byte(self, dev);
    486 
    487 	nand_select(self, false);
    488 }
    489 
    490 int
    491 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params)
    492 {
    493 	uint8_t *bufp;
    494 	uint16_t crc;
    495 	int i;//, tries = 0;
    496 
    497 	KASSERT(sizeof(*params) == 256);
    498 
    499 //read_params:
    500 //	tries++;
    501 
    502 	nand_select(self, true);
    503 	nand_command(self, ONFI_READ_PARAMETER_PAGE);
    504 	nand_address(self, 0x00);
    505 
    506 	nand_busy(self);
    507 
    508 	/* TODO check the signature if it contains at least 2 letters */
    509 
    510 	bufp = (uint8_t *)params;
    511 	/* XXX why i am not using read_buf? */
    512 	for (i = 0; i < 256; i++) {
    513 		nand_read_byte(self, &bufp[i]);
    514 	}
    515 	nand_select(self, false);
    516 
    517 	/* validate the parameter page with the crc */
    518 	crc = nand_crc16(bufp, 254);
    519 
    520 	if (crc != params->param_integrity_crc) {
    521 		aprint_error_dev(self, "parameter page crc check failed\n");
    522 		/* TODO: we should read the next parameter page copy */
    523 		return 1;
    524 	}
    525 
    526 	return 0;
    527 }
    528 
    529 static int
    530 nand_fill_chip_structure(device_t self, struct nand_chip *chip)
    531 {
    532 	struct onfi_parameter_page params;
    533 	uint8_t	vendor[13], model[21];
    534 	int i;
    535 
    536 	if (nand_read_parameter_page(self, &params)) {
    537 		return 1;
    538 	}
    539 
    540 	/* strip manufacturer and model string */
    541 	strlcpy(vendor, params.param_manufacturer, sizeof(vendor));
    542 	for (i = 11; i > 0 && vendor[i] == ' '; i--)
    543 		vendor[i] = 0;
    544 	strlcpy(model, params.param_model, sizeof(model));
    545 	for (i = 19; i > 0 && model[i] == ' '; i--)
    546 		model[i] = 0;
    547 
    548 	aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model);
    549 
    550 	/* XXX TODO multiple LUNs */
    551 	if (params.param_numluns != 1) {
    552 		aprint_error_dev(self,
    553 		    "more than one LUNs are not supported yet!\n");
    554 
    555 		return 1;
    556 	}
    557 
    558 	chip->nc_size = params.param_pagesize * params.param_blocksize *
    559 	    params.param_lunsize * params.param_numluns;
    560 
    561 	chip->nc_page_size = params.param_pagesize;
    562 	chip->nc_block_pages = params.param_blocksize;
    563 	chip->nc_block_size = params.param_blocksize * params.param_pagesize;
    564 	chip->nc_spare_size = params.param_sparesize;
    565 	chip->nc_lun_blocks = params.param_lunsize;
    566 	chip->nc_num_luns = params.param_numluns;
    567 
    568 	/* the lower 4 bits contain the row address cycles */
    569 	chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07;
    570 	/* the upper 4 bits contain the column address cycles */
    571 	chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4;
    572 
    573 	if (params.param_features & ONFI_FEATURE_16BIT)
    574 		chip->nc_flags |= NC_BUSWIDTH_16;
    575 
    576 	if (params.param_features & ONFI_FEATURE_EXTENDED_PARAM)
    577 		chip->nc_flags |= NC_EXTENDED_PARAM;
    578 
    579 	return 0;
    580 }
    581 
    582 /* ARGSUSED */
    583 bool
    584 nand_shutdown(device_t self, int howto)
    585 {
    586 	return true;
    587 }
    588 
    589 static void
    590 nand_address_column(device_t self, size_t row, size_t column)
    591 {
    592 	struct nand_softc *sc = device_private(self);
    593 	struct nand_chip *chip = &sc->sc_chip;
    594 	uint8_t i;
    595 
    596 	DPRINTF(("addressing row: 0x%jx column: %zu\n",
    597 		(uintmax_t )row, column));
    598 
    599 	/* XXX TODO */
    600 	row >>= chip->nc_page_shift;
    601 
    602 	/* Write the column (subpage) address */
    603 	if (chip->nc_flags & NC_BUSWIDTH_16)
    604 		column >>= 1;
    605 	for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8)
    606 		nand_address(self, column & 0xff);
    607 
    608 	/* Write the row (page) address */
    609 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    610 		nand_address(self, row & 0xff);
    611 }
    612 
    613 static void
    614 nand_address_row(device_t self, size_t row)
    615 {
    616 	struct nand_softc *sc = device_private(self);
    617 	struct nand_chip *chip = &sc->sc_chip;
    618 	int i;
    619 
    620 	/* XXX TODO */
    621 	row >>= chip->nc_page_shift;
    622 
    623 	/* Write the row (page) address */
    624 	for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8)
    625 		nand_address(self, row & 0xff);
    626 }
    627 
    628 static inline uint8_t
    629 nand_get_status(device_t self)
    630 {
    631 	uint8_t status;
    632 
    633 	nand_command(self, ONFI_READ_STATUS);
    634 	nand_busy(self);
    635 	nand_read_byte(self, &status);
    636 
    637 	return status;
    638 }
    639 
    640 static bool
    641 nand_check_wp(device_t self)
    642 {
    643 	if (nand_get_status(self) & 0x80)
    644 		return false;
    645 	else
    646 		return true;
    647 }
    648 
    649 static void
    650 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column)
    651 {
    652 	nand_command(self, ONFI_READ);
    653 	nand_address_column(self, row, column);
    654 	nand_command(self, ONFI_READ_START);
    655 
    656 	nand_busy(self);
    657 }
    658 
    659 /* read a page with ecc correction, default implementation */
    660 int
    661 nand_default_read_page(device_t self, size_t offset, uint8_t *data)
    662 {
    663 	struct nand_softc *sc = device_private(self);
    664 	struct nand_chip *chip = &sc->sc_chip;
    665 	size_t b, bs, e, cs;
    666 	uint8_t *ecc;
    667 	int result;
    668 
    669 	nand_prepare_read(self, offset, 0);
    670 
    671 	bs = chip->nc_ecc->necc_block_size;
    672 	cs = chip->nc_ecc->necc_code_size;
    673 
    674 	/* decide if we access by 8 or 16 bits */
    675 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    676 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    677 			nand_ecc_prepare(self, NAND_ECC_READ);
    678 			nand_read_buf_word(self, data + b, bs);
    679 			nand_ecc_compute(self, data + b,
    680 			    chip->nc_ecc_cache + e);
    681 		}
    682 	} else {
    683 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    684 			nand_ecc_prepare(self, NAND_ECC_READ);
    685 			nand_read_buf_byte(self, data + b, bs);
    686 			nand_ecc_compute(self, data + b,
    687 			    chip->nc_ecc_cache + e);
    688 		}
    689 	}
    690 
    691 	/* for debugging new drivers */
    692 #if 0
    693 	nand_dump_data("page", data, chip->nc_page_size);
    694 #endif
    695 
    696 	nand_read_oob(self, offset, chip->nc_oob_cache);
    697 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    698 
    699 	/* useful for debugging new ecc drivers */
    700 #if 0
    701 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    702 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    703 		printf("0x");
    704 		for (b = 0; b < cs; b++) {
    705 			printf("%.2hhx", ecc[e+b]);
    706 		}
    707 		printf(" 0x");
    708 		for (b = 0; b < cs; b++) {
    709 			printf("%.2hhx", chip->nc_ecc_cache[e+b]);
    710 		}
    711 		printf("\n");
    712 	}
    713 	printf("--------------\n");
    714 #endif
    715 
    716 	for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    717 		result = nand_ecc_correct(self, data + b, ecc + e,
    718 		    chip->nc_ecc_cache + e);
    719 
    720 		switch (result) {
    721 		case NAND_ECC_OK:
    722 			break;
    723 		case NAND_ECC_CORRECTED:
    724 			aprint_error_dev(self,
    725 			    "data corrected with ECC at page offset 0x%jx "
    726 			    "block %zu\n", (uintmax_t)offset, b);
    727 			break;
    728 		case NAND_ECC_TWOBIT:
    729 			aprint_error_dev(self,
    730 			    "uncorrectable ECC error at page offset 0x%jx "
    731 			    "block %zu\n", (uintmax_t)offset, b);
    732 			return EIO;
    733 			break;
    734 		case NAND_ECC_INVALID:
    735 			aprint_error_dev(self,
    736 			    "invalid ECC in oob at page offset 0x%jx "
    737 			    "block %zu\n", (uintmax_t)offset, b);
    738 			return EIO;
    739 			break;
    740 		default:
    741 			panic("invalid ECC correction errno");
    742 		}
    743 	}
    744 
    745 	return 0;
    746 }
    747 
    748 int
    749 nand_default_program_page(device_t self, size_t page, const uint8_t *data)
    750 {
    751 	struct nand_softc *sc = device_private(self);
    752 	struct nand_chip *chip = &sc->sc_chip;
    753 	size_t bs, cs, e, b;
    754 	uint8_t status;
    755 	uint8_t *ecc;
    756 
    757 	nand_command(self, ONFI_PAGE_PROGRAM);
    758 	nand_address_column(self, page, 0);
    759 
    760 	nand_busy(self);
    761 
    762 	bs = chip->nc_ecc->necc_block_size;
    763 	cs = chip->nc_ecc->necc_code_size;
    764 	ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset;
    765 
    766 	/* XXX code duplication */
    767 	/* decide if we access by 8 or 16 bits */
    768 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    769 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    770 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    771 			nand_write_buf_word(self, data + b, bs);
    772 			nand_ecc_compute(self, data + b, ecc + e);
    773 		}
    774 		/* write oob with ecc correction code */
    775 		nand_write_buf_word(self, chip->nc_oob_cache,
    776 		    chip->nc_spare_size);
    777 	} else {
    778 		for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) {
    779 			nand_ecc_prepare(self, NAND_ECC_WRITE);
    780 			nand_write_buf_byte(self, data + b, bs);
    781 			nand_ecc_compute(self, data + b, ecc + e);
    782 		}
    783 		/* write oob with ecc correction code */
    784 		nand_write_buf_byte(self, chip->nc_oob_cache,
    785 		    chip->nc_spare_size);
    786 	}
    787 
    788 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    789 
    790 	nand_busy(self);
    791 
    792 	/* for debugging ecc */
    793 #if 0
    794 	printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps);
    795 	for (e = 0; e < chip->nc_ecc->necc_steps; e++) {
    796 		printf("0x");
    797 		for (b = 0; b < cs; b++) {
    798 			printf("%.2hhx", ecc[e+b]);
    799 		}
    800 		printf("\n");
    801 	}
    802 	printf("--------------\n");
    803 #endif
    804 
    805 	status = nand_get_status(self);
    806 	KASSERT(status & ONFI_STATUS_RDY);
    807 	if (status & ONFI_STATUS_FAIL) {
    808 		aprint_error_dev(self, "page program failed!\n");
    809 		return EIO;
    810 	}
    811 
    812 	return 0;
    813 }
    814 
    815 /* read the OOB of a page */
    816 int
    817 nand_read_oob(device_t self, size_t page, uint8_t *oob)
    818 {
    819 	struct nand_softc *sc = device_private(self);
    820 	struct nand_chip *chip = &sc->sc_chip;
    821 
    822 	nand_prepare_read(self, page, chip->nc_page_size);
    823 
    824 	if (chip->nc_flags & NC_BUSWIDTH_16)
    825 		nand_read_buf_word(self, oob, chip->nc_spare_size);
    826 	else
    827 		nand_read_buf_byte(self, oob, chip->nc_spare_size);
    828 
    829 	/* for debugging drivers */
    830 #if 0
    831 	nand_dump_data("oob", oob, chip->nc_spare_size);
    832 #endif
    833 
    834 	return 0;
    835 }
    836 
    837 static int
    838 nand_write_oob(device_t self, size_t offset, const void *oob)
    839 {
    840 	struct nand_softc *sc = device_private(self);
    841 	struct nand_chip *chip = &sc->sc_chip;
    842 	uint8_t status;
    843 
    844 	nand_command(self, ONFI_PAGE_PROGRAM);
    845 	nand_address_column(self, offset, chip->nc_page_size);
    846 	nand_command(self, ONFI_PAGE_PROGRAM_START);
    847 
    848 	nand_busy(self);
    849 
    850 	if (chip->nc_flags & NC_BUSWIDTH_16)
    851 		nand_write_buf_word(self, oob, chip->nc_spare_size);
    852 	else
    853 		nand_write_buf_byte(self, oob, chip->nc_spare_size);
    854 
    855 	status = nand_get_status(self);
    856 	KASSERT(status & ONFI_STATUS_RDY);
    857 	if (status & ONFI_STATUS_FAIL)
    858 		return EIO;
    859 	else
    860 		return 0;
    861 }
    862 
    863 void
    864 nand_markbad(device_t self, size_t offset)
    865 {
    866 	struct nand_softc *sc = device_private(self);
    867 	struct nand_chip *chip = &sc->sc_chip;
    868 	flash_off_t blockoffset, marker;
    869 #ifdef NAND_BBT
    870 	flash_off_t block;
    871 
    872 	block = offset / chip->nc_block_size;
    873 
    874 	nand_bbt_block_markbad(self, block);
    875 #endif
    876 	blockoffset = offset & chip->nc_block_mask;
    877 	marker = chip->nc_badmarker_offs & ~0x01;
    878 
    879 	/* check if it is already marked bad */
    880 	if (nand_isbad(self, blockoffset))
    881 		return;
    882 
    883 	nand_read_oob(self, blockoffset, chip->nc_oob_cache);
    884 
    885 	chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00;
    886 	chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00;
    887 
    888 	nand_write_oob(self, blockoffset, chip->nc_oob_cache);
    889 }
    890 
    891 bool
    892 nand_isfactorybad(device_t self, flash_off_t offset)
    893 {
    894 	struct nand_softc *sc = device_private(self);
    895 	struct nand_chip *chip = &sc->sc_chip;
    896 	flash_off_t block, first_page, last_page, page;
    897 	int i;
    898 
    899 	/* Check for factory bad blocks first
    900 	 * Factory bad blocks are marked in the first or last
    901 	 * page of the blocks, see: ONFI 2.2, 3.2.2.
    902 	 */
    903 	block = offset / chip->nc_block_size;
    904 	first_page = block * chip->nc_block_size;
    905 	last_page = (block + 1) * chip->nc_block_size
    906 	    - chip->nc_page_size;
    907 
    908 	for (i = 0, page = first_page; i < 2; i++, page = last_page) {
    909 		/* address OOB */
    910 		nand_prepare_read(self, page, chip->nc_page_size);
    911 
    912 		if (chip->nc_flags & NC_BUSWIDTH_16) {
    913 			uint16_t word;
    914 			nand_read_word(self, &word);
    915 			if (word == 0x0000)
    916 				return true;
    917 		} else {
    918 			uint8_t byte;
    919 			nand_read_byte(self, &byte);
    920 			if (byte == 0x00)
    921 				return true;
    922 		}
    923 	}
    924 
    925 	return false;
    926 }
    927 
    928 bool
    929 nand_iswornoutbad(device_t self, flash_off_t offset)
    930 {
    931 	struct nand_softc *sc = device_private(self);
    932 	struct nand_chip *chip = &sc->sc_chip;
    933 	flash_off_t block;
    934 
    935 	/* we inspect the first page of the block */
    936 	block = offset & chip->nc_block_mask;
    937 
    938 	/* Linux/u-boot compatible badblock handling */
    939 	if (chip->nc_flags & NC_BUSWIDTH_16) {
    940 		uint16_t word, mark;
    941 
    942 		nand_prepare_read(self, block,
    943 		    chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe));
    944 
    945 		nand_read_word(self, &word);
    946 		mark = htole16(word);
    947 		if (chip->nc_badmarker_offs & 0x01)
    948 			mark >>= 8;
    949 		if ((mark & 0xff) != 0xff)
    950 			return true;
    951 	} else {
    952 		uint8_t byte;
    953 
    954 		nand_prepare_read(self, block,
    955 		    chip->nc_page_size + chip->nc_badmarker_offs);
    956 
    957 		nand_read_byte(self, &byte);
    958 		if (byte != 0xff)
    959 			return true;
    960 	}
    961 
    962 	return false;
    963 }
    964 
    965 bool
    966 nand_isbad(device_t self, flash_off_t offset)
    967 {
    968 #ifdef NAND_BBT
    969 	struct nand_softc *sc = device_private(self);
    970 	struct nand_chip *chip = &sc->sc_chip;
    971 	flash_off_t block;
    972 
    973 	block = offset / chip->nc_block_size;
    974 
    975 	return nand_bbt_block_isbad(self, block);
    976 #else
    977 	/* ONFI host requirement */
    978 	if (nand_isfactorybad(self, offset))
    979 		return true;
    980 
    981 	/* Look for Linux/U-Boot compatible bad marker */
    982 	if (nand_iswornoutbad(self, offset))
    983 		return true;
    984 
    985 	return false;
    986 #endif
    987 }
    988 
    989 int
    990 nand_erase_block(device_t self, size_t offset)
    991 {
    992 	uint8_t status;
    993 
    994 	/* xxx calculate first page of block for address? */
    995 
    996 	nand_command(self, ONFI_BLOCK_ERASE);
    997 	nand_address_row(self, offset);
    998 	nand_command(self, ONFI_BLOCK_ERASE_START);
    999 
   1000 	nand_busy(self);
   1001 
   1002 	status = nand_get_status(self);
   1003 	KASSERT(status & ONFI_STATUS_RDY);
   1004 	if (status & ONFI_STATUS_FAIL) {
   1005 		aprint_error_dev(self, "block erase failed!\n");
   1006 		nand_markbad(self, offset);
   1007 		return EIO;
   1008 	} else {
   1009 		return 0;
   1010 	}
   1011 }
   1012 
   1013 /* default functions for driver development */
   1014 
   1015 /* default ECC using hamming code of 256 byte chunks */
   1016 int
   1017 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code)
   1018 {
   1019 	hamming_compute_256(data, code);
   1020 
   1021 	return 0;
   1022 }
   1023 
   1024 int
   1025 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode,
   1026 	const uint8_t *compcode)
   1027 {
   1028 	return hamming_correct_256(data, origcode, compcode);
   1029 }
   1030 
   1031 void
   1032 nand_default_select(device_t self, bool enable)
   1033 {
   1034 	/* do nothing */
   1035 	return;
   1036 }
   1037 
   1038 /* implementation of the block device API */
   1039 
   1040 /*
   1041  * handle (page) unaligned write to nand
   1042  */
   1043 static int
   1044 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len,
   1045     size_t *retlen, const uint8_t *buf)
   1046 {
   1047 	struct nand_softc *sc = device_private(self);
   1048 	struct nand_chip *chip = &sc->sc_chip;
   1049 	flash_off_t first, last, firstoff;
   1050 	const uint8_t *bufp;
   1051 	flash_off_t addr;
   1052 	size_t left, count;
   1053 	int error = 0, i;
   1054 
   1055 	first = offset & chip->nc_page_mask;
   1056 	firstoff = offset & ~chip->nc_page_mask;
   1057 	/* XXX check if this should be len - 1 */
   1058 	last = (offset + len) & chip->nc_page_mask;
   1059 	count = last - first + 1;
   1060 
   1061 	addr = first;
   1062 	*retlen = 0;
   1063 
   1064 	mutex_enter(&sc->sc_device_lock);
   1065 	if (count == 1) {
   1066 		if (nand_isbad(self, addr)) {
   1067 			aprint_error_dev(self,
   1068 			    "nand_flash_write_unaligned: "
   1069 			    "bad block encountered\n");
   1070 			error = EIO;
   1071 			goto out;
   1072 		}
   1073 
   1074 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1075 		if (error) {
   1076 			goto out;
   1077 		}
   1078 
   1079 		memcpy(chip->nc_page_cache + firstoff, buf, len);
   1080 
   1081 		error = nand_program_page(self, addr, chip->nc_page_cache);
   1082 		if (error) {
   1083 			goto out;
   1084 		}
   1085 
   1086 		*retlen = len;
   1087 		goto out;
   1088 	}
   1089 
   1090 	bufp = buf;
   1091 	left = len;
   1092 
   1093 	for (i = 0; i < count && left != 0; i++) {
   1094 		if (nand_isbad(self, addr)) {
   1095 			aprint_error_dev(self,
   1096 			    "nand_flash_write_unaligned: "
   1097 			    "bad block encountered\n");
   1098 			error = EIO;
   1099 			goto out;
   1100 		}
   1101 
   1102 		if (i == 0) {
   1103 			error = nand_read_page(self,
   1104 			    addr, chip->nc_page_cache);
   1105 			if (error) {
   1106 				goto out;
   1107 			}
   1108 
   1109 			memcpy(chip->nc_page_cache + firstoff,
   1110 			    bufp, chip->nc_page_size - firstoff);
   1111 
   1112 			printf("program page: %s: %d\n", __FILE__, __LINE__);
   1113 			error = nand_program_page(self,
   1114 			    addr, chip->nc_page_cache);
   1115 			if (error) {
   1116 				goto out;
   1117 			}
   1118 
   1119 			bufp += chip->nc_page_size - firstoff;
   1120 			left -= chip->nc_page_size - firstoff;
   1121 			*retlen += chip->nc_page_size - firstoff;
   1122 
   1123 		} else if (i == count - 1) {
   1124 			error = nand_read_page(self,
   1125 			    addr, chip->nc_page_cache);
   1126 			if (error) {
   1127 				goto out;
   1128 			}
   1129 
   1130 			memcpy(chip->nc_page_cache, bufp, left);
   1131 
   1132 			error = nand_program_page(self,
   1133 			    addr, chip->nc_page_cache);
   1134 			if (error) {
   1135 				goto out;
   1136 			}
   1137 
   1138 			*retlen += left;
   1139 			KASSERT(left < chip->nc_page_size);
   1140 
   1141 		} else {
   1142 			/* XXX debug */
   1143 			if (left > chip->nc_page_size) {
   1144 				printf("left: %zu, i: %d, count: %zu\n",
   1145 				    (size_t )left, i, count);
   1146 			}
   1147 			KASSERT(left > chip->nc_page_size);
   1148 
   1149 			error = nand_program_page(self, addr, bufp);
   1150 			if (error) {
   1151 				goto out;
   1152 			}
   1153 
   1154 			bufp += chip->nc_page_size;
   1155 			left -= chip->nc_page_size;
   1156 			*retlen += chip->nc_page_size;
   1157 		}
   1158 
   1159 		addr += chip->nc_page_size;
   1160 	}
   1161 
   1162 	KASSERT(*retlen == len);
   1163 out:
   1164 	mutex_exit(&sc->sc_device_lock);
   1165 
   1166 	return error;
   1167 }
   1168 
   1169 int
   1170 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1171     const uint8_t *buf)
   1172 {
   1173 	struct nand_softc *sc = device_private(self);
   1174 	struct nand_chip *chip = &sc->sc_chip;
   1175 	const uint8_t *bufp;
   1176 	size_t pages, page;
   1177 	daddr_t addr;
   1178 	int error = 0;
   1179 
   1180 	if ((offset + len) > chip->nc_size) {
   1181 		DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju),"
   1182 			" is over device size (0x%jx)\n",
   1183 			(uintmax_t)offset, (uintmax_t)len,
   1184 			(uintmax_t)chip->nc_size));
   1185 		return EINVAL;
   1186 	}
   1187 
   1188 	if (len % chip->nc_page_size != 0 ||
   1189 	    offset % chip->nc_page_size != 0) {
   1190 		return nand_flash_write_unaligned(self,
   1191 		    offset, len, retlen, buf);
   1192 	}
   1193 
   1194 	pages = len / chip->nc_page_size;
   1195 	KASSERT(pages != 0);
   1196 	*retlen = 0;
   1197 
   1198 	addr = offset;
   1199 	bufp = buf;
   1200 
   1201 	mutex_enter(&sc->sc_device_lock);
   1202 	for (page = 0; page < pages; page++) {
   1203 		/* do we need this check here? */
   1204 		if (nand_isbad(self, addr)) {
   1205 			aprint_error_dev(self,
   1206 			    "nand_flash_write: bad block encountered\n");
   1207 
   1208 			error = EIO;
   1209 			goto out;
   1210 		}
   1211 
   1212 		error = nand_program_page(self, addr, bufp);
   1213 		if (error) {
   1214 			goto out;
   1215 		}
   1216 
   1217 		addr += chip->nc_page_size;
   1218 		bufp += chip->nc_page_size;
   1219 		*retlen += chip->nc_page_size;
   1220 	}
   1221 out:
   1222 	mutex_exit(&sc->sc_device_lock);
   1223 	DPRINTF(("page programming: retlen: %zu, len: %zu\n", *retlen, len));
   1224 
   1225 	return error;
   1226 }
   1227 
   1228 /*
   1229  * handle (page) unaligned read from nand
   1230  */
   1231 static int
   1232 nand_flash_read_unaligned(device_t self, size_t offset,
   1233     size_t len, size_t *retlen, uint8_t *buf)
   1234 {
   1235 	struct nand_softc *sc = device_private(self);
   1236 	struct nand_chip *chip = &sc->sc_chip;
   1237 	daddr_t first, last, count, firstoff;
   1238 	uint8_t *bufp;
   1239 	daddr_t addr;
   1240 	size_t left;
   1241 	int error = 0, i;
   1242 
   1243 	first = offset & chip->nc_page_mask;
   1244 	firstoff = offset & ~chip->nc_page_mask;
   1245 	last = (offset + len) & chip->nc_page_mask;
   1246 	count = (last - first) / chip->nc_page_size + 1;
   1247 
   1248 	addr = first;
   1249 	bufp = buf;
   1250 	left = len;
   1251 	*retlen = 0;
   1252 
   1253 	mutex_enter(&sc->sc_device_lock);
   1254 	if (count == 1) {
   1255 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1256 		if (error) {
   1257 			goto out;
   1258 		}
   1259 
   1260 		memcpy(bufp, chip->nc_page_cache + firstoff, len);
   1261 
   1262 		*retlen = len;
   1263 		goto out;
   1264 	}
   1265 
   1266 	for (i = 0; i < count && left != 0; i++) {
   1267 		error = nand_read_page(self, addr, chip->nc_page_cache);
   1268 		if (error) {
   1269 			goto out;
   1270 		}
   1271 
   1272 		if (i == 0) {
   1273 			memcpy(bufp, chip->nc_page_cache + firstoff,
   1274 			    chip->nc_page_size - firstoff);
   1275 
   1276 			bufp += chip->nc_page_size - firstoff;
   1277 			left -= chip->nc_page_size - firstoff;
   1278 			*retlen += chip->nc_page_size - firstoff;
   1279 
   1280 		} else if (i == count - 1) {
   1281 			memcpy(bufp, chip->nc_page_cache, left);
   1282 			*retlen += left;
   1283 			KASSERT(left < chip->nc_page_size);
   1284 
   1285 		} else {
   1286 			memcpy(bufp, chip->nc_page_cache, chip->nc_page_size);
   1287 
   1288 			bufp += chip->nc_page_size;
   1289 			left -= chip->nc_page_size;
   1290 			*retlen += chip->nc_page_size;
   1291 		}
   1292 
   1293 		addr += chip->nc_page_size;
   1294 	}
   1295 
   1296 	KASSERT(*retlen == len);
   1297 
   1298 out:
   1299 	mutex_exit(&sc->sc_device_lock);
   1300 
   1301 	return error;
   1302 }
   1303 
   1304 int
   1305 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen,
   1306     uint8_t *buf)
   1307 {
   1308 	struct nand_softc *sc = device_private(self);
   1309 	struct nand_chip *chip = &sc->sc_chip;
   1310 	uint8_t *bufp;
   1311 	size_t addr;
   1312 	size_t i, pages;
   1313 	int error = 0;
   1314 
   1315 	*retlen = 0;
   1316 
   1317 	DPRINTF(("nand_flash_read: off: 0x%jx, len: %zu\n",
   1318 		(uintmax_t)offset, len));
   1319 
   1320 	if (__predict_false((offset + len) > chip->nc_size)) {
   1321 		DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %zu),"
   1322 			" is over device size (%ju)\n", (uintmax_t)offset,
   1323 			len, (uintmax_t)chip->nc_size));
   1324 		return EINVAL;
   1325 	}
   1326 
   1327 	/* Handle unaligned access, shouldnt be needed when using the
   1328 	 * block device, as strategy handles it, so only low level
   1329 	 * accesses will use this path
   1330 	 */
   1331 	/* XXX^2 */
   1332 #if 0
   1333 	if (len < chip->nc_page_size)
   1334 		panic("TODO page size is larger than read size");
   1335 #endif
   1336 
   1337 
   1338 	if (len % chip->nc_page_size != 0 ||
   1339 	    offset % chip->nc_page_size != 0) {
   1340 		return nand_flash_read_unaligned(self,
   1341 		    offset, len, retlen, buf);
   1342 	}
   1343 
   1344 	bufp = buf;
   1345 	addr = offset;
   1346 	pages = len / chip->nc_page_size;
   1347 
   1348 	mutex_enter(&sc->sc_device_lock);
   1349 	for (i = 0; i < pages; i++) {
   1350 		/* XXX do we need this check here? */
   1351 		if (nand_isbad(self, addr)) {
   1352 			aprint_error_dev(self, "bad block encountered\n");
   1353 			error = EIO;
   1354 			goto out;
   1355 		}
   1356 		error = nand_read_page(self, addr, bufp);
   1357 		if (error)
   1358 			goto out;
   1359 
   1360 		bufp += chip->nc_page_size;
   1361 		addr += chip->nc_page_size;
   1362 		*retlen += chip->nc_page_size;
   1363 	}
   1364 
   1365 out:
   1366 	mutex_exit(&sc->sc_device_lock);
   1367 
   1368 	return error;
   1369 }
   1370 
   1371 int
   1372 nand_flash_isbad(device_t self, flash_off_t ofs, bool *isbad)
   1373 {
   1374 	struct nand_softc *sc = device_private(self);
   1375 	struct nand_chip *chip = &sc->sc_chip;
   1376 	bool result;
   1377 
   1378 	if (ofs > chip->nc_size) {
   1379 		DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than"
   1380 			" device size (0x%jx)\n", (uintmax_t)ofs,
   1381 			(uintmax_t)chip->nc_size));
   1382 		return EINVAL;
   1383 	}
   1384 
   1385 	if (ofs % chip->nc_block_size != 0) {
   1386 		DPRINTF(("offset (0x%jx) is not the multiple of block size "
   1387 			"(%ju)",
   1388 			(uintmax_t)ofs, (uintmax_t)chip->nc_block_size));
   1389 		return EINVAL;
   1390 	}
   1391 
   1392 	mutex_enter(&sc->sc_device_lock);
   1393 	result = nand_isbad(self, ofs);
   1394 	mutex_exit(&sc->sc_device_lock);
   1395 
   1396 	*isbad = result;
   1397 
   1398 	return 0;
   1399 }
   1400 
   1401 int
   1402 nand_flash_markbad(device_t self, flash_off_t ofs)
   1403 {
   1404 	struct nand_softc *sc = device_private(self);
   1405 	struct nand_chip *chip = &sc->sc_chip;
   1406 
   1407 	if (ofs > chip->nc_size) {
   1408 		DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than"
   1409 			" device size (0x%jx)\n", ofs,
   1410 			(uintmax_t)chip->nc_size));
   1411 		return EINVAL;
   1412 	}
   1413 
   1414 	if (ofs % chip->nc_block_size != 0) {
   1415 		panic("offset (%ju) is not the multiple of block size (%ju)",
   1416 		    (uintmax_t)ofs, (uintmax_t)chip->nc_block_size);
   1417 	}
   1418 
   1419 	mutex_enter(&sc->sc_device_lock);
   1420 	nand_markbad(self, ofs);
   1421 	mutex_exit(&sc->sc_device_lock);
   1422 
   1423 	return 0;
   1424 }
   1425 
   1426 int
   1427 nand_flash_erase(device_t self,
   1428     struct flash_erase_instruction *ei)
   1429 {
   1430 	struct nand_softc *sc = device_private(self);
   1431 	struct nand_chip *chip = &sc->sc_chip;
   1432 	flash_off_t addr;
   1433 	int error = 0;
   1434 
   1435 	if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size)
   1436 		return EINVAL;
   1437 
   1438 	if (ei->ei_addr + ei->ei_len > chip->nc_size) {
   1439 		DPRINTF(("nand_flash_erase: erase address is over the end"
   1440 			" of the device\n"));
   1441 		return EINVAL;
   1442 	}
   1443 
   1444 	if (ei->ei_addr % chip->nc_block_size != 0) {
   1445 		aprint_error_dev(self,
   1446 		    "nand_flash_erase: ei_addr (%ju) is not"
   1447 		    "the multiple of block size (%ju)",
   1448 		    (uintmax_t)ei->ei_addr,
   1449 		    (uintmax_t)chip->nc_block_size);
   1450 		return EINVAL;
   1451 	}
   1452 
   1453 	if (ei->ei_len % chip->nc_block_size != 0) {
   1454 		aprint_error_dev(self,
   1455 		    "nand_flash_erase: ei_len (%ju) is not"
   1456 		    "the multiple of block size (%ju)",
   1457 		    (uintmax_t)ei->ei_addr,
   1458 		    (uintmax_t)chip->nc_block_size);
   1459 		return EINVAL;
   1460 	}
   1461 
   1462 	mutex_enter(&sc->sc_device_lock);
   1463 	addr = ei->ei_addr;
   1464 	while (addr < ei->ei_addr + ei->ei_len) {
   1465 		if (nand_isbad(self, addr)) {
   1466 			aprint_error_dev(self, "bad block encountered\n");
   1467 			ei->ei_state = FLASH_ERASE_FAILED;
   1468 
   1469 			error = EIO;
   1470 			goto out;
   1471 		}
   1472 
   1473 		error = nand_erase_block(self, addr);
   1474 		if (error) {
   1475 			ei->ei_state = FLASH_ERASE_FAILED;
   1476 
   1477 			goto out;
   1478 		}
   1479 
   1480 		addr += chip->nc_block_size;
   1481 	}
   1482 	mutex_exit(&sc->sc_device_lock);
   1483 
   1484 	ei->ei_state = FLASH_ERASE_DONE;
   1485 	if (ei->ei_callback != NULL) {
   1486 		ei->ei_callback(ei);
   1487 	}
   1488 
   1489 	return 0;
   1490 out:
   1491 	mutex_exit(&sc->sc_device_lock);
   1492 
   1493 	return error;
   1494 }
   1495 
   1496 static int
   1497 sysctl_nand_verify(SYSCTLFN_ARGS)
   1498 {
   1499 	int error, t;
   1500 	struct sysctlnode node;
   1501 
   1502 	node = *rnode;
   1503 	t = *(int *)rnode->sysctl_data;
   1504 	node.sysctl_data = &t;
   1505 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
   1506 	if (error || newp == NULL)
   1507 		return error;
   1508 
   1509 	if (node.sysctl_num == nand_cachesync_nodenum) {
   1510 		if (t <= 0 || t > 60)
   1511 			return EINVAL;
   1512 	} else {
   1513 		return EINVAL;
   1514 	}
   1515 
   1516 	*(int *)rnode->sysctl_data = t;
   1517 
   1518 	return 0;
   1519 }
   1520 
   1521 SYSCTL_SETUP(sysctl_nand, "sysctl nand subtree setup")
   1522 {
   1523 	int rc, nand_root_num;
   1524 	const struct sysctlnode *node;
   1525 
   1526 	if ((rc = sysctl_createv(clog, 0, NULL, NULL,
   1527 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
   1528 	    NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0) {
   1529 		goto error;
   1530 	}
   1531 
   1532 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
   1533 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "nand",
   1534 	    SYSCTL_DESCR("NAND driver controls"),
   1535 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) {
   1536 		goto error;
   1537 	}
   1538 
   1539 	nand_root_num = node->sysctl_num;
   1540 
   1541 	if ((rc = sysctl_createv(clog, 0, NULL, &node,
   1542 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
   1543 	    CTLTYPE_INT, "cache_sync_timeout",
   1544 	    SYSCTL_DESCR("NAND write cache sync timeout in seconds"),
   1545 	    sysctl_nand_verify, 0, &nand_cachesync_timeout,
   1546 	    0, CTL_HW, nand_root_num, CTL_CREATE,
   1547 	    CTL_EOL)) != 0) {
   1548 		goto error;
   1549 	}
   1550 
   1551 	nand_cachesync_nodenum = node->sysctl_num;
   1552 
   1553 	return;
   1554 
   1555 error:
   1556 	aprint_error("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
   1557 }
   1558 
   1559 MODULE(MODULE_CLASS_DRIVER, nand, "flash");
   1560 
   1561 #ifdef _MODULE
   1562 #include "ioconf.c"
   1563 #endif
   1564 
   1565 static int
   1566 nand_modcmd(modcmd_t cmd, void *opaque)
   1567 {
   1568 	switch (cmd) {
   1569 	case MODULE_CMD_INIT:
   1570 #ifdef _MODULE
   1571 		return config_init_component(cfdriver_ioconf_nand,
   1572 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1573 #else
   1574 		return 0;
   1575 #endif
   1576 	case MODULE_CMD_FINI:
   1577 #ifdef _MODULE
   1578 		return config_fini_component(cfdriver_ioconf_nand,
   1579 		    cfattach_ioconf_nand, cfdata_ioconf_nand);
   1580 #else
   1581 		return 0;
   1582 #endif
   1583 	default:
   1584 		return ENOTTY;
   1585 	}
   1586 }
   1587