nand.h revision 1.10
1 /* $NetBSD: nand.h,v 1.10 2011/06/28 07:16:11 ahoka Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #ifndef _NAND_H_ 35 #define _NAND_H_ 36 37 #include <sys/param.h> 38 #include <sys/cdefs.h> 39 40 #include <sys/bufq.h> 41 #include <sys/buf.h> 42 #include <sys/time.h> 43 44 #include <dev/nand/onfi.h> 45 #include <dev/flash/flash.h> 46 47 #ifdef NAND_DEBUG 48 #define DPRINTF(x) printf x 49 #else 50 #define DPRINTF(x) 51 #endif 52 53 //#define NAND_VERBOSE 54 55 /* same as in linux for compatibility */ 56 enum { 57 NAND_BAD_MARKER_OFFSET = 0, 58 NAND_BAD_MARKER_OFFSET_SMALL = 5 59 }; 60 61 /* feature flags use in nc_flags */ 62 enum { 63 NC_BUSWIDTH_16 = (1<<0), 64 NC_SOURCE_SYNC = (1<<2), 65 NC_INTERLEAVED_PE = (1<<1), 66 NC_INTERLEAVED_R = (1<<3), 67 NC_EXTENDED_PARAM = (1<<4) 68 }; 69 70 /* various quirks used in nc_quirks */ 71 enum { 72 NC_QUIRK_NO_READ_START = (1<<0) 73 }; 74 75 enum { 76 NAND_ECC_READ, 77 NAND_ECC_WRITE 78 }; 79 80 enum { 81 NAND_ECC_OK, 82 NAND_ECC_CORRECTED, 83 NAND_ECC_INVALID, 84 NAND_ECC_TWOBIT 85 }; 86 87 enum { 88 NAND_ECC_TYPE_HW, 89 NAND_ECC_TYPE_SW 90 }; 91 92 struct nand_bbt { 93 uint8_t *nbbt_bitmap; 94 size_t nbbt_size; 95 }; 96 97 struct nand_ecc { 98 size_t necc_offset; /* offset of ecc data in oob */ 99 size_t necc_size; /* size of ecc data in oob */ 100 size_t necc_block_size; /* block size used in ecc calc */ 101 size_t necc_code_size; /* reduntant bytes per block */ 102 int necc_steps; /* pagesize / code size */ 103 int necc_type; /* type of the ecc engine */ 104 }; 105 106 /** 107 * nand_chip: structure containing the required information 108 * about the NAND chip. 109 */ 110 struct nand_chip { 111 struct nand_ecc *nc_ecc; /* ecc information */ 112 uint8_t *nc_oob_cache; /* buffer for oob cache */ 113 uint8_t *nc_page_cache; /* buffer for page cache */ 114 uint8_t *nc_ecc_cache; 115 size_t nc_size; /* storage size in bytes */ 116 size_t nc_page_size; /* page size in bytes */ 117 size_t nc_block_pages; /* block size in pages */ 118 size_t nc_block_size; /* block size in bytes */ 119 size_t nc_spare_size; /* spare (oob) size in bytes */ 120 uint32_t nc_lun_blocks; /* LUN size in blocks */ 121 uint32_t nc_flags; /* bitfield flags */ 122 uint32_t nc_quirks; /* bitfield quirks */ 123 unsigned int nc_page_shift; /* page shift for page alignment */ 124 unsigned int nc_page_mask; /* page mask for page alignment */ 125 unsigned int nc_block_shift; /* write shift */ 126 unsigned int nc_block_mask; /* write mask */ 127 uint8_t nc_num_luns; /* number of LUNs */ 128 uint8_t nc_manf_id; /* manufacturer id */ 129 uint8_t nc_dev_id; /* device id */ 130 uint8_t nc_addr_cycles_row; /* row cycles for addressing */ 131 uint8_t nc_addr_cycles_column; /* column cycles for addressing */ 132 uint8_t nc_badmarker_offs; /* offset for marking bad blocks */ 133 bool nc_isonfi; /* if the device is onfi compliant */ 134 }; 135 136 struct nand_write_cache { 137 struct bintime nwc_creation; 138 struct bintime nwc_last_write; 139 struct bufq_state *nwc_bufq; 140 uint8_t *nwc_data; 141 daddr_t nwc_block; 142 kmutex_t nwc_lock; 143 bool nwc_write_pending; 144 struct lwp *nwc_thread; 145 kcondvar_t nwc_cv; 146 bool nwc_exiting; 147 }; 148 149 /* driver softc for nand */ 150 struct nand_softc { 151 device_t sc_dev; 152 device_t controller_dev; 153 struct nand_interface *nand_if; 154 void *nand_softc; 155 struct nand_chip sc_chip; 156 struct nand_bbt sc_bbt; 157 size_t sc_part_offset; 158 size_t sc_part_size; 159 kmutex_t sc_device_lock; /* serialize access to chip */ 160 struct nand_write_cache sc_cache; 161 }; 162 163 /* structure holding the nand api */ 164 struct nand_interface 165 { 166 /* basic nand controller commands */ 167 void (*select) (device_t, bool); /* optional */ 168 void (*command) (device_t, uint8_t); 169 void (*address) (device_t, uint8_t); 170 void (*read_buf_1) (device_t, void *, size_t); 171 void (*read_buf_2) (device_t, void *, size_t); 172 void (*read_1) (device_t, uint8_t *); 173 void (*read_2) (device_t, uint16_t *); 174 void (*write_buf_1) (device_t, const void *, size_t); 175 void (*write_buf_2) (device_t, const void *, size_t); 176 void (*write_1) (device_t, uint8_t); 177 void (*write_2) (device_t, uint16_t); 178 void (*busy) (device_t); 179 180 /* "smart" controllers may override read/program functions */ 181 int (*read_page) (device_t, size_t, uint8_t *); /* optional */ 182 int (*program_page) (device_t, size_t, const uint8_t *); /* optional */ 183 184 /* functions specific to ecc computation */ 185 int (*ecc_prepare)(device_t, int); /* optional */ 186 int (*ecc_compute)(device_t, const uint8_t *, uint8_t *); 187 int (*ecc_correct)(device_t, uint8_t *, const uint8_t *, 188 const uint8_t *); 189 190 /* information for the ecc engine */ 191 struct nand_ecc ecc; 192 193 /* flash partition information */ 194 const struct flash_partition *part_info; 195 int part_num; 196 }; 197 198 /* attach args */ 199 struct nand_attach_args { 200 struct nand_interface *naa_nand_if; 201 }; 202 203 static inline void 204 nand_busy(device_t device) 205 { 206 struct nand_softc *sc = device_private(device); 207 208 KASSERT(sc->nand_if->select != NULL); 209 KASSERT(sc->controller_dev != NULL); 210 211 sc->nand_if->select(sc->controller_dev, true); 212 213 if (sc->nand_if->busy != NULL) { 214 sc->nand_if->busy(sc->controller_dev); 215 } 216 217 sc->nand_if->select(sc->controller_dev, false); 218 } 219 220 static inline void 221 nand_select(device_t self, bool enable) 222 { 223 struct nand_softc *sc = device_private(self); 224 225 KASSERT(sc->nand_if->select != NULL); 226 KASSERT(sc->controller_dev != NULL); 227 228 sc->nand_if->select(sc->controller_dev, enable); 229 } 230 231 static inline void 232 nand_address(device_t self, uint32_t address) 233 { 234 struct nand_softc *sc = device_private(self); 235 236 KASSERT(sc->nand_if->address != NULL); 237 KASSERT(sc->controller_dev != NULL); 238 239 sc->nand_if->address(sc->controller_dev, address); 240 } 241 242 static inline void 243 nand_command(device_t self, uint8_t command) 244 { 245 struct nand_softc *sc = device_private(self); 246 247 KASSERT(sc->nand_if->command != NULL); 248 KASSERT(sc->controller_dev != NULL); 249 250 sc->nand_if->command(sc->controller_dev, command); 251 } 252 253 static inline void 254 nand_read_1(device_t self, uint8_t *data) 255 { 256 struct nand_softc *sc = device_private(self); 257 258 KASSERT(sc->nand_if->read_1 != NULL); 259 KASSERT(sc->controller_dev != NULL); 260 261 sc->nand_if->read_1(sc->controller_dev, data); 262 } 263 264 static inline void 265 nand_write_1(device_t self, uint8_t data) 266 { 267 struct nand_softc *sc = device_private(self); 268 269 KASSERT(sc->nand_if->write_1 != NULL); 270 KASSERT(sc->controller_dev != NULL); 271 272 sc->nand_if->write_1(sc->controller_dev, data); 273 } 274 275 static inline void 276 nand_read_2(device_t self, uint16_t *data) 277 { 278 struct nand_softc *sc = device_private(self); 279 280 KASSERT(sc->nand_if->read_2 != NULL); 281 KASSERT(sc->controller_dev != NULL); 282 283 sc->nand_if->read_2(sc->controller_dev, data); 284 } 285 286 static inline void 287 nand_write_2(device_t self, uint16_t data) 288 { 289 struct nand_softc *sc = device_private(self); 290 291 KASSERT(sc->nand_if->write_2 != NULL); 292 KASSERT(sc->controller_dev != NULL); 293 294 sc->nand_if->write_2(sc->controller_dev, data); 295 } 296 297 static inline void 298 nand_read_buf_1(device_t self, void *buf, size_t size) 299 { 300 struct nand_softc *sc = device_private(self); 301 302 KASSERT(sc->nand_if->read_buf_1 != NULL); 303 KASSERT(sc->controller_dev != NULL); 304 305 sc->nand_if->read_buf_1(sc->controller_dev, buf, size); 306 } 307 308 static inline void 309 nand_read_buf_2(device_t self, void *buf, size_t size) 310 { 311 struct nand_softc *sc = device_private(self); 312 313 KASSERT(sc->nand_if->read_buf_2 != NULL); 314 KASSERT(sc->controller_dev != NULL); 315 316 sc->nand_if->read_buf_2(sc->controller_dev, buf, size); 317 } 318 319 static inline void 320 nand_write_buf_1(device_t self, const void *buf, size_t size) 321 { 322 struct nand_softc *sc = device_private(self); 323 324 KASSERT(sc->nand_if->write_buf_1 != NULL); 325 KASSERT(sc->controller_dev != NULL); 326 327 sc->nand_if->write_buf_1(sc->controller_dev, buf, size); 328 } 329 330 static inline void 331 nand_write_buf_2(device_t self, const void *buf, size_t size) 332 { 333 struct nand_softc *sc = device_private(self); 334 335 KASSERT(sc->nand_if->write_buf_2 != NULL); 336 KASSERT(sc->controller_dev != NULL); 337 338 sc->nand_if->write_buf_2(sc->controller_dev, buf, size); 339 } 340 341 static inline int 342 nand_ecc_correct(device_t self, uint8_t *data, const uint8_t *oldcode, 343 const uint8_t *newcode) 344 { 345 struct nand_softc *sc = device_private(self); 346 347 KASSERT(sc->nand_if->ecc_correct != NULL); 348 KASSERT(sc->controller_dev != NULL); 349 350 return sc->nand_if->ecc_correct(sc->controller_dev, data, oldcode, newcode); 351 } 352 353 static inline void 354 nand_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 355 { 356 struct nand_softc *sc = device_private(self); 357 358 KASSERT(sc->nand_if->ecc_compute != NULL); 359 KASSERT(sc->controller_dev != NULL); 360 361 sc->nand_if->ecc_compute(sc->controller_dev, data, code); 362 } 363 364 static inline void 365 nand_ecc_prepare(device_t self, int mode) 366 { 367 struct nand_softc *sc = device_private(self); 368 369 KASSERT(sc->controller_dev != NULL); 370 371 if (sc->nand_if->ecc_prepare != NULL) 372 sc->nand_if->ecc_prepare(sc->controller_dev, mode); 373 } 374 375 static inline int 376 nand_program_page(device_t self, size_t offset, const uint8_t *data) 377 { 378 struct nand_softc *sc = device_private(self); 379 380 KASSERT(sc->nand_if->program_page != NULL); 381 382 return sc->nand_if->program_page(self, offset, data); 383 } 384 385 static inline int 386 nand_read_page(device_t self, size_t offset, uint8_t *data) 387 { 388 struct nand_softc *sc = device_private(self); 389 390 KASSERT(sc->nand_if->read_page != NULL); 391 392 return sc->nand_if->read_page(self, offset, data); 393 } 394 395 #if 0 396 static inline bool 397 nand_block_isbad(device_t self, flash_off_t block) 398 { 399 struct nand_softc *sc = device_private(self); 400 401 KASSERT(sc->nand_if->block_isbad != NULL); 402 KASSERT(sc->controller_dev != NULL); 403 404 return sc->nand_if->block_isbad(sc->controller_dev, block); 405 } 406 #endif 407 408 /* Manufacturer IDs defined by JEDEC */ 409 enum { 410 NAND_MFR_UNKNOWN = 0x00, 411 NAND_MFR_AMD = 0x01, 412 NAND_MFR_FUJITSU = 0x04, 413 NAND_MFR_RENESAS = 0x07, 414 NAND_MFR_STMICRO = 0x20, 415 NAND_MFR_MICRON = 0x2c, 416 NAND_MFR_NATIONAL = 0x8f, 417 NAND_MFR_TOSHIBA = 0x98, 418 NAND_MFR_HYNIX = 0xad, 419 NAND_MFR_SAMSUNG = 0xec 420 }; 421 422 struct nand_manufacturer { 423 int id; 424 const char *name; 425 }; 426 427 extern const struct nand_manufacturer nand_mfrs[]; 428 429 /* 430 * Manufacturer specific parameter functions 431 */ 432 int nand_read_parameters_micron(device_t, struct nand_chip *); 433 434 /* debug inlines */ 435 436 static inline void 437 nand_dump_data(const char *name, void *data, size_t len) 438 { 439 uint8_t *dump = data; 440 int i; 441 442 printf("dumping %s\n--------------\n", name); 443 for (i = 0; i < len; i++) { 444 printf("0x%.2hhx ", *dump); 445 dump++; 446 } 447 printf("\n--------------\n"); 448 } 449 450 /* flash interface implementation */ 451 int nand_flash_isbad(device_t, flash_off_t, bool *); 452 int nand_flash_markbad(device_t, flash_off_t); 453 int nand_flash_write(device_t, flash_off_t, size_t, size_t *, const u_char *); 454 int nand_flash_read(device_t, flash_off_t, size_t, size_t *, uint8_t *); 455 int nand_flash_erase(device_t, struct flash_erase_instruction *); 456 457 /* nand specific functions */ 458 int nand_erase_block(device_t, size_t); 459 460 int nand_io_submit(device_t, struct buf *); 461 void nand_sync_thread(void *); 462 int nand_sync_thread_start(device_t); 463 void nand_sync_thread_stop(device_t); 464 465 bool nand_isfactorybad(device_t, flash_off_t); 466 bool nand_iswornoutbad(device_t, flash_off_t); 467 bool nand_isbad(device_t, flash_off_t); 468 void nand_markbad(device_t, size_t); 469 470 //int nand_read_page(device_t, size_t, uint8_t *); 471 int nand_read_oob(device_t, size_t, uint8_t *); 472 //int nand_program_page(device_t, size_t, const uint8_t *); 473 474 device_t nand_attach_mi(struct nand_interface *, device_t); 475 void nand_init_interface(struct nand_interface *); 476 477 /* controller drivers may use these functions to get info about the chip */ 478 void nand_read_id(device_t, uint8_t *, uint8_t *); 479 int nand_read_parameter_page(device_t, struct onfi_parameter_page *); 480 481 /* 482 * default functions for driver development 483 */ 484 void nand_default_select(device_t, bool); 485 int nand_default_ecc_compute(device_t, const uint8_t *, uint8_t *); 486 int nand_default_ecc_correct(device_t, uint8_t *, const uint8_t *, 487 const uint8_t *); 488 int nand_default_read_page(device_t, size_t, uint8_t *); 489 int nand_default_program_page(device_t, size_t, const uint8_t *); 490 491 static inline void nand_busy(device_t); 492 static inline void nand_select(device_t, bool); 493 static inline void nand_command(device_t, uint8_t); 494 static inline void nand_address(device_t, uint32_t); 495 static inline void nand_read_buf_1(device_t, void *, size_t); 496 static inline void nand_read_buf_2(device_t, void *, size_t); 497 static inline void nand_read_1(device_t, uint8_t *); 498 static inline void nand_write_buf_1(device_t, const void *, size_t); 499 static inline void nand_write_buf_2(device_t, const void *, size_t); 500 //static inline bool nand_block_isbad(device_t, off_t); 501 //static inline void nand_block_markbad(device_t, off_t); 502 //static inline bool nand_isbusy(device_t); 503 504 #endif /* _NAND_H_ */ 505
Indexes created Wed Oct 01 19:09:53 GMT 2025