nand.h revision 1.15
1 /* $NetBSD: nand.h,v 1.15 2012/11/02 17:14:41 ahoka Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #ifndef _NAND_H_ 35 #define _NAND_H_ 36 37 #include <sys/param.h> 38 #include <sys/cdefs.h> 39 40 #include <sys/bufq.h> 41 #include <sys/buf.h> 42 #include <sys/time.h> 43 44 #include <dev/nand/onfi.h> 45 #include <dev/flash/flash.h> 46 #include <dev/flash/flash_io.h> 47 48 #ifdef NAND_DEBUG 49 #define DPRINTF(x) printf x 50 #else 51 #define DPRINTF(x) 52 #endif 53 54 /* same as in linux for compatibility */ 55 enum { 56 NAND_BAD_MARKER_OFFSET = 0, 57 NAND_BAD_MARKER_OFFSET_SMALL = 5 58 }; 59 60 /* feature flags use in nc_flags */ 61 enum { 62 NC_BUSWIDTH_16 = (1<<0), 63 NC_SOURCE_SYNC = (1<<2), 64 NC_INTERLEAVED_PE = (1<<1), 65 NC_INTERLEAVED_R = (1<<3), 66 NC_EXTENDED_PARAM = (1<<4) 67 }; 68 69 /* various quirks used in nc_quirks */ 70 enum { 71 NC_QUIRK_NO_READ_START = (1<<0) 72 }; 73 74 enum { 75 NAND_ECC_READ, 76 NAND_ECC_WRITE 77 }; 78 79 enum { 80 NAND_ECC_OK, 81 NAND_ECC_CORRECTED, 82 NAND_ECC_INVALID, 83 NAND_ECC_TWOBIT 84 }; 85 86 enum { 87 NAND_ECC_TYPE_HW, 88 NAND_ECC_TYPE_SW 89 }; 90 91 struct nand_bbt { 92 uint8_t *nbbt_bitmap; 93 size_t nbbt_size; 94 }; 95 96 struct nand_ecc { 97 size_t necc_offset; /* offset of ecc data in oob */ 98 size_t necc_size; /* size of ecc data in oob */ 99 size_t necc_block_size; /* block size used in ecc calc */ 100 size_t necc_code_size; /* reduntant bytes per block */ 101 int necc_steps; /* pagesize / code size */ 102 int necc_type; /* type of the ecc engine */ 103 }; 104 105 /** 106 * nand_chip: structure containing the required information 107 * about the NAND chip. 108 */ 109 struct nand_chip { 110 struct nand_ecc *nc_ecc; /* ecc information */ 111 uint8_t *nc_oob_cache; /* buffer for oob cache */ 112 uint8_t *nc_page_cache; /* buffer for page cache */ 113 uint8_t *nc_ecc_cache; /* buffer for ecc */ 114 uint64_t nc_size; /* storage size in bytes */ 115 uint32_t nc_page_size; /* page size in bytes */ 116 uint32_t nc_block_pages; /* block size in pages */ 117 uint32_t nc_block_size; /* block size in bytes */ 118 uint32_t nc_spare_size; /* spare (oob) size in bytes */ 119 uint32_t nc_lun_blocks; /* LUN size in blocks */ 120 uint32_t nc_flags; /* bitfield flags */ 121 uint32_t nc_quirks; /* bitfield quirks */ 122 uint32_t nc_page_shift; /* page shift for page alignment */ 123 uint32_t nc_page_mask; /* page mask for page alignment */ 124 uint32_t nc_block_shift; /* write shift */ 125 uint32_t nc_block_mask; /* write mask */ 126 uint8_t nc_num_luns; /* number of LUNs */ 127 uint8_t nc_manf_id; /* manufacturer id */ 128 uint8_t nc_dev_id; /* device id */ 129 uint8_t nc_addr_cycles_row; /* row cycles for addressing */ 130 uint8_t nc_addr_cycles_column; /* column cycles for addressing */ 131 uint8_t nc_badmarker_offs; /* offset for marking bad blocks */ 132 bool nc_isonfi; /* if the device is onfi compliant */ 133 }; 134 135 struct nand_write_cache { 136 struct bintime nwc_creation; 137 struct bintime nwc_last_write; 138 struct bufq_state *nwc_bufq; 139 uint8_t *nwc_data; 140 daddr_t nwc_block; 141 kmutex_t nwc_lock; 142 bool nwc_write_pending; 143 struct lwp *nwc_thread; 144 kcondvar_t nwc_cv; 145 bool nwc_exiting; 146 }; 147 148 /* driver softc for nand */ 149 struct nand_softc { 150 device_t sc_dev; 151 device_t controller_dev; 152 struct nand_interface *nand_if; 153 void *nand_softc; 154 struct nand_chip sc_chip; 155 struct nand_bbt sc_bbt; 156 size_t sc_part_offset; 157 size_t sc_part_size; 158 kmutex_t sc_device_lock; /* serialize access to chip */ 159 struct flash_io sc_flash_io; 160 }; 161 162 /* structure holding the nand api */ 163 struct nand_interface { 164 /* basic nand controller commands */ 165 void (*select) (device_t, bool); /* optional */ 166 void (*command) (device_t, uint8_t); 167 void (*address) (device_t, uint8_t); 168 void (*read_buf_1) (device_t, void *, size_t); 169 void (*read_buf_2) (device_t, void *, size_t); 170 void (*read_1) (device_t, uint8_t *); 171 void (*read_2) (device_t, uint16_t *); 172 void (*write_buf_1) (device_t, const void *, size_t); 173 void (*write_buf_2) (device_t, const void *, size_t); 174 void (*write_1) (device_t, uint8_t); 175 void (*write_2) (device_t, uint16_t); 176 void (*busy) (device_t); 177 178 /* "smart" controllers may override read/program functions */ 179 int (*read_page) (device_t, size_t, uint8_t *); /* optional */ 180 int (*program_page) (device_t, size_t, const uint8_t *); /* optional */ 181 182 /* functions specific to ecc computation */ 183 int (*ecc_prepare)(device_t, int); /* optional */ 184 int (*ecc_compute)(device_t, const uint8_t *, uint8_t *); 185 int (*ecc_correct)(device_t, uint8_t *, const uint8_t *, 186 const uint8_t *); 187 188 /* information for the ecc engine */ 189 struct nand_ecc ecc; 190 191 /* flash partition information */ 192 const struct flash_partition *part_info; 193 int part_num; 194 }; 195 196 /* attach args */ 197 struct nand_attach_args { 198 struct nand_interface *naa_nand_if; 199 }; 200 201 static inline void 202 nand_busy(device_t device) 203 { 204 struct nand_softc * const sc = device_private(device); 205 206 KASSERT(sc->nand_if->select != NULL); 207 KASSERT(sc->controller_dev != NULL); 208 209 sc->nand_if->select(sc->controller_dev, true); 210 211 if (sc->nand_if->busy != NULL) { 212 sc->nand_if->busy(sc->controller_dev); 213 } 214 215 sc->nand_if->select(sc->controller_dev, false); 216 } 217 218 static inline void 219 nand_select(device_t self, bool enable) 220 { 221 struct nand_softc * const sc = device_private(self); 222 223 KASSERT(sc->nand_if->select != NULL); 224 KASSERT(sc->controller_dev != NULL); 225 226 sc->nand_if->select(sc->controller_dev, enable); 227 } 228 229 static inline void 230 nand_address(device_t self, uint32_t address) 231 { 232 struct nand_softc * const sc = device_private(self); 233 234 KASSERT(sc->nand_if->address != NULL); 235 KASSERT(sc->controller_dev != NULL); 236 237 sc->nand_if->address(sc->controller_dev, address); 238 } 239 240 static inline void 241 nand_command(device_t self, uint8_t command) 242 { 243 struct nand_softc * const sc = device_private(self); 244 245 KASSERT(sc->nand_if->command != NULL); 246 KASSERT(sc->controller_dev != NULL); 247 248 sc->nand_if->command(sc->controller_dev, command); 249 } 250 251 static inline void 252 nand_read_1(device_t self, uint8_t *data) 253 { 254 struct nand_softc * const sc = device_private(self); 255 256 KASSERT(sc->nand_if->read_1 != NULL); 257 KASSERT(sc->controller_dev != NULL); 258 259 sc->nand_if->read_1(sc->controller_dev, data); 260 } 261 262 static inline void 263 nand_write_1(device_t self, uint8_t data) 264 { 265 struct nand_softc * const sc = device_private(self); 266 267 KASSERT(sc->nand_if->write_1 != NULL); 268 KASSERT(sc->controller_dev != NULL); 269 270 sc->nand_if->write_1(sc->controller_dev, data); 271 } 272 273 static inline void 274 nand_read_2(device_t self, uint16_t *data) 275 { 276 struct nand_softc * const sc = device_private(self); 277 278 KASSERT(sc->nand_if->read_2 != NULL); 279 KASSERT(sc->controller_dev != NULL); 280 281 sc->nand_if->read_2(sc->controller_dev, data); 282 } 283 284 static inline void 285 nand_write_2(device_t self, uint16_t data) 286 { 287 struct nand_softc * const sc = device_private(self); 288 289 KASSERT(sc->nand_if->write_2 != NULL); 290 KASSERT(sc->controller_dev != NULL); 291 292 sc->nand_if->write_2(sc->controller_dev, data); 293 } 294 295 static inline void 296 nand_read_buf_1(device_t self, void *buf, size_t size) 297 { 298 struct nand_softc * const sc = device_private(self); 299 300 KASSERT(sc->nand_if->read_buf_1 != NULL); 301 KASSERT(sc->controller_dev != NULL); 302 303 sc->nand_if->read_buf_1(sc->controller_dev, buf, size); 304 } 305 306 static inline void 307 nand_read_buf_2(device_t self, void *buf, size_t size) 308 { 309 struct nand_softc * const sc = device_private(self); 310 311 KASSERT(sc->nand_if->read_buf_2 != NULL); 312 KASSERT(sc->controller_dev != NULL); 313 314 sc->nand_if->read_buf_2(sc->controller_dev, buf, size); 315 } 316 317 static inline void 318 nand_write_buf_1(device_t self, const void *buf, size_t size) 319 { 320 struct nand_softc * const sc = device_private(self); 321 322 KASSERT(sc->nand_if->write_buf_1 != NULL); 323 KASSERT(sc->controller_dev != NULL); 324 325 sc->nand_if->write_buf_1(sc->controller_dev, buf, size); 326 } 327 328 static inline void 329 nand_write_buf_2(device_t self, const void *buf, size_t size) 330 { 331 struct nand_softc * const sc = device_private(self); 332 333 KASSERT(sc->nand_if->write_buf_2 != NULL); 334 KASSERT(sc->controller_dev != NULL); 335 336 sc->nand_if->write_buf_2(sc->controller_dev, buf, size); 337 } 338 339 static inline int 340 nand_ecc_correct(device_t self, uint8_t *data, const uint8_t *oldcode, 341 const uint8_t *newcode) 342 { 343 struct nand_softc * const sc = device_private(self); 344 345 KASSERT(sc->nand_if->ecc_correct != NULL); 346 KASSERT(sc->controller_dev != NULL); 347 348 return sc->nand_if->ecc_correct(sc->controller_dev, data, oldcode, newcode); 349 } 350 351 static inline void 352 nand_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 353 { 354 struct nand_softc * const sc = device_private(self); 355 356 KASSERT(sc->nand_if->ecc_compute != NULL); 357 KASSERT(sc->controller_dev != NULL); 358 359 sc->nand_if->ecc_compute(sc->controller_dev, data, code); 360 } 361 362 static inline void 363 nand_ecc_prepare(device_t self, int mode) 364 { 365 struct nand_softc * const sc = device_private(self); 366 367 KASSERT(sc->controller_dev != NULL); 368 369 if (sc->nand_if->ecc_prepare != NULL) 370 sc->nand_if->ecc_prepare(sc->controller_dev, mode); 371 } 372 373 static inline int 374 nand_program_page(device_t self, size_t offset, const uint8_t *data) 375 { 376 struct nand_softc * const sc = device_private(self); 377 378 KASSERT(sc->nand_if->program_page != NULL); 379 380 return sc->nand_if->program_page(self, offset, data); 381 } 382 383 static inline int 384 nand_read_page(device_t self, size_t offset, uint8_t *data) 385 { 386 struct nand_softc * const sc = device_private(self); 387 388 KASSERT(sc->nand_if->read_page != NULL); 389 390 return sc->nand_if->read_page(self, offset, data); 391 } 392 393 #if 0 394 static inline bool 395 nand_block_isbad(device_t self, flash_off_t block) 396 { 397 struct nand_softc * const sc = device_private(self); 398 399 KASSERT(sc->nand_if->block_isbad != NULL); 400 KASSERT(sc->controller_dev != NULL); 401 402 return sc->nand_if->block_isbad(sc->controller_dev, block); 403 } 404 #endif 405 406 /* Manufacturer IDs defined by JEDEC */ 407 enum { 408 NAND_MFR_UNKNOWN = 0x00, 409 NAND_MFR_AMD = 0x01, 410 NAND_MFR_FUJITSU = 0x04, 411 NAND_MFR_RENESAS = 0x07, 412 NAND_MFR_STMICRO = 0x20, 413 NAND_MFR_MICRON = 0x2c, 414 NAND_MFR_NATIONAL = 0x8f, 415 NAND_MFR_TOSHIBA = 0x98, 416 NAND_MFR_HYNIX = 0xad, 417 NAND_MFR_SAMSUNG = 0xec 418 }; 419 420 struct nand_manufacturer { 421 int id; 422 const char *name; 423 }; 424 425 extern const struct nand_manufacturer nand_mfrs[]; 426 427 /* 428 * Manufacturer specific parameter functions 429 */ 430 int nand_read_parameters_micron(device_t, struct nand_chip *); 431 int nand_read_parameters_samsung(device_t, struct nand_chip *); 432 433 /* debug inlines */ 434 435 static inline void 436 nand_dump_data(const char *name, void *data, size_t len) 437 { 438 uint8_t *dump = data; 439 int i; 440 441 printf("dumping %s\n--------------\n", name); 442 for (i = 0; i < len; i++) { 443 printf("0x%.2hhx ", *dump); 444 dump++; 445 } 446 printf("\n--------------\n"); 447 } 448 449 /* flash interface implementation */ 450 int nand_flash_isbad(device_t, flash_off_t, bool *); 451 int nand_flash_markbad(device_t, flash_off_t); 452 int nand_flash_write(device_t, flash_off_t, size_t, size_t *, const u_char *); 453 int nand_flash_read(device_t, flash_off_t, size_t, size_t *, uint8_t *); 454 int nand_flash_erase(device_t, struct flash_erase_instruction *); 455 int nand_flash_submit(device_t, struct buf *); 456 457 /* nand specific functions */ 458 int nand_erase_block(device_t, size_t); 459 460 bool nand_isfactorybad(device_t, flash_off_t); 461 bool nand_iswornoutbad(device_t, flash_off_t); 462 bool nand_isbad(device_t, flash_off_t); 463 void nand_markbad(device_t, size_t); 464 465 //int nand_read_page(device_t, size_t, uint8_t *); 466 int nand_read_oob(device_t, size_t, uint8_t *); 467 //int nand_program_page(device_t, size_t, const uint8_t *); 468 469 device_t nand_attach_mi(struct nand_interface *, device_t); 470 void nand_init_interface(struct nand_interface *); 471 472 /* controller drivers may use these functions to get info about the chip */ 473 void nand_read_id(device_t, uint8_t *, uint8_t *); 474 int nand_read_parameter_page(device_t, struct onfi_parameter_page *); 475 476 /* 477 * default functions for driver development 478 */ 479 void nand_default_select(device_t, bool); 480 int nand_default_ecc_compute(device_t, const uint8_t *, uint8_t *); 481 int nand_default_ecc_correct(device_t, uint8_t *, const uint8_t *, 482 const uint8_t *); 483 int nand_default_read_page(device_t, size_t, uint8_t *); 484 int nand_default_program_page(device_t, size_t, const uint8_t *); 485 486 static inline void nand_busy(device_t); 487 static inline void nand_select(device_t, bool); 488 static inline void nand_command(device_t, uint8_t); 489 static inline void nand_address(device_t, uint32_t); 490 static inline void nand_read_buf_1(device_t, void *, size_t); 491 static inline void nand_read_buf_2(device_t, void *, size_t); 492 static inline void nand_read_1(device_t, uint8_t *); 493 static inline void nand_write_buf_1(device_t, const void *, size_t); 494 static inline void nand_write_buf_2(device_t, const void *, size_t); 495 //static inline bool nand_block_isbad(device_t, off_t); 496 //static inline void nand_block_markbad(device_t, off_t); 497 //static inline bool nand_isbusy(device_t); 498 499 #endif /* _NAND_H_ */ 500
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