1 1.1 jmcneill /* $NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2012-2017 The NetBSD Foundation, Inc. 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation 8 1.1 jmcneill * by Adam Hoka. 9 1.1 jmcneill * 10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 11 1.1 jmcneill * modification, are permitted provided that the following conditions 12 1.1 jmcneill * are met: 13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 14 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 17 1.1 jmcneill * documentation and/or other materials provided with the distribution. 18 1.1 jmcneill * 19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE. 30 1.1 jmcneill */ 31 1.1 jmcneill 32 1.1 jmcneill /* 33 1.1 jmcneill * Device specific functions for legacy Toshiba NAND chips 34 1.1 jmcneill */ 35 1.1 jmcneill 36 1.1 jmcneill #include <sys/cdefs.h> 37 1.1 jmcneill __KERNEL_RCSID(0, "$NetBSD: nand_toshiba.c,v 1.1 2017/11/09 21:50:15 jmcneill Exp $"); 38 1.1 jmcneill 39 1.1 jmcneill #include "nand.h" 40 1.1 jmcneill #include "onfi.h" 41 1.1 jmcneill 42 1.1 jmcneill enum { 43 1.1 jmcneill NAND_TOSHIBA_PAGEMASK = 0x3, 44 1.1 jmcneill NAND_TOSHIBA_OOBMASK = 0x1 << 2, 45 1.1 jmcneill NAND_TOSHIBA_BLOCKMASK = 0x3 << 4, 46 1.1 jmcneill NAND_TOSHIBA_BITSMASK = 0x1 << 6 47 1.1 jmcneill }; 48 1.1 jmcneill 49 1.1 jmcneill enum { 50 1.1 jmcneill NAND_TOSHIBA_PLANENUMMASK = 0x3 << 2 51 1.1 jmcneill }; 52 1.1 jmcneill 53 1.1 jmcneill int 54 1.1 jmcneill nand_read_parameters_toshiba(device_t self, struct nand_chip * const chip) 55 1.1 jmcneill { 56 1.1 jmcneill uint8_t mfgrid; 57 1.1 jmcneill uint8_t devid; 58 1.1 jmcneill uint8_t params1; 59 1.1 jmcneill uint8_t params2; 60 1.1 jmcneill uint8_t params3; 61 1.1 jmcneill 62 1.1 jmcneill nand_select(self, true); 63 1.1 jmcneill nand_command(self, ONFI_READ_ID); 64 1.1 jmcneill nand_address(self, 0x00); 65 1.1 jmcneill nand_read_1(self, &mfgrid); 66 1.1 jmcneill nand_read_1(self, &devid); 67 1.1 jmcneill nand_read_1(self, ¶ms1); 68 1.1 jmcneill nand_read_1(self, ¶ms2); 69 1.1 jmcneill nand_read_1(self, ¶ms3); 70 1.1 jmcneill nand_select(self, false); 71 1.1 jmcneill 72 1.1 jmcneill aprint_debug_dev(self, 73 1.1 jmcneill "ID Definition table: 0x%2.x 0x%2.x 0x%2.x 0x%2.x 0x%2.x\n", 74 1.1 jmcneill mfgrid, devid, params1, params2, params3); 75 1.1 jmcneill 76 1.1 jmcneill if (devid == 0xdc) { 77 1.1 jmcneill /* From the documentation */ 78 1.1 jmcneill chip->nc_addr_cycles_column = 2; 79 1.1 jmcneill chip->nc_addr_cycles_row = 3; 80 1.1 jmcneill chip->nc_lun_blocks = 2048; 81 1.1 jmcneill 82 1.1 jmcneill switch (params2 & NAND_TOSHIBA_PAGEMASK) { 83 1.1 jmcneill case 0x0: 84 1.1 jmcneill chip->nc_page_size = 1024; 85 1.1 jmcneill break; 86 1.1 jmcneill case 0x1: 87 1.1 jmcneill chip->nc_page_size = 2048; 88 1.1 jmcneill break; 89 1.1 jmcneill case 0x2: 90 1.1 jmcneill chip->nc_page_size = 4096; 91 1.1 jmcneill break; 92 1.1 jmcneill case 0x3: 93 1.1 jmcneill chip->nc_page_size = 8192; 94 1.1 jmcneill break; 95 1.1 jmcneill default: 96 1.1 jmcneill KASSERTMSG(false, "ID Data parsing bug detected!"); 97 1.1 jmcneill } 98 1.1 jmcneill 99 1.1 jmcneill chip->nc_spare_size = 100 1.1 jmcneill (8 << __SHIFTOUT(params2, NAND_TOSHIBA_OOBMASK)) * 101 1.1 jmcneill (chip->nc_page_size >> 9); 102 1.1 jmcneill 103 1.1 jmcneill switch ((params2 & NAND_TOSHIBA_BLOCKMASK) >> 4) { 104 1.1 jmcneill case 0x0: 105 1.1 jmcneill chip->nc_block_size = 64 * 1024; 106 1.1 jmcneill break; 107 1.1 jmcneill case 0x1: 108 1.1 jmcneill chip->nc_block_size = 128 * 1024; 109 1.1 jmcneill break; 110 1.1 jmcneill case 0x2: 111 1.1 jmcneill chip->nc_block_size = 256 * 1024; 112 1.1 jmcneill break; 113 1.1 jmcneill case 0x3: 114 1.1 jmcneill chip->nc_block_size = 512 * 1024; 115 1.1 jmcneill break; 116 1.1 jmcneill default: 117 1.1 jmcneill KASSERTMSG(false, "ID Data parsing bug detected!"); 118 1.1 jmcneill } 119 1.1 jmcneill 120 1.1 jmcneill switch ((params2 & NAND_TOSHIBA_BITSMASK) >> 6) { 121 1.1 jmcneill case 0x0: 122 1.1 jmcneill /* its an 8bit chip */ 123 1.1 jmcneill break; 124 1.1 jmcneill case 0x1: 125 1.1 jmcneill chip->nc_flags |= NC_BUSWIDTH_16; 126 1.1 jmcneill break; 127 1.1 jmcneill default: 128 1.1 jmcneill KASSERTMSG(false, "ID Data parsing bug detected!"); 129 1.1 jmcneill } 130 1.1 jmcneill 131 1.1 jmcneill switch ((params3 & NAND_TOSHIBA_PLANENUMMASK) >> 2) { 132 1.1 jmcneill case 0x0: 133 1.1 jmcneill chip->nc_num_luns = 1; 134 1.1 jmcneill break; 135 1.1 jmcneill case 0x1: 136 1.1 jmcneill chip->nc_num_luns = 2; 137 1.1 jmcneill break; 138 1.1 jmcneill case 0x2: 139 1.1 jmcneill chip->nc_num_luns = 4; 140 1.1 jmcneill break; 141 1.1 jmcneill case 0x3: 142 1.1 jmcneill chip->nc_num_luns = 8; 143 1.1 jmcneill break; 144 1.1 jmcneill default: 145 1.1 jmcneill KASSERTMSG(false, "ID Data parsing bug detected!"); 146 1.1 jmcneill } 147 1.1 jmcneill 148 1.1 jmcneill chip->nc_size = (uint64_t)chip->nc_lun_blocks * 149 1.1 jmcneill chip->nc_block_size; 150 1.1 jmcneill } else { 151 1.1 jmcneill return 1; 152 1.1 jmcneill } 153 1.1 jmcneill 154 1.1 jmcneill return 0; 155 1.1 jmcneill } 156