onfi.h revision 1.3 1 1.3 msaitoh /* $NetBSD: onfi.h,v 1.3 2021/12/05 04:57:38 msaitoh Exp $ */
2 1.1 ahoka
3 1.1 ahoka /*-
4 1.1 ahoka * Copyright (c) 2010 Department of Software Engineering,
5 1.1 ahoka * University of Szeged, Hungary
6 1.1 ahoka * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org>
7 1.1 ahoka * All rights reserved.
8 1.1 ahoka *
9 1.1 ahoka * This code is derived from software contributed to The NetBSD Foundation
10 1.1 ahoka * by the Department of Software Engineering, University of Szeged, Hungary
11 1.1 ahoka *
12 1.1 ahoka * Redistribution and use in source and binary forms, with or without
13 1.1 ahoka * modification, are permitted provided that the following conditions
14 1.1 ahoka * are met:
15 1.1 ahoka * 1. Redistributions of source code must retain the above copyright
16 1.1 ahoka * notice, this list of conditions and the following disclaimer.
17 1.1 ahoka * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 ahoka * notice, this list of conditions and the following disclaimer in the
19 1.1 ahoka * documentation and/or other materials provided with the distribution.
20 1.1 ahoka *
21 1.1 ahoka * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ahoka * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ahoka * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ahoka * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ahoka * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 1.1 ahoka * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 1.1 ahoka * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 1.1 ahoka * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 1.1 ahoka * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 ahoka * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 1.1 ahoka * SUCH DAMAGE.
32 1.1 ahoka */
33 1.1 ahoka
34 1.1 ahoka #ifndef _ONFI_H_
35 1.1 ahoka #define _ONFI_H_
36 1.1 ahoka
37 1.1 ahoka /**
38 1.1 ahoka * ONFI 2.2, Section 5.1: Command Set
39 1.1 ahoka *
40 1.1 ahoka * Indented ones are 2nd or 3rd cycle commands.
41 1.1 ahoka */
42 1.1 ahoka
43 1.1 ahoka enum {
44 1.1 ahoka ONFI_READ = 0x00, /* M */
45 1.1 ahoka ONFI_READ_START = 0x30, /* M */
46 1.1 ahoka ONFI_READ_INTERLEAVED = 0x32, /* O */
47 1.1 ahoka ONFI_READ_COPYBACK = 0x35, /* O */
48 1.1 ahoka ONFI_READ_CACHE_RANDOM = 0x31, /* O */
49 1.1 ahoka
50 1.1 ahoka ONFI_CHANGE_READ_COLUMN = 0x05, /* M */
51 1.1 ahoka ONFI_CHANGE_READ_COLUMN_ENHANCED = 0x06, /* O */
52 1.1 ahoka ONFI_CHANGE_READ_COLUMN_START = 0xe0, /* M */
53 1.1 ahoka
54 1.1 ahoka ONFI_READ_CACHE_SEQUENTIAL = 0x31, /* O */
55 1.1 ahoka ONFI_READ_CACHE_END = 0x3f, /* O */
56 1.1 ahoka
57 1.1 ahoka ONFI_BLOCK_ERASE = 0x60, /* M */
58 1.1 ahoka ONFI_BLOCK_ERASE_START = 0xd0, /* M */
59 1.1 ahoka ONFI_BLOCK_ERASE_INTERLEAVED = 0xd1, /* O */
60 1.1 ahoka
61 1.1 ahoka ONFI_READ_STATUS = 0x70, /* M */
62 1.1 ahoka ONFI_READ_STATUS_ENHANCED = 0x78, /* O */
63 1.1 ahoka
64 1.1 ahoka ONFI_PAGE_PROGRAM = 0x80, /* M */
65 1.1 ahoka ONFI_PAGE_PROGRAM_START = 0x10, /* M */
66 1.1 ahoka ONFI_PAGE_PROGRAM_INTERLEAVED = 0x11, /* O */
67 1.1 ahoka ONFI_PAGE_CACHE_PROGRAM = 0x15, /* O */
68 1.1 ahoka
69 1.1 ahoka ONFI_COPYBACK_PROGRAM = 0x85, /* O */
70 1.1 ahoka ONFI_COPYBACK_PROGRAM_START = 0x10, /* O */
71 1.1 ahoka ONFI_COPYBACK_PROGRAM_INTERLEAVED = 0x11, /* O */
72 1.1 ahoka /*-
73 1.1 ahoka * Small Data's first opcode may be 80h if the operation is a program only
74 1.1 ahoka * with no data output. For the last second cycle of a Small Data Move,
75 1.1 ahoka * it is a 10h command to confirm the Program or Copyback operation
76 1.1 ahoka */
77 1.1 ahoka ONFI_SMALL_DATA_MOVE = 0x85, /* O */
78 1.1 ahoka ONFI_SMALL_DATA_MOVE_START = 0x11, /* O */
79 1.1 ahoka
80 1.1 ahoka ONFI_CHANGE_WRITE_COLUMN = 0x85, /* M */
81 1.1 ahoka ONFI_CHANGE_ROW_ADDRESS = 0x85, /* O */
82 1.1 ahoka
83 1.1 ahoka ONFI_READ_ID = 0x90, /* M */
84 1.1 ahoka ONFI_READ_PARAMETER_PAGE = 0xec, /* M */
85 1.1 ahoka ONFI_READ_UNIQUE_ID = 0xed, /* O */
86 1.1 ahoka ONFI_GET_FEATURES = 0xee, /* O */
87 1.1 ahoka ONFI_SET_FEATURES = 0xef, /* O */
88 1.1 ahoka ONFI_RESET_LUN = 0xfa, /* O */
89 1.1 ahoka ONFI_SYNCHRONOUS_RESET = 0xfc, /* O */
90 1.1 ahoka ONFI_RESET = 0xff /* M */
91 1.1 ahoka };
92 1.1 ahoka
93 1.1 ahoka /**
94 1.1 ahoka * status codes from ONFI_READ_STATUS
95 1.1 ahoka */
96 1.1 ahoka enum {
97 1.1 ahoka ONFI_STATUS_FAIL = (1<<0),
98 1.1 ahoka ONFI_STATUS_FAILC = (1<<1),
99 1.1 ahoka ONFI_STATUS_R = (1<<2),
100 1.1 ahoka ONFI_STATUS_CSP = (1<<3),
101 1.1 ahoka ONFI_STATUS_VSP = (1<<4),
102 1.1 ahoka ONFI_STATUS_ARDY = (1<<5),
103 1.1 ahoka ONFI_STATUS_RDY = (1<<6),
104 1.1 ahoka ONFI_STATUS_WP = (1<<7)
105 1.1 ahoka };
106 1.1 ahoka
107 1.1 ahoka enum {
108 1.1 ahoka ONFI_FEATURE_16BIT = (1<<0),
109 1.1 ahoka ONFI_FEATURE_EXTENDED_PARAM = (1<<7)
110 1.1 ahoka };
111 1.1 ahoka
112 1.1 ahoka /* 5.7.1. Parameter Page Data Structure Definition */
113 1.1 ahoka struct onfi_parameter_page {
114 1.1 ahoka /* Revision information and features block */
115 1.1 ahoka uint32_t param_signature; /* M: onfi signature ({'O','N','F','I'}) */
116 1.1 ahoka uint16_t param_revision; /* M: revision number */
117 1.1 ahoka uint16_t param_features; /* M: features supported */
118 1.1 ahoka uint16_t param_optional_cmds; /* M: optional commands */
119 1.1 ahoka uint16_t param_reserved_1; /* R: reserved */
120 1.2 msaitoh uint16_t param_extended_len; /* O: extended parameter page length */
121 1.1 ahoka uint8_t param_num_param_pg; /* O: number of parameter pages */
122 1.1 ahoka uint8_t param_reserved_2[17]; /* R: reserved */
123 1.1 ahoka /* Manufacturer information block */
124 1.1 ahoka uint8_t param_manufacturer[12]; /* M: device manufacturer (ASCII) */
125 1.1 ahoka uint8_t param_model[20]; /* M: device model (ASCII) */
126 1.1 ahoka uint8_t param_manufacturer_id; /* M: JEDEC ID of manufacturer */
127 1.1 ahoka uint16_t param_date; /* O: date code (BCD) */
128 1.1 ahoka uint8_t param_reserved_3[13]; /* R: reserved */
129 1.1 ahoka /* Memory organization block */
130 1.1 ahoka uint32_t param_pagesize; /* M: number of data bytes per page */
131 1.1 ahoka uint16_t param_sparesize; /* M: number of spare bytes per page */
132 1.1 ahoka uint32_t param_part_pagesize; /* O: obsolete */
133 1.1 ahoka uint16_t param_part_sparesize; /* O: obsolete */
134 1.1 ahoka uint32_t param_blocksize; /* M: number of pages per block */
135 1.1 ahoka uint32_t param_lunsize; /* M: number of blocks per LUN */
136 1.1 ahoka uint8_t param_numluns; /* M: number of LUNs */
137 1.1 ahoka uint8_t param_addr_cycles; /* M: address cycles:
138 1.1 ahoka col: 4-7 (high), row: 0-3 (low) */
139 1.1 ahoka uint8_t param_cellsize; /* M: number of bits per cell */
140 1.1 ahoka uint16_t param_lun_maxbad; /* M: maximum badblocks per LUN */
141 1.1 ahoka uint16_t param_block_endurance; /* M: block endurance */
142 1.1 ahoka uint8_t param_guaranteed_blocks; /* M: guaranteed valid blocks at
143 1.1 ahoka begginning of target */
144 1.1 ahoka uint16_t param_guaranteed_endurance; /* M: block endurance of
145 1.3 msaitoh guaranteed blocks */
146 1.1 ahoka uint8_t param_programs_per_page; /* M: number of programs per page */
147 1.1 ahoka uint8_t param_partial_programming_attr; /* O: obsolete */
148 1.1 ahoka uint8_t param_ecc_correctable_bits; /* M: number of bits
149 1.1 ahoka ECC correctability */
150 1.1 ahoka uint8_t param_interleaved_addr_bits; /* M: num of interleaved address
151 1.1 ahoka bits (only low half is valid) */
152 1.1 ahoka uint8_t param_interleaved_op_attrs; /* O: obsolete */
153 1.1 ahoka uint8_t param_reserved_4[13]; /* R: reserved */
154 1.1 ahoka /* Electrical parameters block */
155 1.1 ahoka uint8_t param_io_c_max; /* M: I/O pin capacitance, maximum */
156 1.1 ahoka uint16_t param_async_timing_mode; /* M: async timing mode support */
157 1.1 ahoka uint16_t param_async_progcache_timing_mode; /* O: obsolete */
158 1.1 ahoka uint16_t param_t_prog; /* M: maximum page program time (us) */
159 1.1 ahoka uint16_t param_t_bers; /* M: maximum block erase time (us) */
160 1.1 ahoka uint16_t param_t_r; /* M: maximum page read time (us) */
161 1.1 ahoka uint16_t param_ccs; /* M: minimum change column setup time (ns) */
162 1.1 ahoka uint16_t param_sync_timing_mode; /* source sync timing mode support */
163 1.1 ahoka uint8_t param_sync_features; /* M: source sync features */
164 1.1 ahoka uint16_t param_clk_input_c; /* O: CLK input pin cap., typical */
165 1.1 ahoka uint16_t param_io_c; /* O: I/O pin capacitance, typical */
166 1.1 ahoka uint16_t param_input_c; /* O: input pin capacitance, typical */
167 1.1 ahoka uint8_t param_input_c_max; /* M: input pin capacitance, maximum */
168 1.1 ahoka uint8_t param_driver_strength; /* M: driver strength support */
169 1.1 ahoka uint16_t param_t_r_interleaved; /* O: maximum interleaved
170 1.1 ahoka page read time (us) */
171 1.1 ahoka uint16_t param_t_adl; /* O: program page register clear enhancement
172 1.1 ahoka tADL value (ns) */
173 1.1 ahoka uint8_t param_reserved_5[8]; /* R: reserved */
174 1.1 ahoka /* Vendor block */
175 1.1 ahoka uint16_t param_vendor_revision; /* M: vendor specific rev number */
176 1.1 ahoka uint8_t param_vendor_specific[88]; /* vendor specific information */
177 1.1 ahoka uint16_t param_integrity_crc; /* M: integrity CRC */
178 1.1 ahoka } __packed;
179 1.1 ahoka
180 1.1 ahoka #endif /* _ONFI_H_ */
181