onfi.h revision 1.2
1 /* $NetBSD: onfi.h,v 1.2 2019/12/26 04:53:12 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka (at) NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #ifndef _ONFI_H_ 35 #define _ONFI_H_ 36 37 /** 38 * ONFI 2.2, Section 5.1: Command Set 39 * 40 * Indented ones are 2nd or 3rd cycle commands. 41 */ 42 43 enum { 44 ONFI_READ = 0x00, /* M */ 45 ONFI_READ_START = 0x30, /* M */ 46 ONFI_READ_INTERLEAVED = 0x32, /* O */ 47 ONFI_READ_COPYBACK = 0x35, /* O */ 48 ONFI_READ_CACHE_RANDOM = 0x31, /* O */ 49 50 ONFI_CHANGE_READ_COLUMN = 0x05, /* M */ 51 ONFI_CHANGE_READ_COLUMN_ENHANCED = 0x06, /* O */ 52 ONFI_CHANGE_READ_COLUMN_START = 0xe0, /* M */ 53 54 ONFI_READ_CACHE_SEQUENTIAL = 0x31, /* O */ 55 ONFI_READ_CACHE_END = 0x3f, /* O */ 56 57 ONFI_BLOCK_ERASE = 0x60, /* M */ 58 ONFI_BLOCK_ERASE_START = 0xd0, /* M */ 59 ONFI_BLOCK_ERASE_INTERLEAVED = 0xd1, /* O */ 60 61 ONFI_READ_STATUS = 0x70, /* M */ 62 ONFI_READ_STATUS_ENHANCED = 0x78, /* O */ 63 64 ONFI_PAGE_PROGRAM = 0x80, /* M */ 65 ONFI_PAGE_PROGRAM_START = 0x10, /* M */ 66 ONFI_PAGE_PROGRAM_INTERLEAVED = 0x11, /* O */ 67 ONFI_PAGE_CACHE_PROGRAM = 0x15, /* O */ 68 69 ONFI_COPYBACK_PROGRAM = 0x85, /* O */ 70 ONFI_COPYBACK_PROGRAM_START = 0x10, /* O */ 71 ONFI_COPYBACK_PROGRAM_INTERLEAVED = 0x11, /* O */ 72 /*- 73 * Small Data's first opcode may be 80h if the operation is a program only 74 * with no data output. For the last second cycle of a Small Data Move, 75 * it is a 10h command to confirm the Program or Copyback operation 76 */ 77 ONFI_SMALL_DATA_MOVE = 0x85, /* O */ 78 ONFI_SMALL_DATA_MOVE_START = 0x11, /* O */ 79 80 ONFI_CHANGE_WRITE_COLUMN = 0x85, /* M */ 81 ONFI_CHANGE_ROW_ADDRESS = 0x85, /* O */ 82 83 ONFI_READ_ID = 0x90, /* M */ 84 ONFI_READ_PARAMETER_PAGE = 0xec, /* M */ 85 ONFI_READ_UNIQUE_ID = 0xed, /* O */ 86 ONFI_GET_FEATURES = 0xee, /* O */ 87 ONFI_SET_FEATURES = 0xef, /* O */ 88 ONFI_RESET_LUN = 0xfa, /* O */ 89 ONFI_SYNCHRONOUS_RESET = 0xfc, /* O */ 90 ONFI_RESET = 0xff /* M */ 91 }; 92 93 /** 94 * status codes from ONFI_READ_STATUS 95 */ 96 enum { 97 ONFI_STATUS_FAIL = (1<<0), 98 ONFI_STATUS_FAILC = (1<<1), 99 ONFI_STATUS_R = (1<<2), 100 ONFI_STATUS_CSP = (1<<3), 101 ONFI_STATUS_VSP = (1<<4), 102 ONFI_STATUS_ARDY = (1<<5), 103 ONFI_STATUS_RDY = (1<<6), 104 ONFI_STATUS_WP = (1<<7) 105 }; 106 107 enum { 108 ONFI_FEATURE_16BIT = (1<<0), 109 ONFI_FEATURE_EXTENDED_PARAM = (1<<7) 110 }; 111 112 /* 5.7.1. Parameter Page Data Structure Definition */ 113 struct onfi_parameter_page { 114 /* Revision information and features block */ 115 uint32_t param_signature; /* M: onfi signature ({'O','N','F','I'}) */ 116 uint16_t param_revision; /* M: revision number */ 117 uint16_t param_features; /* M: features supported */ 118 uint16_t param_optional_cmds; /* M: optional commands */ 119 uint16_t param_reserved_1; /* R: reserved */ 120 uint16_t param_extended_len; /* O: extended parameter page length */ 121 uint8_t param_num_param_pg; /* O: number of parameter pages */ 122 uint8_t param_reserved_2[17]; /* R: reserved */ 123 /* Manufacturer information block */ 124 uint8_t param_manufacturer[12]; /* M: device manufacturer (ASCII) */ 125 uint8_t param_model[20]; /* M: device model (ASCII) */ 126 uint8_t param_manufacturer_id; /* M: JEDEC ID of manufacturer */ 127 uint16_t param_date; /* O: date code (BCD) */ 128 uint8_t param_reserved_3[13]; /* R: reserved */ 129 /* Memory organization block */ 130 uint32_t param_pagesize; /* M: number of data bytes per page */ 131 uint16_t param_sparesize; /* M: number of spare bytes per page */ 132 uint32_t param_part_pagesize; /* O: obsolete */ 133 uint16_t param_part_sparesize; /* O: obsolete */ 134 uint32_t param_blocksize; /* M: number of pages per block */ 135 uint32_t param_lunsize; /* M: number of blocks per LUN */ 136 uint8_t param_numluns; /* M: number of LUNs */ 137 uint8_t param_addr_cycles; /* M: address cycles: 138 col: 4-7 (high), row: 0-3 (low) */ 139 uint8_t param_cellsize; /* M: number of bits per cell */ 140 uint16_t param_lun_maxbad; /* M: maximum badblocks per LUN */ 141 uint16_t param_block_endurance; /* M: block endurance */ 142 uint8_t param_guaranteed_blocks; /* M: guaranteed valid blocks at 143 begginning of target */ 144 uint16_t param_guaranteed_endurance; /* M: block endurance of 145 guranteed blocks */ 146 uint8_t param_programs_per_page; /* M: number of programs per page */ 147 uint8_t param_partial_programming_attr; /* O: obsolete */ 148 uint8_t param_ecc_correctable_bits; /* M: number of bits 149 ECC correctability */ 150 uint8_t param_interleaved_addr_bits; /* M: num of interleaved address 151 bits (only low half is valid) */ 152 uint8_t param_interleaved_op_attrs; /* O: obsolete */ 153 uint8_t param_reserved_4[13]; /* R: reserved */ 154 /* Electrical parameters block */ 155 uint8_t param_io_c_max; /* M: I/O pin capacitance, maximum */ 156 uint16_t param_async_timing_mode; /* M: async timing mode support */ 157 uint16_t param_async_progcache_timing_mode; /* O: obsolete */ 158 uint16_t param_t_prog; /* M: maximum page program time (us) */ 159 uint16_t param_t_bers; /* M: maximum block erase time (us) */ 160 uint16_t param_t_r; /* M: maximum page read time (us) */ 161 uint16_t param_ccs; /* M: minimum change column setup time (ns) */ 162 uint16_t param_sync_timing_mode; /* source sync timing mode support */ 163 uint8_t param_sync_features; /* M: source sync features */ 164 uint16_t param_clk_input_c; /* O: CLK input pin cap., typical */ 165 uint16_t param_io_c; /* O: I/O pin capacitance, typical */ 166 uint16_t param_input_c; /* O: input pin capacitance, typical */ 167 uint8_t param_input_c_max; /* M: input pin capacitance, maximum */ 168 uint8_t param_driver_strength; /* M: driver strength support */ 169 uint16_t param_t_r_interleaved; /* O: maximum interleaved 170 page read time (us) */ 171 uint16_t param_t_adl; /* O: program page register clear enhancement 172 tADL value (ns) */ 173 uint8_t param_reserved_5[8]; /* R: reserved */ 174 /* Vendor block */ 175 uint16_t param_vendor_revision; /* M: vendor specific rev number */ 176 uint8_t param_vendor_specific[88]; /* vendor specific information */ 177 uint16_t param_integrity_crc; /* M: integrity CRC */ 178 } __packed; 179 180 #endif /* _ONFI_H_ */ 181
Indexes created Wed Sep 24 05:09:52 GMT 2025