cfi.c revision 1.7
1 /* $NetBSD: cfi.c,v 1.7 2011/12/17 19:42:41 phx Exp $ */ 2 /*- 3 * Copyright (c) 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Cliff Neighbors. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include "opt_flash.h" 32 #include "opt_nor.h" 33 #include "opt_cfi.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cfi.c,v 1.7 2011/12/17 19:42:41 phx Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/cdefs.h> 41 #include <sys/device.h> 42 #include <sys/endian.h> 43 44 #include <sys/bus.h> 45 46 #include <dev/nor/nor.h> 47 #include <dev/nor/cfi.h> 48 #include <dev/nor/cfi_0002.h> 49 50 51 static int cfi_scan_media(device_t self, struct nor_chip *chip); 52 static void cfi_init(device_t); 53 static void cfi_select(device_t, bool); 54 static void cfi_read_1(device_t, flash_off_t, uint8_t *); 55 static void cfi_read_2(device_t, flash_off_t, uint16_t *); 56 static void cfi_read_4(device_t, flash_off_t, uint32_t *); 57 static void cfi_read_buf_1(device_t, flash_off_t, uint8_t *, size_t); 58 static void cfi_read_buf_2(device_t, flash_off_t, uint16_t *, size_t); 59 static void cfi_read_buf_4(device_t, flash_off_t, uint32_t *, size_t); 60 static void cfi_write_1(device_t, flash_off_t, uint8_t); 61 static void cfi_write_2(device_t, flash_off_t, uint16_t); 62 static void cfi_write_4(device_t, flash_off_t, uint32_t); 63 static void cfi_write_buf_1(device_t, flash_off_t, const uint8_t *, size_t); 64 static void cfi_write_buf_2(device_t, flash_off_t, const uint16_t *, size_t); 65 static void cfi_write_buf_4(device_t, flash_off_t, const uint32_t *, size_t); 66 static uint8_t cfi_read_qry(struct cfi * const, bus_size_t); 67 static bool cfi_jedec_id(struct cfi * const); 68 static bool cfi_emulate(struct cfi * const); 69 static const struct cfi_jedec_tab * cfi_jedec_search(struct cfi *); 70 static void cfi_jedec_fill(struct cfi * const, 71 const struct cfi_jedec_tab *); 72 #if defined(CFI_DEBUG_JEDEC) || defined(CFI_DEBUG_QRY) 73 static void cfi_hexdump(flash_off_t, void * const, u_int, u_int); 74 #endif 75 76 #define LOG2_64K 16 77 #define LOG2_128K 17 78 #define LOG2_256K 18 79 #define LOG2_512K 19 80 #define LOG2_1M 20 81 #define LOG2_2M 21 82 #define LOG2_4M 22 83 #define LOG2_8M 23 84 #define LOG2_16M 24 85 #define LOG2_32M 25 86 #define LOG2_64M 26 87 #define LOG2_128M 27 88 #define LOG2_256M 28 89 #define LOG2_512M 29 90 #define LOG2_1G 30 91 #define LOG2_2G 31 92 const struct cfi_jedec_tab cfi_jedec_tab[] = { 93 { 94 .jt_name = "Pm39LV512", 95 .jt_mid = 0x9d, 96 .jt_did = 0x1b, 97 .jt_id_pri = 0, /* XXX */ 98 .jt_id_alt = 0, /* XXX */ 99 .jt_device_size = LOG2_64K, 100 .jt_interface_code_desc = CFI_IFCODE_X8, 101 .jt_erase_blk_regions = 1, 102 .jt_erase_blk_info = { 103 { 4096/256, (64/4)-1 }, 104 }, 105 .jt_write_word_time_typ = 40, 106 .jt_write_nbyte_time_typ = 0, 107 .jt_erase_blk_time_typ = 55, 108 .jt_erase_chip_time_typ = 55, 109 .jt_write_word_time_max = 1, 110 .jt_write_nbyte_time_max = 0, 111 .jt_erase_blk_time_max = 1, 112 .jt_erase_chip_time_max = 1, 113 }, 114 { 115 .jt_name = "Pm39LV010", 116 .jt_mid = 0x9d, 117 .jt_did = 0x1c, 118 .jt_id_pri = 0, /* XXX */ 119 .jt_id_alt = 0, /* XXX */ 120 .jt_device_size = LOG2_128K, 121 .jt_interface_code_desc = CFI_IFCODE_X8, 122 .jt_erase_blk_regions = 1, 123 .jt_erase_blk_info = { 124 { 4096/256, (128/4)-1 }, 125 }, 126 .jt_write_word_time_typ = 40, 127 .jt_write_nbyte_time_typ = 0, 128 .jt_erase_blk_time_typ = 55, 129 .jt_erase_chip_time_typ = 55, 130 .jt_write_word_time_max = 1, 131 .jt_write_nbyte_time_max = 0, 132 .jt_erase_blk_time_max = 1, 133 .jt_erase_chip_time_max = 1, 134 }, 135 }; 136 137 138 const struct nor_interface nor_interface_cfi = { 139 .scan_media = cfi_scan_media, 140 .init = cfi_init, 141 .select = cfi_select, 142 .read_1 = cfi_read_1, 143 .read_2 = cfi_read_2, 144 .read_4 = cfi_read_4, 145 .read_buf_1 = cfi_read_buf_1, 146 .read_buf_2 = cfi_read_buf_2, 147 .read_buf_4 = cfi_read_buf_4, 148 .write_1 = cfi_write_1, 149 .write_2 = cfi_write_2, 150 .write_4 = cfi_write_4, 151 .write_buf_1 = cfi_write_buf_1, 152 .write_buf_2 = cfi_write_buf_2, 153 .write_buf_4 = cfi_write_buf_4, 154 .read_page = NULL, /* cmdset */ 155 .program_page = NULL, /* cmdset */ 156 .busy = NULL, 157 .private = NULL, 158 .access_width = -1, 159 .part_info = NULL, 160 .part_num = -1, 161 }; 162 163 164 /* only data[7..0] are used regardless of chip width */ 165 #define cfi_unpack_1(n) ((n) & 0xff) 166 167 /* construct uint16_t */ 168 #define cfi_unpack_2(b0, b1) \ 169 ((cfi_unpack_1(b1) << 8) | cfi_unpack_1(b0)) 170 171 /* construct uint32_t */ 172 #define cfi_unpack_4(b0, b1, b2, b3) \ 173 ((cfi_unpack_1(b3) << 24) | \ 174 (cfi_unpack_1(b2) << 16) | \ 175 (cfi_unpack_1(b1) << 8) | \ 176 (cfi_unpack_1(b0))) 177 178 #define cfi_unpack_qry(qryp, data) \ 179 do { \ 180 (qryp)->qry[0] = cfi_unpack_1(data[0x10]); \ 181 (qryp)->qry[1] = cfi_unpack_1(data[0x11]); \ 182 (qryp)->qry[2] = cfi_unpack_1(data[0x12]); \ 183 (qryp)->id_pri = cfi_unpack_2(data[0x13], data[0x14]); \ 184 (qryp)->addr_pri = cfi_unpack_2(data[0x15], data[0x16]); \ 185 (qryp)->id_alt = cfi_unpack_2(data[0x17], data[0x18]); \ 186 (qryp)->addr_alt = cfi_unpack_2(data[0x19], data[0x1a]); \ 187 (qryp)->vcc_min = cfi_unpack_1(data[0x1b]); \ 188 (qryp)->vcc_max = cfi_unpack_1(data[0x1c]); \ 189 (qryp)->vpp_min = cfi_unpack_1(data[0x1d]); \ 190 (qryp)->vpp_max = cfi_unpack_1(data[0x1e]); \ 191 (qryp)->write_word_time_typ = cfi_unpack_1(data[0x1f]); \ 192 (qryp)->write_nbyte_time_typ = cfi_unpack_1(data[0x20]); \ 193 (qryp)->erase_blk_time_typ = cfi_unpack_1(data[0x21]); \ 194 (qryp)->erase_chip_time_typ = cfi_unpack_1(data[0x22]); \ 195 (qryp)->write_word_time_max = cfi_unpack_1(data[0x23]); \ 196 (qryp)->write_nbyte_time_max = cfi_unpack_1(data[0x24]); \ 197 (qryp)->erase_blk_time_max = cfi_unpack_1(data[0x25]); \ 198 (qryp)->erase_chip_time_max = cfi_unpack_1(data[0x26]); \ 199 (qryp)->device_size = cfi_unpack_1(data[0x27]); \ 200 (qryp)->interface_code_desc = \ 201 cfi_unpack_2(data[0x28], data[0x29]); \ 202 (qryp)->write_nbyte_size_max = \ 203 cfi_unpack_2(data[0x2a], data[0x2b]); \ 204 (qryp)->erase_blk_regions = cfi_unpack_1(data[0x2c]); \ 205 u_int _i = 0x2d; \ 206 const u_int _n = (qryp)->erase_blk_regions; \ 207 KASSERT(_n <= 4); \ 208 for (u_int _r = 0; _r < _n; _r++, _i+=4) { \ 209 (qryp)->erase_blk_info[_r].y = \ 210 cfi_unpack_2(data[_i+0], data[_i+1]); \ 211 (qryp)->erase_blk_info[_r].z = \ 212 cfi_unpack_2(data[_i+2], data[_i+3]); \ 213 } \ 214 } while (0) 215 216 #define cfi_unpack_pri_0002(qryp, data) \ 217 do { \ 218 (qryp)->pri.cmd_0002.pri[0] = cfi_unpack_1(data[0x00]); \ 219 (qryp)->pri.cmd_0002.pri[1] = cfi_unpack_1(data[0x01]); \ 220 (qryp)->pri.cmd_0002.pri[2] = cfi_unpack_1(data[0x02]); \ 221 (qryp)->pri.cmd_0002.version_maj = cfi_unpack_1(data[0x03]); \ 222 (qryp)->pri.cmd_0002.version_min = cfi_unpack_1(data[0x04]); \ 223 (qryp)->pri.cmd_0002.asupt = cfi_unpack_1(data[0x05]); \ 224 (qryp)->pri.cmd_0002.erase_susp = cfi_unpack_1(data[0x06]); \ 225 (qryp)->pri.cmd_0002.sector_prot = cfi_unpack_1(data[0x07]); \ 226 (qryp)->pri.cmd_0002.tmp_sector_unprot = \ 227 cfi_unpack_1(data[0x08]); \ 228 (qryp)->pri.cmd_0002.sector_prot_scheme = \ 229 cfi_unpack_1(data[0x09]); \ 230 (qryp)->pri.cmd_0002.simul_op = cfi_unpack_1(data[0x0a]); \ 231 (qryp)->pri.cmd_0002.burst_mode_type = cfi_unpack_1(data[0x0b]);\ 232 (qryp)->pri.cmd_0002.page_mode_type = cfi_unpack_1(data[0x0c]); \ 233 (qryp)->pri.cmd_0002.acc_min = cfi_unpack_1(data[0x0d]); \ 234 (qryp)->pri.cmd_0002.acc_max = cfi_unpack_1(data[0x0e]); \ 235 (qryp)->pri.cmd_0002.wp_prot = cfi_unpack_1(data[0x0f]); \ 236 /* XXX 1.3 stops here */ \ 237 (qryp)->pri.cmd_0002.prog_susp = cfi_unpack_1(data[0x10]); \ 238 (qryp)->pri.cmd_0002.unlock_bypass = cfi_unpack_1(data[0x11]); \ 239 (qryp)->pri.cmd_0002.sss_size = cfi_unpack_1(data[0x12]); \ 240 (qryp)->pri.cmd_0002.soft_feat = cfi_unpack_1(data[0x13]); \ 241 (qryp)->pri.cmd_0002.page_size = cfi_unpack_1(data[0x14]); \ 242 (qryp)->pri.cmd_0002.erase_susp_time_max = \ 243 cfi_unpack_1(data[0x15]); \ 244 (qryp)->pri.cmd_0002.prog_susp_time_max = \ 245 cfi_unpack_1(data[0x16]); \ 246 (qryp)->pri.cmd_0002.embhwrst_time_max = \ 247 cfi_unpack_1(data[0x38]); \ 248 (qryp)->pri.cmd_0002.hwrst_time_max = \ 249 cfi_unpack_1(data[0x39]); \ 250 } while (0) 251 252 #define CFI_QRY_UNPACK_COMMON(cfi, data, type) \ 253 do { \ 254 struct cfi_query_data * const qryp = &cfi->cfi_qry_data; \ 255 \ 256 memset(qryp, 0, sizeof(*qryp)); \ 257 cfi_unpack_qry(qryp, data); \ 258 \ 259 switch (qryp->id_pri) { \ 260 case 0x0002: \ 261 if ((cfi_unpack_1(data[qryp->addr_pri + 0]) == 'P') && \ 262 (cfi_unpack_1(data[qryp->addr_pri + 1]) == 'R') && \ 263 (cfi_unpack_1(data[qryp->addr_pri + 2]) == 'I')) { \ 264 type *pri_data = &data[qryp->addr_pri]; \ 265 cfi_unpack_pri_0002(qryp, pri_data); \ 266 break; \ 267 } \ 268 } \ 269 } while (0) 270 271 #ifdef CFI_DEBUG_QRY 272 # define CFI_DUMP_QRY(off, p, sz, stride) \ 273 do { \ 274 printf("%s: QRY data\n", __func__); \ 275 cfi_hexdump(off, p, sz, stride); \ 276 } while (0) 277 #else 278 # define CFI_DUMP_QRY(off, p, sz, stride) 279 #endif 280 281 #ifdef CFI_DEBUG_JEDEC 282 # define CFI_DUMP_JEDEC(off, p, sz, stride) \ 283 do { \ 284 printf("%s: JEDEC data\n", __func__); \ 285 cfi_hexdump(off, p, sz, stride); \ 286 } while (0) 287 #else 288 # define CFI_DUMP_JEDEC(off, p, sz, stride) 289 #endif 290 291 292 static void 293 cfi_chip_query_1(struct cfi * const cfi) 294 { 295 uint8_t data[0x80]; 296 297 bus_space_read_region_1(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 298 __arraycount(data)); 299 CFI_DUMP_QRY(0, data, sizeof(data), 1); 300 CFI_QRY_UNPACK_COMMON(cfi, data, uint8_t); 301 } 302 303 static void 304 cfi_chip_query_2(struct cfi * const cfi) 305 { 306 uint16_t data[0x80]; 307 308 bus_space_read_region_2(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 309 __arraycount(data)); 310 CFI_DUMP_QRY(0, data, sizeof(data), 2); 311 CFI_QRY_UNPACK_COMMON(cfi, data, uint16_t); 312 } 313 314 static void 315 cfi_chip_query_4(struct cfi * const cfi) 316 { 317 uint32_t data[0x80]; 318 319 bus_space_read_region_4(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 320 __arraycount(data)); 321 CFI_DUMP_QRY(0, data, sizeof(data), 4); 322 CFI_QRY_UNPACK_COMMON(cfi, data, uint32_t); 323 } 324 325 static void 326 cfi_chip_query_8(struct cfi * const cfi) 327 { 328 #ifdef NOTYET 329 uint64_t data[0x80]; 330 331 bus_space_read_region_8(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 332 __arraycount(data)); 333 CFI_DUMP_QRY(0, data, sizeof(data), 8); 334 CFI_QRY_UNPACK_COMMON(cfi, data, uint64_t); 335 #endif 336 } 337 338 /* 339 * cfi_chip_query - detect a CFI chip 340 * 341 * fill in the struct cfi as we discover what's there 342 */ 343 static bool 344 cfi_chip_query(struct cfi * const cfi) 345 { 346 const bus_size_t cfi_query_offset[] = { 347 CFI_QUERY_MODE_ADDR, 348 CFI_QUERY_MODE_ALT_ADDR 349 }; 350 351 KASSERT(cfi != NULL); 352 KASSERT(cfi->cfi_bst != NULL); 353 354 for (int j=0; j < __arraycount(cfi_query_offset); j++) { 355 356 cfi_reset_default(cfi); 357 cfi_cmd(cfi, cfi_query_offset[j], CFI_QUERY_DATA); 358 359 if (cfi_read_qry(cfi, 0x10) == 'Q' && 360 cfi_read_qry(cfi, 0x11) == 'R' && 361 cfi_read_qry(cfi, 0x12) == 'Y') { 362 switch(cfi->cfi_portwidth) { 363 case 0: 364 cfi_chip_query_1(cfi); 365 break; 366 case 1: 367 cfi_chip_query_2(cfi); 368 break; 369 case 2: 370 cfi_chip_query_4(cfi); 371 break; 372 case 3: 373 cfi_chip_query_8(cfi); 374 break; 375 default: 376 panic("%s: bad portwidth %d\n", 377 __func__, cfi->cfi_portwidth); 378 } 379 380 switch (cfi->cfi_qry_data.id_pri) { 381 case 0x0002: 382 cfi->cfi_unlock_addr1 = CFI_AMD_UNLOCK_ADDR1; 383 cfi->cfi_unlock_addr2 = CFI_AMD_UNLOCK_ADDR2; 384 break; 385 default: 386 DPRINTF(("%s: unsupported CFI cmdset %#04x\n", 387 __func__, cfi->cfi_qry_data.id_pri)); 388 return false; 389 } 390 391 cfi->cfi_emulated = false; 392 return true; 393 } 394 } 395 396 return false; 397 } 398 399 /* 400 * cfi_probe - search for a CFI NOR trying various port & chip widths 401 * 402 * - gather CFI QRY and PRI data 403 * - gather JEDEC ID data 404 * - if cfi_chip_query() fails, emulate CFI using table data if possible, 405 * otherwise fail. 406 * 407 * NOTE: 408 * striped NOR chips design not supported yet 409 */ 410 bool 411 cfi_probe(struct cfi * const cfi) 412 { 413 bool found; 414 415 KASSERT(cfi != NULL); 416 417 /* XXX set default unlock address for cfi_jedec_id() */ 418 cfi->cfi_unlock_addr1 = CFI_AMD_UNLOCK_ADDR1; 419 cfi->cfi_unlock_addr2 = CFI_AMD_UNLOCK_ADDR2; 420 421 for (u_int pw = 0; pw < 3; pw++) { 422 for (u_int cw = 0; cw <= pw; cw++) { 423 cfi->cfi_portwidth = pw; 424 cfi->cfi_chipwidth = cw; 425 found = cfi_chip_query(cfi); 426 cfi_jedec_id(cfi); 427 if (! found) 428 found = cfi_emulate(cfi); 429 if (found) 430 goto exit_qry; 431 } 432 } 433 434 exit_qry: 435 cfi_reset_default(cfi); /* exit QRY mode */ 436 return found; 437 } 438 439 bool 440 cfi_identify(struct cfi * const cfi) 441 { 442 const bus_space_tag_t bst = cfi->cfi_bst; 443 const bus_space_handle_t bsh = cfi->cfi_bsh; 444 445 KASSERT(cfi != NULL); 446 KASSERT(bst != NULL); 447 448 memset(cfi, 0, sizeof(struct cfi)); /* XXX clean slate */ 449 cfi->cfi_bst = bst; /* restore bus space */ 450 cfi->cfi_bsh = bsh; /* " " " */ 451 452 return cfi_probe(cfi); 453 } 454 455 static int 456 cfi_scan_media(device_t self, struct nor_chip *chip) 457 { 458 struct nor_softc *sc = device_private(self); 459 KASSERT(sc != NULL); 460 KASSERT(sc->sc_nor_if != NULL); 461 struct cfi * const cfi = (struct cfi * const)sc->sc_nor_if->private; 462 KASSERT(cfi != NULL); 463 464 sc->sc_nor_if->access_width = cfi->cfi_portwidth; 465 466 chip->nc_manf_id = cfi->cfi_id_data.id_mid; 467 chip->nc_dev_id = cfi->cfi_id_data.id_did[0]; /* XXX 3 words */ 468 chip->nc_size = 1 << cfi->cfi_qry_data.device_size; 469 470 /* size of line for Read Buf command */ 471 chip->nc_line_size = 1 << cfi->cfi_qry_data.pri.cmd_0002.page_size; 472 473 /* 474 * size of erase block 475 * XXX depends on erase region 476 */ 477 chip->nc_num_luns = 1; 478 chip->nc_lun_blocks = cfi->cfi_qry_data.erase_blk_info[0].y + 1; 479 chip->nc_block_size = cfi->cfi_qry_data.erase_blk_info[0].z * 256; 480 481 switch (cfi->cfi_qry_data.id_pri) { 482 case 0x0002: 483 cfi_0002_init(sc, cfi, chip); 484 break; 485 } 486 487 return 0; 488 } 489 490 void 491 cfi_init(device_t self) 492 { 493 /* nothing */ 494 } 495 496 static void 497 cfi_select(device_t self, bool select) 498 { 499 /* nothing */ 500 } 501 502 static void 503 cfi_read_1(device_t self, flash_off_t offset, uint8_t *datap) 504 { 505 } 506 507 static void 508 cfi_read_2(device_t self, flash_off_t offset, uint16_t *datap) 509 { 510 } 511 512 static void 513 cfi_read_4(device_t self, flash_off_t offset, uint32_t *datap) 514 { 515 } 516 517 static void 518 cfi_read_buf_1(device_t self, flash_off_t offset, uint8_t *datap, size_t size) 519 { 520 } 521 522 static void 523 cfi_read_buf_2(device_t self, flash_off_t offset, uint16_t *datap, size_t size) 524 { 525 } 526 527 static void 528 cfi_read_buf_4(device_t self, flash_off_t offset, uint32_t *datap, size_t size) 529 { 530 } 531 532 static void 533 cfi_write_1(device_t self, flash_off_t offset, uint8_t data) 534 { 535 } 536 537 static void 538 cfi_write_2(device_t self, flash_off_t offset, uint16_t data) 539 { 540 } 541 542 static void 543 cfi_write_4(device_t self, flash_off_t offset, uint32_t data) 544 { 545 } 546 547 static void 548 cfi_write_buf_1(device_t self, flash_off_t offset, const uint8_t *datap, 549 size_t size) 550 { 551 } 552 553 static void 554 cfi_write_buf_2(device_t self, flash_off_t offset, const uint16_t *datap, 555 size_t size) 556 { 557 } 558 559 static void 560 cfi_write_buf_4(device_t self, flash_off_t offset, const uint32_t *datap, 561 size_t size) 562 { 563 } 564 565 /* 566 * cfi_cmd - write a CFI command word. 567 * 568 * The offset 'off' is given for 64-bit port width and will be scaled 569 * down to the actual port width of the chip. 570 * The command word will be constructed out of 'val' regarding port- and 571 * chip width. 572 */ 573 void 574 cfi_cmd(struct cfi * const cfi, bus_size_t off, uint32_t val) 575 { 576 const bus_space_tag_t bst = cfi->cfi_bst; 577 bus_space_handle_t bsh = cfi->cfi_bsh; 578 uint64_t cmd; 579 int cw, pw; 580 581 off >>= 3 - cfi->cfi_portwidth; 582 583 pw = 1 << cfi->cfi_portwidth; 584 cw = 1 << cfi->cfi_chipwidth; 585 cmd = 0; 586 while (pw > 0) { 587 cmd <<= cw << 3; 588 cmd += val; 589 pw -= cw; 590 } 591 592 DPRINTF(("%s: %p %x %x %" PRIx64 "\n", __func__, bst, bsh, off, cmd)); 593 594 switch (cfi->cfi_portwidth) { 595 case 0: 596 bus_space_write_1(bst, bsh, off, cmd); 597 break; 598 case 1: 599 bus_space_write_2(bst, bsh, off, cmd); 600 break; 601 case 2: 602 bus_space_write_4(bst, bsh, off, cmd); 603 break; 604 #ifdef NOTYET 605 case 3: 606 bus_space_write_8(bst, bsh, off, cmd); 607 break; 608 #endif 609 default: 610 panic("%s: bad portwidth %d bytes\n", 611 __func__, 1 << cfi->cfi_portwidth); 612 } 613 } 614 615 static uint8_t 616 cfi_read_qry(struct cfi * const cfi, bus_size_t off) 617 { 618 const bus_space_tag_t bst = cfi->cfi_bst; 619 bus_space_handle_t bsh = cfi->cfi_bsh; 620 uint8_t data; 621 622 off <<= cfi->cfi_portwidth; 623 624 switch (cfi->cfi_portwidth) { 625 case 0: 626 data = bus_space_read_1(bst, bsh, off); 627 break; 628 case 1: 629 data = bus_space_read_2(bst, bsh, off); 630 break; 631 case 2: 632 data = bus_space_read_4(bst, bsh, off); 633 break; 634 case 3: 635 data = bus_space_read_8(bst, bsh, off); 636 break; 637 default: 638 data = ~0; 639 break; 640 } 641 return data; 642 } 643 644 /* 645 * cfi_reset_default - when we don't know which command will work, use both 646 */ 647 void 648 cfi_reset_default(struct cfi * const cfi) 649 { 650 651 cfi_cmd(cfi, CFI_ADDR_ANY, CFI_RESET_DATA); 652 cfi_cmd(cfi, CFI_ADDR_ANY, CFI_ALT_RESET_DATA); 653 } 654 655 /* 656 * cfi_reset_std - use standard reset command 657 */ 658 void 659 cfi_reset_std(struct cfi * const cfi) 660 { 661 662 cfi_cmd(cfi, CFI_ADDR_ANY, CFI_RESET_DATA); 663 } 664 665 /* 666 * cfi_reset_alt - use "alternate" reset command 667 */ 668 void 669 cfi_reset_alt(struct cfi * const cfi) 670 { 671 672 cfi_cmd(cfi, CFI_ADDR_ANY, CFI_ALT_RESET_DATA); 673 } 674 675 static void 676 cfi_jedec_id_1(struct cfi * const cfi) 677 { 678 struct cfi_jedec_id_data *idp = &cfi->cfi_id_data; 679 uint8_t data[0x10]; 680 681 bus_space_read_region_1(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 682 __arraycount(data)); 683 684 CFI_DUMP_JEDEC(0, data, sizeof(data), 1); 685 686 idp->id_mid = (uint16_t)data[0]; 687 idp->id_did[0] = (uint16_t)data[1]; 688 idp->id_did[1] = (uint16_t)data[0xe]; 689 idp->id_did[2] = (uint16_t)data[0xf]; 690 idp->id_prot_state = (uint16_t)data[2]; 691 idp->id_indicators = (uint16_t)data[3]; 692 693 /* software bits, upper and lower */ 694 idp->id_swb_lo = data[0xc]; 695 idp->id_swb_hi = data[0xd]; 696 697 } 698 699 static void 700 cfi_jedec_id_2(struct cfi * const cfi) 701 { 702 struct cfi_jedec_id_data *idp = &cfi->cfi_id_data; 703 uint16_t data[0x10]; 704 705 bus_space_read_region_2(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 706 __arraycount(data)); 707 708 CFI_DUMP_JEDEC(0, data, sizeof(data), 1); 709 710 idp->id_mid = data[0]; 711 idp->id_did[0] = data[1]; 712 idp->id_did[1] = data[0xe]; 713 idp->id_did[2] = data[0xf]; 714 idp->id_prot_state = data[2]; 715 idp->id_indicators = data[3]; 716 717 /* software bits, upper and lower 718 * - undefined on S29GL-P 719 * - defined on S29GL-S 720 */ 721 idp->id_swb_lo = data[0xc]; 722 idp->id_swb_hi = data[0xd]; 723 724 } 725 726 static void 727 cfi_jedec_id_4(struct cfi * const cfi) 728 { 729 struct cfi_jedec_id_data *idp = &cfi->cfi_id_data; 730 uint32_t data[0x10]; 731 732 bus_space_read_region_4(cfi->cfi_bst, cfi->cfi_bsh, 0, data, 733 __arraycount(data)); 734 735 CFI_DUMP_JEDEC(0, data, sizeof(data), 1); 736 737 idp->id_mid = data[0] & 0xffff; 738 idp->id_did[0] = data[1] & 0xffff; 739 idp->id_did[1] = data[0xe] & 0xffff; 740 idp->id_did[2] = data[0xf] & 0xffff; 741 idp->id_prot_state = data[2] & 0xffff; 742 idp->id_indicators = data[3] & 0xffff; 743 744 /* software bits, upper and lower 745 * - undefined on S29GL-P 746 * - defined on S29GL-S 747 */ 748 idp->id_swb_lo = data[0xc] & 0xffff; 749 idp->id_swb_hi = data[0xd] & 0xffff; 750 751 } 752 753 /* 754 * cfi_jedec_id - get JEDEC ID info 755 */ 756 static bool 757 cfi_jedec_id(struct cfi * const cfi) 758 { 759 760 DPRINTF(("%s\n", __func__)); 761 762 cfi_reset_default(cfi); 763 cfi_cmd(cfi, cfi->cfi_unlock_addr1, 0xaa); 764 cfi_cmd(cfi, cfi->cfi_unlock_addr2, 0x55); 765 cfi_cmd(cfi, cfi->cfi_unlock_addr1, 0x90); 766 767 switch(cfi->cfi_portwidth) { 768 case 0: 769 cfi_jedec_id_1(cfi); 770 break; 771 case 1: 772 cfi_jedec_id_2(cfi); 773 break; 774 case 2: 775 cfi_jedec_id_4(cfi); 776 break; 777 #ifdef NOTYET 778 case 3: 779 cfi_jedec_id_8(cfi); 780 break; 781 #endif 782 default: 783 panic("%s: bad portwidth %d bytes\n", 784 __func__, 1 << cfi->cfi_portwidth); 785 } 786 787 return true; 788 } 789 790 static bool 791 cfi_emulate(struct cfi * const cfi) 792 { 793 bool found = false; 794 const struct cfi_jedec_tab *jt = cfi_jedec_search(cfi); 795 if (jt != NULL) { 796 found = true; 797 cfi->cfi_emulated = true; 798 cfi_jedec_fill(cfi, jt); 799 } 800 return found; 801 } 802 803 /* 804 * cfi_jedec_search - search cfi_jedec_tab[] for entry matching given JEDEC IDs 805 */ 806 static const struct cfi_jedec_tab * 807 cfi_jedec_search(struct cfi *cfi) 808 { 809 struct cfi_jedec_id_data *idp = &cfi->cfi_id_data; 810 811 for (u_int i=0; i < __arraycount(cfi_jedec_tab); i++) { 812 const struct cfi_jedec_tab *jt = &cfi_jedec_tab[i]; 813 if ((jt->jt_mid == idp->id_mid) && 814 (jt->jt_did == idp->id_did[0])) { 815 return jt; 816 } 817 } 818 return NULL; 819 } 820 821 /* 822 * cfi_jedec_fill - fill in cfi with info from table entry 823 */ 824 static void 825 cfi_jedec_fill(struct cfi *cfi, const struct cfi_jedec_tab *jt) 826 { 827 828 cfi->cfi_name = jt->jt_name; 829 830 struct cfi_query_data *qryp = &cfi->cfi_qry_data; 831 memset(&qryp, 0, sizeof(*qryp)); 832 qryp->id_pri = jt->jt_id_pri; 833 qryp->id_alt = jt->jt_id_alt; 834 qryp->interface_code_desc = jt->jt_interface_code_desc; 835 qryp->write_word_time_typ = jt->jt_write_word_time_typ; 836 qryp->write_nbyte_time_typ = jt->jt_write_nbyte_time_typ; 837 qryp->erase_blk_time_typ = jt->jt_erase_blk_time_typ; 838 qryp->erase_chip_time_typ = jt->jt_erase_chip_time_typ; 839 qryp->write_word_time_max = jt->jt_write_word_time_max; 840 qryp->write_nbyte_time_max = jt->jt_write_nbyte_time_max; 841 qryp->erase_blk_time_max = jt->jt_erase_blk_time_max; 842 qryp->erase_chip_time_max = jt->jt_erase_chip_time_max; 843 qryp->device_size = jt->jt_device_size; 844 qryp->interface_code_desc = jt->jt_interface_code_desc; 845 qryp->write_nbyte_size_max = jt->jt_write_nbyte_size_max; 846 qryp->erase_blk_regions = jt->jt_erase_blk_regions; 847 for (u_int i=0; i < 4; i++) 848 qryp->erase_blk_info[i] = jt->jt_erase_blk_info[i]; 849 850 } 851 852 void 853 cfi_print(device_t self, struct cfi * const cfi) 854 { 855 char pbuf[sizeof("XXXX MB")]; 856 struct cfi_query_data * const qryp = &cfi->cfi_qry_data; 857 858 format_bytes(pbuf, sizeof(pbuf), 1 << qryp->device_size); 859 if (cfi->cfi_emulated) { 860 aprint_normal_dev(self, "%s NOR flash %s %s\n", 861 cfi->cfi_name, pbuf, 862 cfi_interface_desc_str(qryp->interface_code_desc)); 863 } else { 864 aprint_normal_dev(self, "CFI NOR flash %s %s\n", pbuf, 865 cfi_interface_desc_str(qryp->interface_code_desc)); 866 } 867 #ifdef NOR_VERBOSE 868 aprint_normal_dev(self, "manufacturer id %#x, device id %#x %#x %#x\n", 869 cfi->cfi_id_data.id_mid, 870 cfi->cfi_id_data.id_did[0], 871 cfi->cfi_id_data.id_did[1], 872 cfi->cfi_id_data.id_did[2]); 873 aprint_normal_dev(self, "x%u device operating in %u-bit mode\n", 874 8 << cfi->cfi_portwidth, 8 << cfi->cfi_chipwidth); 875 aprint_normal_dev(self, "sw bits lo=%#x hi=%#x\n", 876 cfi->cfi_id_data.id_swb_lo, 877 cfi->cfi_id_data.id_swb_hi); 878 aprint_normal_dev(self, "max multibyte write size %d\n", 879 1 << qryp->write_nbyte_size_max); 880 aprint_normal_dev(self, "%d Erase Block Region(s)\n", 881 qryp->erase_blk_regions); 882 for (u_int r=0; r < qryp->erase_blk_regions; r++) { 883 size_t sz = qryp->erase_blk_info[r].z * 256; 884 format_bytes(pbuf, sizeof(pbuf), sz); 885 aprint_normal(" %d: %d blocks, size %s\n", r, 886 qryp->erase_blk_info[r].y + 1, pbuf); 887 } 888 #endif 889 890 switch (cfi->cfi_qry_data.id_pri) { 891 case 0x0002: 892 cfi_0002_print(self, cfi); 893 break; 894 } 895 } 896 897 #if defined(CFI_DEBUG_JEDEC) || defined(CFI_DEBUG_QRY) 898 void 899 cfi_hexdump(flash_off_t offset, void * const v, u_int count, u_int stride) 900 { 901 uint8_t * const data = v; 902 for(int n=0; n < count; n+=16) { 903 int i; 904 printf("%08llx: ", (offset + n) / stride); 905 for(i=n; i < n+16; i++) 906 printf("%02x ", data[i]); 907 printf("\t"); 908 for(i=n; i < n+16; i++) { 909 u_int c = (int)data[i]; 910 if (c >= 0x20 && c < 0x7f) 911 printf("%c", c); 912 else 913 printf("%c", '.'); 914 } 915 printf("\n"); 916 } 917 } 918 #endif 919
Indexes created Tue Sep 23 23:09:58 GMT 2025