nvmm.c revision 1.17 1 1.17 maxv /* $NetBSD: nvmm.c,v 1.17 2019/04/10 18:49:04 maxv Exp $ */
2 1.1 maxv
3 1.1 maxv /*
4 1.14 maxv * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
5 1.1 maxv * All rights reserved.
6 1.1 maxv *
7 1.1 maxv * This code is derived from software contributed to The NetBSD Foundation
8 1.1 maxv * by Maxime Villard.
9 1.1 maxv *
10 1.1 maxv * Redistribution and use in source and binary forms, with or without
11 1.1 maxv * modification, are permitted provided that the following conditions
12 1.1 maxv * are met:
13 1.1 maxv * 1. Redistributions of source code must retain the above copyright
14 1.1 maxv * notice, this list of conditions and the following disclaimer.
15 1.1 maxv * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 maxv * notice, this list of conditions and the following disclaimer in the
17 1.1 maxv * documentation and/or other materials provided with the distribution.
18 1.1 maxv *
19 1.1 maxv * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 maxv * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 maxv * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 maxv * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 maxv * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 maxv * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 maxv * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 maxv * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 maxv * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 maxv * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 maxv * POSSIBILITY OF SUCH DAMAGE.
30 1.1 maxv */
31 1.1 maxv
32 1.1 maxv #include <sys/cdefs.h>
33 1.17 maxv __KERNEL_RCSID(0, "$NetBSD: nvmm.c,v 1.17 2019/04/10 18:49:04 maxv Exp $");
34 1.1 maxv
35 1.1 maxv #include <sys/param.h>
36 1.1 maxv #include <sys/systm.h>
37 1.1 maxv #include <sys/kernel.h>
38 1.1 maxv
39 1.1 maxv #include <sys/cpu.h>
40 1.1 maxv #include <sys/conf.h>
41 1.1 maxv #include <sys/kmem.h>
42 1.1 maxv #include <sys/module.h>
43 1.1 maxv #include <sys/proc.h>
44 1.11 maxv #include <sys/mman.h>
45 1.14 maxv #include <sys/file.h>
46 1.14 maxv #include <sys/filedesc.h>
47 1.17 maxv #include <sys/kauth.h>
48 1.1 maxv
49 1.1 maxv #include <uvm/uvm.h>
50 1.1 maxv #include <uvm/uvm_page.h>
51 1.1 maxv
52 1.1 maxv #include "ioconf.h"
53 1.1 maxv
54 1.1 maxv #include <dev/nvmm/nvmm.h>
55 1.1 maxv #include <dev/nvmm/nvmm_internal.h>
56 1.1 maxv #include <dev/nvmm/nvmm_ioctl.h>
57 1.1 maxv
58 1.1 maxv static struct nvmm_machine machines[NVMM_MAX_MACHINES];
59 1.13 maxv static volatile unsigned int nmachines __cacheline_aligned;
60 1.1 maxv
61 1.1 maxv static const struct nvmm_impl *nvmm_impl_list[] = {
62 1.7 maxv &nvmm_x86_svm, /* x86 AMD SVM */
63 1.7 maxv &nvmm_x86_vmx /* x86 Intel VMX */
64 1.1 maxv };
65 1.1 maxv
66 1.1 maxv static const struct nvmm_impl *nvmm_impl = NULL;
67 1.1 maxv
68 1.17 maxv static struct nvmm_owner root_owner;
69 1.17 maxv
70 1.1 maxv /* -------------------------------------------------------------------------- */
71 1.1 maxv
72 1.1 maxv static int
73 1.1 maxv nvmm_machine_alloc(struct nvmm_machine **ret)
74 1.1 maxv {
75 1.1 maxv struct nvmm_machine *mach;
76 1.1 maxv size_t i;
77 1.1 maxv
78 1.1 maxv for (i = 0; i < NVMM_MAX_MACHINES; i++) {
79 1.1 maxv mach = &machines[i];
80 1.1 maxv
81 1.1 maxv rw_enter(&mach->lock, RW_WRITER);
82 1.1 maxv if (mach->present) {
83 1.1 maxv rw_exit(&mach->lock);
84 1.1 maxv continue;
85 1.1 maxv }
86 1.1 maxv
87 1.1 maxv mach->present = true;
88 1.17 maxv mach->time = time_second;
89 1.1 maxv *ret = mach;
90 1.13 maxv atomic_inc_uint(&nmachines);
91 1.1 maxv return 0;
92 1.1 maxv }
93 1.1 maxv
94 1.1 maxv return ENOBUFS;
95 1.1 maxv }
96 1.1 maxv
97 1.1 maxv static void
98 1.1 maxv nvmm_machine_free(struct nvmm_machine *mach)
99 1.1 maxv {
100 1.1 maxv KASSERT(rw_write_held(&mach->lock));
101 1.1 maxv KASSERT(mach->present);
102 1.1 maxv mach->present = false;
103 1.13 maxv atomic_dec_uint(&nmachines);
104 1.1 maxv }
105 1.1 maxv
106 1.1 maxv static int
107 1.14 maxv nvmm_machine_get(struct nvmm_owner *owner, nvmm_machid_t machid,
108 1.14 maxv struct nvmm_machine **ret, bool writer)
109 1.1 maxv {
110 1.1 maxv struct nvmm_machine *mach;
111 1.1 maxv krw_t op = writer ? RW_WRITER : RW_READER;
112 1.1 maxv
113 1.1 maxv if (machid >= NVMM_MAX_MACHINES) {
114 1.1 maxv return EINVAL;
115 1.1 maxv }
116 1.1 maxv mach = &machines[machid];
117 1.1 maxv
118 1.1 maxv rw_enter(&mach->lock, op);
119 1.1 maxv if (!mach->present) {
120 1.1 maxv rw_exit(&mach->lock);
121 1.1 maxv return ENOENT;
122 1.1 maxv }
123 1.17 maxv if (owner != &root_owner && mach->owner != owner) {
124 1.1 maxv rw_exit(&mach->lock);
125 1.1 maxv return EPERM;
126 1.1 maxv }
127 1.1 maxv *ret = mach;
128 1.1 maxv
129 1.1 maxv return 0;
130 1.1 maxv }
131 1.1 maxv
132 1.1 maxv static void
133 1.1 maxv nvmm_machine_put(struct nvmm_machine *mach)
134 1.1 maxv {
135 1.1 maxv rw_exit(&mach->lock);
136 1.1 maxv }
137 1.1 maxv
138 1.1 maxv /* -------------------------------------------------------------------------- */
139 1.1 maxv
140 1.1 maxv static int
141 1.1 maxv nvmm_vcpu_alloc(struct nvmm_machine *mach, struct nvmm_cpu **ret)
142 1.1 maxv {
143 1.1 maxv struct nvmm_cpu *vcpu;
144 1.1 maxv size_t i;
145 1.1 maxv
146 1.1 maxv for (i = 0; i < NVMM_MAX_VCPUS; i++) {
147 1.1 maxv vcpu = &mach->cpus[i];
148 1.1 maxv
149 1.1 maxv mutex_enter(&vcpu->lock);
150 1.1 maxv if (vcpu->present) {
151 1.1 maxv mutex_exit(&vcpu->lock);
152 1.1 maxv continue;
153 1.1 maxv }
154 1.1 maxv
155 1.1 maxv vcpu->present = true;
156 1.1 maxv vcpu->cpuid = i;
157 1.6 maxv vcpu->state = kmem_zalloc(nvmm_impl->state_size, KM_SLEEP);
158 1.1 maxv *ret = vcpu;
159 1.1 maxv return 0;
160 1.1 maxv }
161 1.1 maxv
162 1.1 maxv return ENOBUFS;
163 1.1 maxv }
164 1.1 maxv
165 1.1 maxv static void
166 1.1 maxv nvmm_vcpu_free(struct nvmm_machine *mach, struct nvmm_cpu *vcpu)
167 1.1 maxv {
168 1.1 maxv KASSERT(mutex_owned(&vcpu->lock));
169 1.1 maxv vcpu->present = false;
170 1.6 maxv kmem_free(vcpu->state, nvmm_impl->state_size);
171 1.1 maxv vcpu->hcpu_last = -1;
172 1.1 maxv }
173 1.1 maxv
174 1.1 maxv int
175 1.1 maxv nvmm_vcpu_get(struct nvmm_machine *mach, nvmm_cpuid_t cpuid,
176 1.1 maxv struct nvmm_cpu **ret)
177 1.1 maxv {
178 1.1 maxv struct nvmm_cpu *vcpu;
179 1.1 maxv
180 1.1 maxv if (cpuid >= NVMM_MAX_VCPUS) {
181 1.1 maxv return EINVAL;
182 1.1 maxv }
183 1.1 maxv vcpu = &mach->cpus[cpuid];
184 1.1 maxv
185 1.1 maxv mutex_enter(&vcpu->lock);
186 1.1 maxv if (!vcpu->present) {
187 1.1 maxv mutex_exit(&vcpu->lock);
188 1.1 maxv return ENOENT;
189 1.1 maxv }
190 1.1 maxv *ret = vcpu;
191 1.1 maxv
192 1.1 maxv return 0;
193 1.1 maxv }
194 1.1 maxv
195 1.1 maxv void
196 1.1 maxv nvmm_vcpu_put(struct nvmm_cpu *vcpu)
197 1.1 maxv {
198 1.1 maxv mutex_exit(&vcpu->lock);
199 1.1 maxv }
200 1.1 maxv
201 1.1 maxv /* -------------------------------------------------------------------------- */
202 1.1 maxv
203 1.1 maxv static void
204 1.14 maxv nvmm_kill_machines(struct nvmm_owner *owner)
205 1.1 maxv {
206 1.1 maxv struct nvmm_machine *mach;
207 1.1 maxv struct nvmm_cpu *vcpu;
208 1.1 maxv size_t i, j;
209 1.1 maxv int error;
210 1.1 maxv
211 1.1 maxv for (i = 0; i < NVMM_MAX_MACHINES; i++) {
212 1.1 maxv mach = &machines[i];
213 1.1 maxv
214 1.1 maxv rw_enter(&mach->lock, RW_WRITER);
215 1.14 maxv if (!mach->present || mach->owner != owner) {
216 1.1 maxv rw_exit(&mach->lock);
217 1.1 maxv continue;
218 1.1 maxv }
219 1.1 maxv
220 1.1 maxv /* Kill it. */
221 1.1 maxv for (j = 0; j < NVMM_MAX_VCPUS; j++) {
222 1.1 maxv error = nvmm_vcpu_get(mach, j, &vcpu);
223 1.1 maxv if (error)
224 1.1 maxv continue;
225 1.1 maxv (*nvmm_impl->vcpu_destroy)(mach, vcpu);
226 1.1 maxv nvmm_vcpu_free(mach, vcpu);
227 1.1 maxv nvmm_vcpu_put(vcpu);
228 1.1 maxv }
229 1.15 maxv (*nvmm_impl->machine_destroy)(mach);
230 1.1 maxv uvmspace_free(mach->vm);
231 1.4 maxv
232 1.4 maxv /* Drop the kernel UOBJ refs. */
233 1.9 maxv for (j = 0; j < NVMM_MAX_HMAPPINGS; j++) {
234 1.9 maxv if (!mach->hmap[j].present)
235 1.4 maxv continue;
236 1.9 maxv uao_detach(mach->hmap[j].uobj);
237 1.4 maxv }
238 1.4 maxv
239 1.1 maxv nvmm_machine_free(mach);
240 1.1 maxv
241 1.1 maxv rw_exit(&mach->lock);
242 1.1 maxv }
243 1.1 maxv }
244 1.1 maxv
245 1.1 maxv /* -------------------------------------------------------------------------- */
246 1.1 maxv
247 1.1 maxv static int
248 1.14 maxv nvmm_capability(struct nvmm_owner *owner, struct nvmm_ioc_capability *args)
249 1.1 maxv {
250 1.1 maxv args->cap.version = NVMM_CAPABILITY_VERSION;
251 1.1 maxv args->cap.state_size = nvmm_impl->state_size;
252 1.1 maxv args->cap.max_machines = NVMM_MAX_MACHINES;
253 1.1 maxv args->cap.max_vcpus = NVMM_MAX_VCPUS;
254 1.1 maxv args->cap.max_ram = NVMM_MAX_RAM;
255 1.1 maxv
256 1.1 maxv (*nvmm_impl->capability)(&args->cap);
257 1.1 maxv
258 1.1 maxv return 0;
259 1.1 maxv }
260 1.1 maxv
261 1.1 maxv static int
262 1.14 maxv nvmm_machine_create(struct nvmm_owner *owner,
263 1.14 maxv struct nvmm_ioc_machine_create *args)
264 1.1 maxv {
265 1.1 maxv struct nvmm_machine *mach;
266 1.1 maxv int error;
267 1.1 maxv
268 1.1 maxv error = nvmm_machine_alloc(&mach);
269 1.1 maxv if (error)
270 1.1 maxv return error;
271 1.1 maxv
272 1.1 maxv /* Curproc owns the machine. */
273 1.14 maxv mach->owner = owner;
274 1.1 maxv
275 1.9 maxv /* Zero out the host mappings. */
276 1.9 maxv memset(&mach->hmap, 0, sizeof(mach->hmap));
277 1.4 maxv
278 1.1 maxv /* Create the machine vmspace. */
279 1.1 maxv mach->gpa_begin = 0;
280 1.1 maxv mach->gpa_end = NVMM_MAX_RAM;
281 1.1 maxv mach->vm = uvmspace_alloc(0, mach->gpa_end - mach->gpa_begin, false);
282 1.1 maxv
283 1.1 maxv (*nvmm_impl->machine_create)(mach);
284 1.1 maxv
285 1.1 maxv args->machid = mach->machid;
286 1.1 maxv nvmm_machine_put(mach);
287 1.1 maxv
288 1.1 maxv return 0;
289 1.1 maxv }
290 1.1 maxv
291 1.1 maxv static int
292 1.14 maxv nvmm_machine_destroy(struct nvmm_owner *owner,
293 1.14 maxv struct nvmm_ioc_machine_destroy *args)
294 1.1 maxv {
295 1.1 maxv struct nvmm_machine *mach;
296 1.1 maxv struct nvmm_cpu *vcpu;
297 1.1 maxv int error;
298 1.1 maxv size_t i;
299 1.1 maxv
300 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, true);
301 1.1 maxv if (error)
302 1.1 maxv return error;
303 1.1 maxv
304 1.1 maxv for (i = 0; i < NVMM_MAX_VCPUS; i++) {
305 1.1 maxv error = nvmm_vcpu_get(mach, i, &vcpu);
306 1.1 maxv if (error)
307 1.1 maxv continue;
308 1.1 maxv
309 1.1 maxv (*nvmm_impl->vcpu_destroy)(mach, vcpu);
310 1.1 maxv nvmm_vcpu_free(mach, vcpu);
311 1.1 maxv nvmm_vcpu_put(vcpu);
312 1.1 maxv }
313 1.1 maxv
314 1.1 maxv (*nvmm_impl->machine_destroy)(mach);
315 1.1 maxv
316 1.1 maxv /* Free the machine vmspace. */
317 1.1 maxv uvmspace_free(mach->vm);
318 1.4 maxv
319 1.4 maxv /* Drop the kernel UOBJ refs. */
320 1.9 maxv for (i = 0; i < NVMM_MAX_HMAPPINGS; i++) {
321 1.9 maxv if (!mach->hmap[i].present)
322 1.4 maxv continue;
323 1.9 maxv uao_detach(mach->hmap[i].uobj);
324 1.4 maxv }
325 1.1 maxv
326 1.1 maxv nvmm_machine_free(mach);
327 1.1 maxv nvmm_machine_put(mach);
328 1.1 maxv
329 1.1 maxv return 0;
330 1.1 maxv }
331 1.1 maxv
332 1.1 maxv static int
333 1.14 maxv nvmm_machine_configure(struct nvmm_owner *owner,
334 1.14 maxv struct nvmm_ioc_machine_configure *args)
335 1.1 maxv {
336 1.1 maxv struct nvmm_machine *mach;
337 1.1 maxv size_t allocsz;
338 1.1 maxv void *data;
339 1.1 maxv int error;
340 1.1 maxv
341 1.1 maxv if (__predict_false(args->op >= nvmm_impl->conf_max)) {
342 1.1 maxv return EINVAL;
343 1.1 maxv }
344 1.1 maxv
345 1.1 maxv allocsz = nvmm_impl->conf_sizes[args->op];
346 1.1 maxv data = kmem_alloc(allocsz, KM_SLEEP);
347 1.1 maxv
348 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, true);
349 1.1 maxv if (error) {
350 1.1 maxv kmem_free(data, allocsz);
351 1.1 maxv return error;
352 1.1 maxv }
353 1.1 maxv
354 1.1 maxv error = copyin(args->conf, data, allocsz);
355 1.1 maxv if (error) {
356 1.1 maxv goto out;
357 1.1 maxv }
358 1.1 maxv
359 1.1 maxv error = (*nvmm_impl->machine_configure)(mach, args->op, data);
360 1.1 maxv
361 1.1 maxv out:
362 1.1 maxv nvmm_machine_put(mach);
363 1.1 maxv kmem_free(data, allocsz);
364 1.1 maxv return error;
365 1.1 maxv }
366 1.1 maxv
367 1.1 maxv static int
368 1.14 maxv nvmm_vcpu_create(struct nvmm_owner *owner, struct nvmm_ioc_vcpu_create *args)
369 1.1 maxv {
370 1.1 maxv struct nvmm_machine *mach;
371 1.1 maxv struct nvmm_cpu *vcpu;
372 1.1 maxv int error;
373 1.1 maxv
374 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
375 1.1 maxv if (error)
376 1.1 maxv return error;
377 1.1 maxv
378 1.1 maxv error = nvmm_vcpu_alloc(mach, &vcpu);
379 1.1 maxv if (error)
380 1.1 maxv goto out;
381 1.1 maxv
382 1.1 maxv error = (*nvmm_impl->vcpu_create)(mach, vcpu);
383 1.1 maxv if (error) {
384 1.1 maxv nvmm_vcpu_free(mach, vcpu);
385 1.1 maxv nvmm_vcpu_put(vcpu);
386 1.1 maxv goto out;
387 1.1 maxv }
388 1.1 maxv
389 1.1 maxv nvmm_vcpu_put(vcpu);
390 1.1 maxv
391 1.1 maxv out:
392 1.1 maxv nvmm_machine_put(mach);
393 1.1 maxv return error;
394 1.1 maxv }
395 1.1 maxv
396 1.1 maxv static int
397 1.14 maxv nvmm_vcpu_destroy(struct nvmm_owner *owner, struct nvmm_ioc_vcpu_destroy *args)
398 1.1 maxv {
399 1.1 maxv struct nvmm_machine *mach;
400 1.1 maxv struct nvmm_cpu *vcpu;
401 1.1 maxv int error;
402 1.1 maxv
403 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
404 1.1 maxv if (error)
405 1.1 maxv return error;
406 1.1 maxv
407 1.1 maxv error = nvmm_vcpu_get(mach, args->cpuid, &vcpu);
408 1.1 maxv if (error)
409 1.1 maxv goto out;
410 1.1 maxv
411 1.1 maxv (*nvmm_impl->vcpu_destroy)(mach, vcpu);
412 1.1 maxv nvmm_vcpu_free(mach, vcpu);
413 1.1 maxv nvmm_vcpu_put(vcpu);
414 1.1 maxv
415 1.1 maxv out:
416 1.1 maxv nvmm_machine_put(mach);
417 1.1 maxv return error;
418 1.1 maxv }
419 1.1 maxv
420 1.1 maxv static int
421 1.14 maxv nvmm_vcpu_setstate(struct nvmm_owner *owner,
422 1.14 maxv struct nvmm_ioc_vcpu_setstate *args)
423 1.1 maxv {
424 1.1 maxv struct nvmm_machine *mach;
425 1.1 maxv struct nvmm_cpu *vcpu;
426 1.1 maxv int error;
427 1.1 maxv
428 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
429 1.6 maxv if (error)
430 1.1 maxv return error;
431 1.1 maxv
432 1.1 maxv error = nvmm_vcpu_get(mach, args->cpuid, &vcpu);
433 1.1 maxv if (error)
434 1.1 maxv goto out;
435 1.1 maxv
436 1.6 maxv error = copyin(args->state, vcpu->state, nvmm_impl->state_size);
437 1.1 maxv if (error) {
438 1.1 maxv nvmm_vcpu_put(vcpu);
439 1.1 maxv goto out;
440 1.1 maxv }
441 1.1 maxv
442 1.6 maxv (*nvmm_impl->vcpu_setstate)(vcpu, vcpu->state, args->flags);
443 1.1 maxv nvmm_vcpu_put(vcpu);
444 1.1 maxv
445 1.1 maxv out:
446 1.1 maxv nvmm_machine_put(mach);
447 1.1 maxv return error;
448 1.1 maxv }
449 1.1 maxv
450 1.1 maxv static int
451 1.14 maxv nvmm_vcpu_getstate(struct nvmm_owner *owner,
452 1.14 maxv struct nvmm_ioc_vcpu_getstate *args)
453 1.1 maxv {
454 1.1 maxv struct nvmm_machine *mach;
455 1.1 maxv struct nvmm_cpu *vcpu;
456 1.1 maxv int error;
457 1.1 maxv
458 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
459 1.6 maxv if (error)
460 1.1 maxv return error;
461 1.1 maxv
462 1.1 maxv error = nvmm_vcpu_get(mach, args->cpuid, &vcpu);
463 1.1 maxv if (error)
464 1.1 maxv goto out;
465 1.1 maxv
466 1.6 maxv (*nvmm_impl->vcpu_getstate)(vcpu, vcpu->state, args->flags);
467 1.1 maxv nvmm_vcpu_put(vcpu);
468 1.6 maxv error = copyout(vcpu->state, args->state, nvmm_impl->state_size);
469 1.1 maxv
470 1.1 maxv out:
471 1.1 maxv nvmm_machine_put(mach);
472 1.1 maxv return error;
473 1.1 maxv }
474 1.1 maxv
475 1.1 maxv static int
476 1.14 maxv nvmm_vcpu_inject(struct nvmm_owner *owner, struct nvmm_ioc_vcpu_inject *args)
477 1.1 maxv {
478 1.1 maxv struct nvmm_machine *mach;
479 1.1 maxv struct nvmm_cpu *vcpu;
480 1.1 maxv int error;
481 1.1 maxv
482 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
483 1.1 maxv if (error)
484 1.1 maxv return error;
485 1.1 maxv
486 1.1 maxv error = nvmm_vcpu_get(mach, args->cpuid, &vcpu);
487 1.1 maxv if (error)
488 1.1 maxv goto out;
489 1.1 maxv
490 1.1 maxv error = (*nvmm_impl->vcpu_inject)(mach, vcpu, &args->event);
491 1.1 maxv nvmm_vcpu_put(vcpu);
492 1.1 maxv
493 1.1 maxv out:
494 1.1 maxv nvmm_machine_put(mach);
495 1.1 maxv return error;
496 1.1 maxv }
497 1.1 maxv
498 1.8 maxv static void
499 1.8 maxv nvmm_do_vcpu_run(struct nvmm_machine *mach, struct nvmm_cpu *vcpu,
500 1.8 maxv struct nvmm_exit *exit)
501 1.8 maxv {
502 1.8 maxv struct vmspace *vm = mach->vm;
503 1.8 maxv
504 1.8 maxv while (1) {
505 1.8 maxv (*nvmm_impl->vcpu_run)(mach, vcpu, exit);
506 1.8 maxv
507 1.8 maxv if (__predict_true(exit->reason != NVMM_EXIT_MEMORY)) {
508 1.8 maxv break;
509 1.8 maxv }
510 1.10 maxv if (exit->u.mem.gpa >= mach->gpa_end) {
511 1.10 maxv break;
512 1.10 maxv }
513 1.11 maxv if (uvm_fault(&vm->vm_map, exit->u.mem.gpa, exit->u.mem.prot)) {
514 1.8 maxv break;
515 1.8 maxv }
516 1.8 maxv }
517 1.8 maxv }
518 1.8 maxv
519 1.1 maxv static int
520 1.14 maxv nvmm_vcpu_run(struct nvmm_owner *owner, struct nvmm_ioc_vcpu_run *args)
521 1.1 maxv {
522 1.1 maxv struct nvmm_machine *mach;
523 1.1 maxv struct nvmm_cpu *vcpu;
524 1.1 maxv int error;
525 1.1 maxv
526 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
527 1.1 maxv if (error)
528 1.1 maxv return error;
529 1.1 maxv
530 1.1 maxv error = nvmm_vcpu_get(mach, args->cpuid, &vcpu);
531 1.1 maxv if (error)
532 1.1 maxv goto out;
533 1.1 maxv
534 1.8 maxv nvmm_do_vcpu_run(mach, vcpu, &args->exit);
535 1.1 maxv nvmm_vcpu_put(vcpu);
536 1.1 maxv
537 1.1 maxv out:
538 1.1 maxv nvmm_machine_put(mach);
539 1.1 maxv return error;
540 1.1 maxv }
541 1.1 maxv
542 1.1 maxv /* -------------------------------------------------------------------------- */
543 1.1 maxv
544 1.4 maxv static struct uvm_object *
545 1.9 maxv nvmm_hmapping_getuobj(struct nvmm_machine *mach, uintptr_t hva, size_t size,
546 1.4 maxv size_t *off)
547 1.4 maxv {
548 1.9 maxv struct nvmm_hmapping *hmapping;
549 1.4 maxv size_t i;
550 1.4 maxv
551 1.9 maxv for (i = 0; i < NVMM_MAX_HMAPPINGS; i++) {
552 1.9 maxv hmapping = &mach->hmap[i];
553 1.9 maxv if (!hmapping->present) {
554 1.4 maxv continue;
555 1.4 maxv }
556 1.9 maxv if (hva >= hmapping->hva &&
557 1.9 maxv hva + size <= hmapping->hva + hmapping->size) {
558 1.9 maxv *off = hva - hmapping->hva;
559 1.9 maxv return hmapping->uobj;
560 1.4 maxv }
561 1.4 maxv }
562 1.4 maxv
563 1.4 maxv return NULL;
564 1.4 maxv }
565 1.4 maxv
566 1.4 maxv static int
567 1.9 maxv nvmm_hmapping_validate(struct nvmm_machine *mach, uintptr_t hva, size_t size)
568 1.4 maxv {
569 1.9 maxv struct nvmm_hmapping *hmapping;
570 1.4 maxv size_t i;
571 1.4 maxv
572 1.4 maxv if ((hva % PAGE_SIZE) != 0 || (size % PAGE_SIZE) != 0) {
573 1.4 maxv return EINVAL;
574 1.4 maxv }
575 1.4 maxv if (hva == 0) {
576 1.4 maxv return EINVAL;
577 1.4 maxv }
578 1.4 maxv
579 1.9 maxv for (i = 0; i < NVMM_MAX_HMAPPINGS; i++) {
580 1.9 maxv hmapping = &mach->hmap[i];
581 1.9 maxv if (!hmapping->present) {
582 1.4 maxv continue;
583 1.4 maxv }
584 1.4 maxv
585 1.9 maxv if (hva >= hmapping->hva &&
586 1.9 maxv hva + size <= hmapping->hva + hmapping->size) {
587 1.4 maxv break;
588 1.4 maxv }
589 1.4 maxv
590 1.9 maxv if (hva >= hmapping->hva &&
591 1.9 maxv hva < hmapping->hva + hmapping->size) {
592 1.4 maxv return EEXIST;
593 1.4 maxv }
594 1.9 maxv if (hva + size > hmapping->hva &&
595 1.9 maxv hva + size <= hmapping->hva + hmapping->size) {
596 1.4 maxv return EEXIST;
597 1.4 maxv }
598 1.9 maxv if (hva <= hmapping->hva &&
599 1.9 maxv hva + size >= hmapping->hva + hmapping->size) {
600 1.4 maxv return EEXIST;
601 1.4 maxv }
602 1.4 maxv }
603 1.4 maxv
604 1.4 maxv return 0;
605 1.4 maxv }
606 1.4 maxv
607 1.9 maxv static struct nvmm_hmapping *
608 1.9 maxv nvmm_hmapping_alloc(struct nvmm_machine *mach)
609 1.4 maxv {
610 1.9 maxv struct nvmm_hmapping *hmapping;
611 1.4 maxv size_t i;
612 1.4 maxv
613 1.9 maxv for (i = 0; i < NVMM_MAX_HMAPPINGS; i++) {
614 1.9 maxv hmapping = &mach->hmap[i];
615 1.9 maxv if (!hmapping->present) {
616 1.9 maxv hmapping->present = true;
617 1.9 maxv return hmapping;
618 1.4 maxv }
619 1.4 maxv }
620 1.4 maxv
621 1.4 maxv return NULL;
622 1.4 maxv }
623 1.4 maxv
624 1.9 maxv static int
625 1.9 maxv nvmm_hmapping_free(struct nvmm_machine *mach, uintptr_t hva, size_t size)
626 1.4 maxv {
627 1.4 maxv struct vmspace *vmspace = curproc->p_vmspace;
628 1.9 maxv struct nvmm_hmapping *hmapping;
629 1.9 maxv size_t i;
630 1.4 maxv
631 1.9 maxv for (i = 0; i < NVMM_MAX_HMAPPINGS; i++) {
632 1.9 maxv hmapping = &mach->hmap[i];
633 1.9 maxv if (!hmapping->present || hmapping->hva != hva ||
634 1.9 maxv hmapping->size != size) {
635 1.9 maxv continue;
636 1.9 maxv }
637 1.9 maxv
638 1.9 maxv uvm_unmap(&vmspace->vm_map, hmapping->hva,
639 1.9 maxv hmapping->hva + hmapping->size);
640 1.9 maxv uao_detach(hmapping->uobj);
641 1.4 maxv
642 1.9 maxv hmapping->uobj = NULL;
643 1.9 maxv hmapping->present = false;
644 1.9 maxv
645 1.9 maxv return 0;
646 1.9 maxv }
647 1.9 maxv
648 1.9 maxv return ENOENT;
649 1.4 maxv }
650 1.4 maxv
651 1.4 maxv static int
652 1.14 maxv nvmm_hva_map(struct nvmm_owner *owner, struct nvmm_ioc_hva_map *args)
653 1.4 maxv {
654 1.4 maxv struct vmspace *vmspace = curproc->p_vmspace;
655 1.4 maxv struct nvmm_machine *mach;
656 1.9 maxv struct nvmm_hmapping *hmapping;
657 1.4 maxv vaddr_t uva;
658 1.4 maxv int error;
659 1.4 maxv
660 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, true);
661 1.4 maxv if (error)
662 1.4 maxv return error;
663 1.4 maxv
664 1.9 maxv error = nvmm_hmapping_validate(mach, args->hva, args->size);
665 1.4 maxv if (error)
666 1.4 maxv goto out;
667 1.4 maxv
668 1.9 maxv hmapping = nvmm_hmapping_alloc(mach);
669 1.9 maxv if (hmapping == NULL) {
670 1.4 maxv error = ENOBUFS;
671 1.4 maxv goto out;
672 1.4 maxv }
673 1.4 maxv
674 1.9 maxv hmapping->hva = args->hva;
675 1.9 maxv hmapping->size = args->size;
676 1.9 maxv hmapping->uobj = uao_create(hmapping->size, 0);
677 1.9 maxv uva = hmapping->hva;
678 1.4 maxv
679 1.4 maxv /* Take a reference for the user. */
680 1.9 maxv uao_reference(hmapping->uobj);
681 1.4 maxv
682 1.4 maxv /* Map the uobj into the user address space, as pageable. */
683 1.9 maxv error = uvm_map(&vmspace->vm_map, &uva, hmapping->size, hmapping->uobj,
684 1.9 maxv 0, 0, UVM_MAPFLAG(UVM_PROT_RW, UVM_PROT_RW, UVM_INH_SHARE,
685 1.4 maxv UVM_ADV_RANDOM, UVM_FLAG_FIXED|UVM_FLAG_UNMAP));
686 1.4 maxv if (error) {
687 1.9 maxv uao_detach(hmapping->uobj);
688 1.4 maxv }
689 1.4 maxv
690 1.4 maxv out:
691 1.4 maxv nvmm_machine_put(mach);
692 1.4 maxv return error;
693 1.4 maxv }
694 1.4 maxv
695 1.4 maxv static int
696 1.14 maxv nvmm_hva_unmap(struct nvmm_owner *owner, struct nvmm_ioc_hva_unmap *args)
697 1.4 maxv {
698 1.4 maxv struct nvmm_machine *mach;
699 1.4 maxv int error;
700 1.4 maxv
701 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, true);
702 1.4 maxv if (error)
703 1.4 maxv return error;
704 1.4 maxv
705 1.9 maxv error = nvmm_hmapping_free(mach, args->hva, args->size);
706 1.4 maxv
707 1.4 maxv nvmm_machine_put(mach);
708 1.9 maxv return error;
709 1.4 maxv }
710 1.4 maxv
711 1.4 maxv /* -------------------------------------------------------------------------- */
712 1.4 maxv
713 1.1 maxv static int
714 1.14 maxv nvmm_gpa_map(struct nvmm_owner *owner, struct nvmm_ioc_gpa_map *args)
715 1.1 maxv {
716 1.1 maxv struct nvmm_machine *mach;
717 1.4 maxv struct uvm_object *uobj;
718 1.1 maxv gpaddr_t gpa;
719 1.4 maxv size_t off;
720 1.1 maxv int error;
721 1.1 maxv
722 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
723 1.1 maxv if (error)
724 1.1 maxv return error;
725 1.1 maxv
726 1.11 maxv if ((args->prot & ~(PROT_READ|PROT_WRITE|PROT_EXEC)) != 0) {
727 1.11 maxv error = EINVAL;
728 1.11 maxv goto out;
729 1.11 maxv }
730 1.11 maxv
731 1.1 maxv if ((args->gpa % PAGE_SIZE) != 0 || (args->size % PAGE_SIZE) != 0 ||
732 1.1 maxv (args->hva % PAGE_SIZE) != 0) {
733 1.1 maxv error = EINVAL;
734 1.1 maxv goto out;
735 1.1 maxv }
736 1.1 maxv if (args->hva == 0) {
737 1.1 maxv error = EINVAL;
738 1.1 maxv goto out;
739 1.1 maxv }
740 1.1 maxv if (args->gpa < mach->gpa_begin || args->gpa >= mach->gpa_end) {
741 1.1 maxv error = EINVAL;
742 1.1 maxv goto out;
743 1.1 maxv }
744 1.1 maxv if (args->gpa + args->size <= args->gpa) {
745 1.1 maxv error = EINVAL;
746 1.1 maxv goto out;
747 1.1 maxv }
748 1.3 maxv if (args->gpa + args->size > mach->gpa_end) {
749 1.1 maxv error = EINVAL;
750 1.1 maxv goto out;
751 1.1 maxv }
752 1.1 maxv gpa = args->gpa;
753 1.1 maxv
754 1.9 maxv uobj = nvmm_hmapping_getuobj(mach, args->hva, args->size, &off);
755 1.4 maxv if (uobj == NULL) {
756 1.4 maxv error = EINVAL;
757 1.4 maxv goto out;
758 1.4 maxv }
759 1.4 maxv
760 1.4 maxv /* Take a reference for the machine. */
761 1.4 maxv uao_reference(uobj);
762 1.1 maxv
763 1.1 maxv /* Map the uobj into the machine address space, as pageable. */
764 1.4 maxv error = uvm_map(&mach->vm->vm_map, &gpa, args->size, uobj, off, 0,
765 1.11 maxv UVM_MAPFLAG(args->prot, UVM_PROT_RWX, UVM_INH_NONE,
766 1.4 maxv UVM_ADV_RANDOM, UVM_FLAG_FIXED|UVM_FLAG_UNMAP));
767 1.1 maxv if (error) {
768 1.4 maxv uao_detach(uobj);
769 1.1 maxv goto out;
770 1.1 maxv }
771 1.1 maxv if (gpa != args->gpa) {
772 1.4 maxv uao_detach(uobj);
773 1.1 maxv printf("[!] uvm_map problem\n");
774 1.1 maxv error = EINVAL;
775 1.1 maxv goto out;
776 1.1 maxv }
777 1.1 maxv
778 1.1 maxv out:
779 1.1 maxv nvmm_machine_put(mach);
780 1.1 maxv return error;
781 1.1 maxv }
782 1.1 maxv
783 1.1 maxv static int
784 1.14 maxv nvmm_gpa_unmap(struct nvmm_owner *owner, struct nvmm_ioc_gpa_unmap *args)
785 1.1 maxv {
786 1.1 maxv struct nvmm_machine *mach;
787 1.1 maxv gpaddr_t gpa;
788 1.1 maxv int error;
789 1.1 maxv
790 1.14 maxv error = nvmm_machine_get(owner, args->machid, &mach, false);
791 1.1 maxv if (error)
792 1.1 maxv return error;
793 1.1 maxv
794 1.1 maxv if ((args->gpa % PAGE_SIZE) != 0 || (args->size % PAGE_SIZE) != 0) {
795 1.1 maxv error = EINVAL;
796 1.1 maxv goto out;
797 1.1 maxv }
798 1.1 maxv if (args->gpa < mach->gpa_begin || args->gpa >= mach->gpa_end) {
799 1.1 maxv error = EINVAL;
800 1.1 maxv goto out;
801 1.1 maxv }
802 1.1 maxv if (args->gpa + args->size <= args->gpa) {
803 1.1 maxv error = EINVAL;
804 1.1 maxv goto out;
805 1.1 maxv }
806 1.1 maxv if (args->gpa + args->size >= mach->gpa_end) {
807 1.1 maxv error = EINVAL;
808 1.1 maxv goto out;
809 1.1 maxv }
810 1.1 maxv gpa = args->gpa;
811 1.1 maxv
812 1.1 maxv /* Unmap the memory from the machine. */
813 1.1 maxv uvm_unmap(&mach->vm->vm_map, gpa, gpa + args->size);
814 1.1 maxv
815 1.1 maxv out:
816 1.1 maxv nvmm_machine_put(mach);
817 1.1 maxv return error;
818 1.1 maxv }
819 1.1 maxv
820 1.1 maxv /* -------------------------------------------------------------------------- */
821 1.1 maxv
822 1.1 maxv static int
823 1.17 maxv nvmm_ctl_mach_info(struct nvmm_ioc_ctl *args)
824 1.17 maxv {
825 1.17 maxv struct nvmm_ctl_mach_info ctl;
826 1.17 maxv struct nvmm_machine *mach;
827 1.17 maxv struct nvmm_cpu *vcpu;
828 1.17 maxv int error;
829 1.17 maxv size_t i;
830 1.17 maxv
831 1.17 maxv if (args->size != sizeof(ctl))
832 1.17 maxv return EINVAL;
833 1.17 maxv error = copyin(args->data, &ctl, sizeof(ctl));
834 1.17 maxv if (error)
835 1.17 maxv return error;
836 1.17 maxv
837 1.17 maxv error = nvmm_machine_get(&root_owner, ctl.machid, &mach, true);
838 1.17 maxv if (error)
839 1.17 maxv return error;
840 1.17 maxv
841 1.17 maxv ctl.nvcpus = 0;
842 1.17 maxv for (i = 0; i < NVMM_MAX_VCPUS; i++) {
843 1.17 maxv error = nvmm_vcpu_get(mach, i, &vcpu);
844 1.17 maxv if (error)
845 1.17 maxv continue;
846 1.17 maxv ctl.nvcpus++;
847 1.17 maxv nvmm_vcpu_put(vcpu);
848 1.17 maxv }
849 1.17 maxv ctl.pid = mach->owner->pid;
850 1.17 maxv ctl.time = mach->time;
851 1.17 maxv
852 1.17 maxv nvmm_machine_put(mach);
853 1.17 maxv
854 1.17 maxv error = copyout(&ctl, args->data, sizeof(ctl));
855 1.17 maxv if (error)
856 1.17 maxv return error;
857 1.17 maxv
858 1.17 maxv return 0;
859 1.17 maxv }
860 1.17 maxv
861 1.17 maxv static int
862 1.17 maxv nvmm_ctl(struct nvmm_owner *owner, struct nvmm_ioc_ctl *args)
863 1.17 maxv {
864 1.17 maxv int error;
865 1.17 maxv
866 1.17 maxv error = kauth_authorize_device(curlwp->l_cred, KAUTH_DEVICE_NVMM_CTL,
867 1.17 maxv NULL, NULL, NULL, NULL);
868 1.17 maxv if (error)
869 1.17 maxv return error;
870 1.17 maxv
871 1.17 maxv switch (args->op) {
872 1.17 maxv case NVMM_CTL_MACH_INFO:
873 1.17 maxv return nvmm_ctl_mach_info(args);
874 1.17 maxv default:
875 1.17 maxv return EINVAL;
876 1.17 maxv }
877 1.17 maxv }
878 1.17 maxv
879 1.17 maxv /* -------------------------------------------------------------------------- */
880 1.17 maxv
881 1.17 maxv static int
882 1.1 maxv nvmm_init(void)
883 1.1 maxv {
884 1.1 maxv size_t i, n;
885 1.1 maxv
886 1.1 maxv for (i = 0; i < __arraycount(nvmm_impl_list); i++) {
887 1.1 maxv if (!(*nvmm_impl_list[i]->ident)()) {
888 1.1 maxv continue;
889 1.1 maxv }
890 1.1 maxv nvmm_impl = nvmm_impl_list[i];
891 1.1 maxv break;
892 1.1 maxv }
893 1.1 maxv if (nvmm_impl == NULL) {
894 1.1 maxv printf("[!] No implementation found\n");
895 1.1 maxv return ENOTSUP;
896 1.1 maxv }
897 1.1 maxv
898 1.1 maxv for (i = 0; i < NVMM_MAX_MACHINES; i++) {
899 1.1 maxv machines[i].machid = i;
900 1.1 maxv rw_init(&machines[i].lock);
901 1.1 maxv for (n = 0; n < NVMM_MAX_VCPUS; n++) {
902 1.1 maxv mutex_init(&machines[i].cpus[n].lock, MUTEX_DEFAULT,
903 1.1 maxv IPL_NONE);
904 1.1 maxv machines[i].cpus[n].hcpu_last = -1;
905 1.1 maxv }
906 1.1 maxv }
907 1.1 maxv
908 1.1 maxv (*nvmm_impl->init)();
909 1.1 maxv
910 1.1 maxv return 0;
911 1.1 maxv }
912 1.1 maxv
913 1.1 maxv static void
914 1.1 maxv nvmm_fini(void)
915 1.1 maxv {
916 1.1 maxv size_t i, n;
917 1.1 maxv
918 1.1 maxv for (i = 0; i < NVMM_MAX_MACHINES; i++) {
919 1.1 maxv rw_destroy(&machines[i].lock);
920 1.1 maxv for (n = 0; n < NVMM_MAX_VCPUS; n++) {
921 1.1 maxv mutex_destroy(&machines[i].cpus[n].lock);
922 1.1 maxv }
923 1.1 maxv }
924 1.1 maxv
925 1.1 maxv (*nvmm_impl->fini)();
926 1.1 maxv }
927 1.1 maxv
928 1.1 maxv /* -------------------------------------------------------------------------- */
929 1.1 maxv
930 1.14 maxv static dev_type_open(nvmm_open);
931 1.14 maxv
932 1.14 maxv const struct cdevsw nvmm_cdevsw = {
933 1.14 maxv .d_open = nvmm_open,
934 1.14 maxv .d_close = noclose,
935 1.14 maxv .d_read = noread,
936 1.14 maxv .d_write = nowrite,
937 1.14 maxv .d_ioctl = noioctl,
938 1.14 maxv .d_stop = nostop,
939 1.14 maxv .d_tty = notty,
940 1.14 maxv .d_poll = nopoll,
941 1.14 maxv .d_mmap = nommap,
942 1.14 maxv .d_kqfilter = nokqfilter,
943 1.14 maxv .d_discard = nodiscard,
944 1.14 maxv .d_flag = D_OTHER | D_MPSAFE
945 1.14 maxv };
946 1.14 maxv
947 1.14 maxv static int nvmm_ioctl(file_t *, u_long, void *);
948 1.14 maxv static int nvmm_close(file_t *);
949 1.14 maxv
950 1.14 maxv const struct fileops nvmm_fileops = {
951 1.14 maxv .fo_read = fbadop_read,
952 1.14 maxv .fo_write = fbadop_write,
953 1.14 maxv .fo_ioctl = nvmm_ioctl,
954 1.14 maxv .fo_fcntl = fnullop_fcntl,
955 1.14 maxv .fo_poll = fnullop_poll,
956 1.14 maxv .fo_stat = fbadop_stat,
957 1.14 maxv .fo_close = nvmm_close,
958 1.14 maxv .fo_kqfilter = fnullop_kqfilter,
959 1.14 maxv .fo_restart = fnullop_restart,
960 1.14 maxv .fo_mmap = NULL,
961 1.14 maxv };
962 1.14 maxv
963 1.1 maxv static int
964 1.1 maxv nvmm_open(dev_t dev, int flags, int type, struct lwp *l)
965 1.1 maxv {
966 1.14 maxv struct nvmm_owner *owner;
967 1.14 maxv struct file *fp;
968 1.14 maxv int error, fd;
969 1.14 maxv
970 1.14 maxv if (minor(dev) != 0)
971 1.1 maxv return EXDEV;
972 1.14 maxv error = fd_allocfile(&fp, &fd);
973 1.14 maxv if (error)
974 1.14 maxv return error;
975 1.14 maxv
976 1.14 maxv owner = kmem_alloc(sizeof(*owner), KM_SLEEP);
977 1.14 maxv owner->pid = l->l_proc->p_pid;
978 1.1 maxv
979 1.14 maxv return fd_clone(fp, fd, flags, &nvmm_fileops, owner);
980 1.1 maxv }
981 1.1 maxv
982 1.1 maxv static int
983 1.14 maxv nvmm_close(file_t *fp)
984 1.1 maxv {
985 1.14 maxv struct nvmm_owner *owner = fp->f_data;
986 1.1 maxv
987 1.14 maxv KASSERT(owner != NULL);
988 1.14 maxv nvmm_kill_machines(owner);
989 1.14 maxv kmem_free(owner, sizeof(*owner));
990 1.14 maxv fp->f_data = NULL;
991 1.1 maxv
992 1.14 maxv return 0;
993 1.1 maxv }
994 1.1 maxv
995 1.1 maxv static int
996 1.14 maxv nvmm_ioctl(file_t *fp, u_long cmd, void *data)
997 1.1 maxv {
998 1.14 maxv struct nvmm_owner *owner = fp->f_data;
999 1.14 maxv
1000 1.14 maxv KASSERT(owner != NULL);
1001 1.1 maxv
1002 1.1 maxv switch (cmd) {
1003 1.1 maxv case NVMM_IOC_CAPABILITY:
1004 1.14 maxv return nvmm_capability(owner, data);
1005 1.1 maxv case NVMM_IOC_MACHINE_CREATE:
1006 1.14 maxv return nvmm_machine_create(owner, data);
1007 1.1 maxv case NVMM_IOC_MACHINE_DESTROY:
1008 1.14 maxv return nvmm_machine_destroy(owner, data);
1009 1.1 maxv case NVMM_IOC_MACHINE_CONFIGURE:
1010 1.14 maxv return nvmm_machine_configure(owner, data);
1011 1.1 maxv case NVMM_IOC_VCPU_CREATE:
1012 1.14 maxv return nvmm_vcpu_create(owner, data);
1013 1.1 maxv case NVMM_IOC_VCPU_DESTROY:
1014 1.14 maxv return nvmm_vcpu_destroy(owner, data);
1015 1.1 maxv case NVMM_IOC_VCPU_SETSTATE:
1016 1.14 maxv return nvmm_vcpu_setstate(owner, data);
1017 1.1 maxv case NVMM_IOC_VCPU_GETSTATE:
1018 1.14 maxv return nvmm_vcpu_getstate(owner, data);
1019 1.1 maxv case NVMM_IOC_VCPU_INJECT:
1020 1.14 maxv return nvmm_vcpu_inject(owner, data);
1021 1.1 maxv case NVMM_IOC_VCPU_RUN:
1022 1.14 maxv return nvmm_vcpu_run(owner, data);
1023 1.1 maxv case NVMM_IOC_GPA_MAP:
1024 1.14 maxv return nvmm_gpa_map(owner, data);
1025 1.1 maxv case NVMM_IOC_GPA_UNMAP:
1026 1.14 maxv return nvmm_gpa_unmap(owner, data);
1027 1.4 maxv case NVMM_IOC_HVA_MAP:
1028 1.14 maxv return nvmm_hva_map(owner, data);
1029 1.4 maxv case NVMM_IOC_HVA_UNMAP:
1030 1.14 maxv return nvmm_hva_unmap(owner, data);
1031 1.17 maxv case NVMM_IOC_CTL:
1032 1.17 maxv return nvmm_ctl(owner, data);
1033 1.1 maxv default:
1034 1.1 maxv return EINVAL;
1035 1.1 maxv }
1036 1.1 maxv }
1037 1.1 maxv
1038 1.14 maxv /* -------------------------------------------------------------------------- */
1039 1.1 maxv
1040 1.1 maxv void
1041 1.1 maxv nvmmattach(int nunits)
1042 1.1 maxv {
1043 1.1 maxv /* nothing */
1044 1.1 maxv }
1045 1.1 maxv
1046 1.16 maxv MODULE(MODULE_CLASS_MISC, nvmm, NULL);
1047 1.1 maxv
1048 1.1 maxv static int
1049 1.1 maxv nvmm_modcmd(modcmd_t cmd, void *arg)
1050 1.1 maxv {
1051 1.1 maxv int error;
1052 1.1 maxv
1053 1.1 maxv switch (cmd) {
1054 1.1 maxv case MODULE_CMD_INIT:
1055 1.1 maxv error = nvmm_init();
1056 1.1 maxv if (error)
1057 1.1 maxv return error;
1058 1.1 maxv
1059 1.1 maxv #if defined(_MODULE)
1060 1.1 maxv {
1061 1.1 maxv devmajor_t bmajor = NODEVMAJOR;
1062 1.1 maxv devmajor_t cmajor = 345;
1063 1.1 maxv
1064 1.1 maxv /* mknod /dev/nvmm c 345 0 */
1065 1.1 maxv error = devsw_attach("nvmm", NULL, &bmajor,
1066 1.1 maxv &nvmm_cdevsw, &cmajor);
1067 1.1 maxv if (error) {
1068 1.1 maxv nvmm_fini();
1069 1.1 maxv return error;
1070 1.1 maxv }
1071 1.1 maxv }
1072 1.1 maxv #endif
1073 1.1 maxv return 0;
1074 1.1 maxv
1075 1.1 maxv case MODULE_CMD_FINI:
1076 1.13 maxv if (nmachines > 0) {
1077 1.13 maxv return EBUSY;
1078 1.13 maxv }
1079 1.1 maxv #if defined(_MODULE)
1080 1.1 maxv {
1081 1.1 maxv error = devsw_detach(NULL, &nvmm_cdevsw);
1082 1.1 maxv if (error) {
1083 1.1 maxv return error;
1084 1.1 maxv }
1085 1.1 maxv }
1086 1.1 maxv #endif
1087 1.1 maxv nvmm_fini();
1088 1.1 maxv return 0;
1089 1.1 maxv
1090 1.13 maxv case MODULE_CMD_AUTOUNLOAD:
1091 1.13 maxv return EBUSY;
1092 1.13 maxv
1093 1.1 maxv default:
1094 1.1 maxv return ENOTTY;
1095 1.1 maxv }
1096 1.1 maxv }
1097