nvmm.h revision 1.4 1 /* $NetBSD: nvmm.h,v 1.4 2019/01/26 15:12:20 maxv Exp $ */
2
3 /*
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Maxime Villard.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef _NVMM_H_
33 #define _NVMM_H_
34
35 #include <sys/types.h>
36
37 #ifndef _KERNEL
38 #include <stdbool.h>
39 #endif
40
41 typedef uint64_t gpaddr_t;
42 typedef uint64_t gvaddr_t;
43
44 typedef uint32_t nvmm_machid_t;
45 typedef uint32_t nvmm_cpuid_t;
46
47 enum nvmm_exit_reason {
48 NVMM_EXIT_NONE = 0x0000000000000000,
49
50 /* General. */
51 NVMM_EXIT_MEMORY = 0x0000000000000001,
52 NVMM_EXIT_IO = 0x0000000000000002,
53 NVMM_EXIT_MSR = 0x0000000000000003,
54 NVMM_EXIT_INT_READY = 0x0000000000000004,
55 NVMM_EXIT_NMI_READY = 0x0000000000000005,
56 NVMM_EXIT_HALTED = 0x0000000000000006,
57 NVMM_EXIT_SHUTDOWN = 0x0000000000000007,
58
59 /* Instructions (x86). */
60 NVMM_EXIT_MONITOR = 0x0000000000001000,
61 NVMM_EXIT_MWAIT = 0x0000000000001001,
62 NVMM_EXIT_MWAIT_COND = 0x0000000000001002,
63
64 NVMM_EXIT_INVALID = 0xFFFFFFFFFFFFFFFF
65 };
66
67 enum nvmm_exit_memory_perm {
68 NVMM_EXIT_MEMORY_READ,
69 NVMM_EXIT_MEMORY_WRITE,
70 NVMM_EXIT_MEMORY_EXEC
71 };
72
73 struct nvmm_exit_memory {
74 enum nvmm_exit_memory_perm perm;
75 gpaddr_t gpa;
76 uint8_t inst_len;
77 uint8_t inst_bytes[15];
78 };
79
80 enum nvmm_exit_io_type {
81 NVMM_EXIT_IO_IN,
82 NVMM_EXIT_IO_OUT
83 };
84
85 struct nvmm_exit_io {
86 enum nvmm_exit_io_type type;
87 uint16_t port;
88 int seg;
89 uint8_t address_size;
90 uint8_t operand_size;
91 bool rep;
92 bool str;
93 uint64_t npc;
94 };
95
96 enum nvmm_exit_msr_type {
97 NVMM_EXIT_MSR_RDMSR,
98 NVMM_EXIT_MSR_WRMSR
99 };
100
101 struct nvmm_exit_msr {
102 enum nvmm_exit_msr_type type;
103 uint64_t msr;
104 uint64_t val;
105 uint64_t npc;
106 };
107
108 struct nvmm_exit_insn {
109 uint64_t npc;
110 };
111
112 struct nvmm_exit {
113 enum nvmm_exit_reason reason;
114 union {
115 struct nvmm_exit_memory mem;
116 struct nvmm_exit_io io;
117 struct nvmm_exit_msr msr;
118 struct nvmm_exit_insn insn;
119 } u;
120 uint64_t exitstate[8];
121 };
122
123 enum nvmm_event_type {
124 NVMM_EVENT_INTERRUPT_HW,
125 NVMM_EVENT_INTERRUPT_SW,
126 NVMM_EVENT_EXCEPTION
127 };
128
129 struct nvmm_event {
130 enum nvmm_event_type type;
131 uint64_t vector;
132 union {
133 /* NVMM_EVENT_INTERRUPT_HW */
134 uint8_t prio;
135
136 /* NVMM_EVENT_EXCEPTION */
137 uint64_t error;
138 } u;
139 };
140
141 #define NVMM_CAPABILITY_VERSION 1
142
143 struct nvmm_capability {
144 uint64_t version;
145 uint64_t state_size;
146 uint64_t max_machines;
147 uint64_t max_vcpus;
148 uint64_t max_ram;
149 union {
150 struct {
151 uint64_t xcr0_mask;
152 uint64_t mxcsr_mask;
153 uint64_t conf_cpuid_maxops;
154 } x86;
155 uint64_t rsvd[8];
156 } u;
157 };
158
159 #endif
160