nvmm_ioctl.h revision 1.3 1 1.3 maxv /* $NetBSD: nvmm_ioctl.h,v 1.3 2019/01/08 07:29:46 maxv Exp $ */
2 1.1 maxv
3 1.1 maxv /*
4 1.1 maxv * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 maxv * All rights reserved.
6 1.1 maxv *
7 1.1 maxv * This code is derived from software contributed to The NetBSD Foundation
8 1.1 maxv * by Maxime Villard.
9 1.1 maxv *
10 1.1 maxv * Redistribution and use in source and binary forms, with or without
11 1.1 maxv * modification, are permitted provided that the following conditions
12 1.1 maxv * are met:
13 1.1 maxv * 1. Redistributions of source code must retain the above copyright
14 1.1 maxv * notice, this list of conditions and the following disclaimer.
15 1.1 maxv * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 maxv * notice, this list of conditions and the following disclaimer in the
17 1.1 maxv * documentation and/or other materials provided with the distribution.
18 1.1 maxv *
19 1.1 maxv * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 maxv * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 maxv * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 maxv * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 maxv * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 maxv * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 maxv * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 maxv * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 maxv * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 maxv * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 maxv * POSSIBILITY OF SUCH DAMAGE.
30 1.1 maxv */
31 1.1 maxv
32 1.1 maxv #ifndef _NVMM_IOCTL_H_
33 1.1 maxv #define _NVMM_IOCTL_H_
34 1.1 maxv
35 1.1 maxv #include <dev/nvmm/nvmm.h>
36 1.1 maxv
37 1.1 maxv struct nvmm_ioc_capability {
38 1.1 maxv struct nvmm_capability cap;
39 1.1 maxv };
40 1.1 maxv
41 1.1 maxv struct nvmm_ioc_machine_create {
42 1.1 maxv nvmm_machid_t machid;
43 1.1 maxv };
44 1.1 maxv
45 1.1 maxv struct nvmm_ioc_machine_destroy {
46 1.1 maxv nvmm_machid_t machid;
47 1.1 maxv };
48 1.1 maxv
49 1.1 maxv struct nvmm_ioc_machine_configure {
50 1.1 maxv nvmm_machid_t machid;
51 1.1 maxv uint64_t op;
52 1.1 maxv void *conf;
53 1.1 maxv };
54 1.1 maxv
55 1.1 maxv struct nvmm_ioc_vcpu_create {
56 1.1 maxv nvmm_machid_t machid;
57 1.1 maxv nvmm_cpuid_t cpuid;
58 1.1 maxv };
59 1.1 maxv
60 1.1 maxv struct nvmm_ioc_vcpu_destroy {
61 1.1 maxv nvmm_machid_t machid;
62 1.1 maxv nvmm_cpuid_t cpuid;
63 1.1 maxv };
64 1.1 maxv
65 1.1 maxv struct nvmm_ioc_vcpu_setstate {
66 1.1 maxv nvmm_machid_t machid;
67 1.1 maxv nvmm_cpuid_t cpuid;
68 1.1 maxv uint64_t flags;
69 1.1 maxv void *state;
70 1.1 maxv };
71 1.1 maxv
72 1.1 maxv struct nvmm_ioc_vcpu_getstate {
73 1.1 maxv nvmm_machid_t machid;
74 1.1 maxv nvmm_cpuid_t cpuid;
75 1.1 maxv uint64_t flags;
76 1.1 maxv void *state;
77 1.1 maxv };
78 1.1 maxv
79 1.1 maxv struct nvmm_ioc_vcpu_inject {
80 1.1 maxv nvmm_machid_t machid;
81 1.1 maxv nvmm_cpuid_t cpuid;
82 1.1 maxv struct nvmm_event event;
83 1.1 maxv };
84 1.1 maxv
85 1.1 maxv struct nvmm_ioc_vcpu_run {
86 1.1 maxv /* input */
87 1.1 maxv nvmm_machid_t machid;
88 1.1 maxv nvmm_cpuid_t cpuid;
89 1.1 maxv /* output */
90 1.1 maxv struct nvmm_exit exit;
91 1.1 maxv };
92 1.1 maxv
93 1.2 maxv struct nvmm_ioc_hva_map {
94 1.2 maxv nvmm_machid_t machid;
95 1.2 maxv uintptr_t hva;
96 1.2 maxv size_t size;
97 1.2 maxv int flags;
98 1.2 maxv };
99 1.2 maxv
100 1.2 maxv struct nvmm_ioc_hva_unmap {
101 1.2 maxv nvmm_machid_t machid;
102 1.2 maxv uintptr_t hva;
103 1.2 maxv size_t size;
104 1.2 maxv int flags;
105 1.2 maxv };
106 1.2 maxv
107 1.1 maxv struct nvmm_ioc_gpa_map {
108 1.1 maxv nvmm_machid_t machid;
109 1.1 maxv uintptr_t hva;
110 1.1 maxv gpaddr_t gpa;
111 1.1 maxv size_t size;
112 1.1 maxv int flags;
113 1.1 maxv };
114 1.1 maxv
115 1.1 maxv struct nvmm_ioc_gpa_unmap {
116 1.1 maxv nvmm_machid_t machid;
117 1.1 maxv gpaddr_t gpa;
118 1.1 maxv size_t size;
119 1.1 maxv };
120 1.1 maxv
121 1.1 maxv #define NVMM_IOC_CAPABILITY _IOR ('N', 0, struct nvmm_ioc_capability)
122 1.1 maxv #define NVMM_IOC_MACHINE_CREATE _IOWR('N', 1, struct nvmm_ioc_machine_create)
123 1.1 maxv #define NVMM_IOC_MACHINE_DESTROY _IOW ('N', 2, struct nvmm_ioc_machine_destroy)
124 1.1 maxv #define NVMM_IOC_MACHINE_CONFIGURE _IOW ('N', 3, struct nvmm_ioc_machine_configure)
125 1.1 maxv #define NVMM_IOC_VCPU_CREATE _IOW ('N', 4, struct nvmm_ioc_vcpu_create)
126 1.1 maxv #define NVMM_IOC_VCPU_DESTROY _IOW ('N', 5, struct nvmm_ioc_vcpu_destroy)
127 1.1 maxv #define NVMM_IOC_VCPU_SETSTATE _IOW ('N', 6, struct nvmm_ioc_vcpu_setstate)
128 1.1 maxv #define NVMM_IOC_VCPU_GETSTATE _IOW ('N', 7, struct nvmm_ioc_vcpu_getstate)
129 1.3 maxv #define NVMM_IOC_VCPU_INJECT _IOW ('N', 8, struct nvmm_ioc_vcpu_inject)
130 1.1 maxv #define NVMM_IOC_VCPU_RUN _IOWR('N', 9, struct nvmm_ioc_vcpu_run)
131 1.1 maxv #define NVMM_IOC_GPA_MAP _IOW ('N', 10, struct nvmm_ioc_gpa_map)
132 1.1 maxv #define NVMM_IOC_GPA_UNMAP _IOW ('N', 11, struct nvmm_ioc_gpa_unmap)
133 1.2 maxv #define NVMM_IOC_HVA_MAP _IOW ('N', 12, struct nvmm_ioc_hva_map)
134 1.2 maxv #define NVMM_IOC_HVA_UNMAP _IOW ('N', 13, struct nvmm_ioc_hva_unmap)
135 1.1 maxv
136 1.1 maxv #endif /* _NVMM_IOCTL_H_ */
137