sb_ofisa.c revision 1.18 
1/*	$NetBSD: sb_ofisa.c,v 1.18 2016/12/09 17:18:35 christos Exp $	*/
2
3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: sb_ofisa.c,v 1.18 2016/12/09 17:18:35 christos Exp $");
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/device.h>
39
40#include <sys/bus.h>
41#include <sys/intr.h>
42
43#include <sys/audioio.h>
44#include <dev/audio_if.h>
45#include <dev/midi_if.h>
46#include <dev/mulaw.h>
47
48#include <dev/ofw/openfirm.h>
49#include <dev/isa/isavar.h>
50#include <dev/ofisa/ofisavar.h>
51
52#include <dev/isa/sbreg.h>
53#include <dev/isa/sbvar.h>
54#include <dev/isa/sbdspvar.h>
55
56int	sb_ofisa_match(device_t, cfdata_t, void *);
57void	sb_ofisa_attach(device_t, device_t, void *);
58
59CFATTACH_DECL_NEW(sb_ofisa, sizeof(struct sbdsp_softc),
60    sb_ofisa_match, sb_ofisa_attach, NULL, NULL);
61
62int
63sb_ofisa_match(device_t parent, cfdata_t cf, void *aux)
64{
65	struct ofisa_attach_args *aa = aux;
66	static const char *const compatible_strings[] = {
67		"pnpPNP,b000",			/* generic SB 1.5 */
68		"pnpPNP,b001",			/* generic SB 2.0 */
69		"pnpPNP,b002",			/* generic SB Pro */
70		"pnpPNP,b003",			/* generic SB 16 */
71		NULL,
72	};
73	int rv = 0;
74
75	if (of_compatible(aa->oba.oba_phandle, compatible_strings) != -1) {
76		/*
77		 * Use a low match priority so that a more specific driver
78		 * can match, e.g. a native ESS driver.
79		 */
80		rv = 1;
81	}
82
83	return (rv);
84}
85
86void
87sb_ofisa_attach(device_t parent, device_t self, void *aux)
88{
89	struct sbdsp_softc *sc = device_private(self);
90	struct ofisa_attach_args *aa = aux;
91	struct ofisa_reg_desc reg;
92	struct ofisa_intr_desc intr;
93	struct ofisa_dma_desc dma[2];
94	int ndrq;
95
96	sc->sc_dev = self;
97
98	/*
99	 * We're living on an OFW.  We have to ask the OFW what our
100	 * registers and interrupts properties look like.
101	 *
102	 * We expect:
103	 *
104	 *	1 i/o register region
105	 *	1 interrupt
106	 *	1 or 2 DMA channels
107	 */
108
109	n = ofisa_reg_get(aa->oba.oba_phandle, &reg, 1);
110	if (n != 1) {
111		aprint_error(": error getting register data\n");
112		return;
113	}
114	if (reg.type != OFISA_REG_TYPE_IO) {
115		aprint_error(": register type not i/o\n");
116		return;
117	}
118	if (reg.len != SB_NPORT && reg.len != SBP_NPORT) {
119		aprint_error(": weird register size (%lu, expected %d or %d)\n",
120		    (unsigned long)reg.len, SB_NPORT, SBP_NPORT);
121		return;
122	}
123
124	n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1);
125	if (n != 1) {
126		aprint_error(": error getting interrupt data\n");
127		return;
128	}
129
130	ndrq = ofisa_dma_get(aa->oba.oba_phandle, dma, 2);
131	if (ndrq != 1 && ndrq != 2) {
132		aprint_error(": error getting DMA data\n");
133		return;
134	}
135
136	sc->sc_ic = aa->ic;
137
138	sc->sc_iot = aa->iot;
139	if (bus_space_map(sc->sc_iot, reg.addr, reg.len, 0, &sc->sc_ioh)) {
140		aprint_error(": unable to map register space\n");
141		return;
142	}
143
144	/* XXX These are only for setting chip configuration registers. */
145	sc->sc_iobase = reg.addr;
146	sc->sc_irq = intr.irq;
147
148	sc->sc_drq8 = DRQUNK;
149	sc->sc_drq16 = DRQUNK;
150
151	for (n = 0; n < ndrq; n++) {
152		/* XXX check mode? */
153		switch (dma[n].width) {
154		case 8:
155			if (sc->sc_drq8 == DRQUNK)
156				sc->sc_drq8 = dma[n].drq;
157			break;
158		case 16:
159			if (sc->sc_drq16 == DRQUNK)
160				sc->sc_drq16 = dma[n].drq;
161			break;
162		default:
163			aprint_error(": weird DMA width %d\n", dma[n].width);
164			return;
165		}
166	}
167
168	if (sc->sc_drq8 == DRQUNK) {
169		aprint_error(": no 8-bit DMA channel\n");
170		return;
171	}
172
173	if (sbmatch(sc) == 0) {
174		aprint_error(": sbmatch failed\n");
175		return;
176	}
177
178	sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, IST_EDGE, IPL_AUDIO,
179	    sbdsp_intr, sc);
180
181	ofisa_print_model(self, aa->oba.oba_phandle);
182
183	sbattach(sc);
184}
185