sb_ofisa.c revision 1.19
1/* $NetBSD: sb_ofisa.c,v 1.19 2019/05/08 13:40:18 isaki Exp $ */ 2 3/*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__KERNEL_RCSID(0, "$NetBSD: sb_ofisa.c,v 1.19 2019/05/08 13:40:18 isaki Exp $"); 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/device.h> 39 40#include <sys/bus.h> 41#include <sys/intr.h> 42 43#include <sys/audioio.h> 44#include <dev/audio/audio_if.h> 45#include <dev/midi_if.h> 46 47#include <dev/ofw/openfirm.h> 48#include <dev/isa/isavar.h> 49#include <dev/ofisa/ofisavar.h> 50 51#include <dev/isa/sbreg.h> 52#include <dev/isa/sbvar.h> 53#include <dev/isa/sbdspvar.h> 54 55int sb_ofisa_match(device_t, cfdata_t, void *); 56void sb_ofisa_attach(device_t, device_t, void *); 57 58CFATTACH_DECL_NEW(sb_ofisa, sizeof(struct sbdsp_softc), 59 sb_ofisa_match, sb_ofisa_attach, NULL, NULL); 60 61int 62sb_ofisa_match(device_t parent, cfdata_t cf, void *aux) 63{ 64 struct ofisa_attach_args *aa = aux; 65 static const char *const compatible_strings[] = { 66 "pnpPNP,b000", /* generic SB 1.5 */ 67 "pnpPNP,b001", /* generic SB 2.0 */ 68 "pnpPNP,b002", /* generic SB Pro */ 69 "pnpPNP,b003", /* generic SB 16 */ 70 NULL, 71 }; 72 int rv = 0; 73 74 if (of_compatible(aa->oba.oba_phandle, compatible_strings) != -1) { 75 /* 76 * Use a low match priority so that a more specific driver 77 * can match, e.g. a native ESS driver. 78 */ 79 rv = 1; 80 } 81 82 return (rv); 83} 84 85void 86sb_ofisa_attach(device_t parent, device_t self, void *aux) 87{ 88 struct sbdsp_softc *sc = device_private(self); 89 struct ofisa_attach_args *aa = aux; 90 struct ofisa_reg_desc reg; 91 struct ofisa_intr_desc intr; 92 struct ofisa_dma_desc dma[2]; 93 int ndrq; 94 95 sc->sc_dev = self; 96 97 /* 98 * We're living on an OFW. We have to ask the OFW what our 99 * registers and interrupts properties look like. 100 * 101 * We expect: 102 * 103 * 1 i/o register region 104 * 1 interrupt 105 * 1 or 2 DMA channels 106 */ 107 108 n = ofisa_reg_get(aa->oba.oba_phandle, ®, 1); 109 if (n != 1) { 110 aprint_error(": error getting register data\n"); 111 return; 112 } 113 if (reg.type != OFISA_REG_TYPE_IO) { 114 aprint_error(": register type not i/o\n"); 115 return; 116 } 117 if (reg.len != SB_NPORT && reg.len != SBP_NPORT) { 118 aprint_error(": weird register size (%lu, expected %d or %d)\n", 119 (unsigned long)reg.len, SB_NPORT, SBP_NPORT); 120 return; 121 } 122 123 n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1); 124 if (n != 1) { 125 aprint_error(": error getting interrupt data\n"); 126 return; 127 } 128 129 ndrq = ofisa_dma_get(aa->oba.oba_phandle, dma, 2); 130 if (ndrq != 1 && ndrq != 2) { 131 aprint_error(": error getting DMA data\n"); 132 return; 133 } 134 135 sc->sc_ic = aa->ic; 136 137 sc->sc_iot = aa->iot; 138 if (bus_space_map(sc->sc_iot, reg.addr, reg.len, 0, &sc->sc_ioh)) { 139 aprint_error(": unable to map register space\n"); 140 return; 141 } 142 143 /* XXX These are only for setting chip configuration registers. */ 144 sc->sc_iobase = reg.addr; 145 sc->sc_irq = intr.irq; 146 147 sc->sc_drq8 = DRQUNK; 148 sc->sc_drq16 = DRQUNK; 149 150 for (n = 0; n < ndrq; n++) { 151 /* XXX check mode? */ 152 switch (dma[n].width) { 153 case 8: 154 if (sc->sc_drq8 == DRQUNK) 155 sc->sc_drq8 = dma[n].drq; 156 break; 157 case 16: 158 if (sc->sc_drq16 == DRQUNK) 159 sc->sc_drq16 = dma[n].drq; 160 break; 161 default: 162 aprint_error(": weird DMA width %d\n", dma[n].width); 163 return; 164 } 165 } 166 167 if (sc->sc_drq8 == DRQUNK) { 168 aprint_error(": no 8-bit DMA channel\n"); 169 return; 170 } 171 172 if (sbmatch(sc) == 0) { 173 aprint_error(": sbmatch failed\n"); 174 return; 175 } 176 177 sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, IST_EDGE, IPL_AUDIO, 178 sbdsp_intr, sc); 179 180 ofisa_print_model(self, aa->oba.oba_phandle); 181 182 sbattach(sc); 183} 184