ofw_pci.h revision 1.4 1 1.4 mrg /* $NetBSD: ofw_pci.h,v 1.4 2001/02/17 16:28:37 mrg Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 thorpej * NASA Ames Research Center.
10 1.1 thorpej *
11 1.1 thorpej * Redistribution and use in source and binary forms, with or without
12 1.1 thorpej * modification, are permitted provided that the following conditions
13 1.1 thorpej * are met:
14 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer.
16 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.1 thorpej * documentation and/or other materials provided with the distribution.
19 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
20 1.1 thorpej * must display the following acknowledgement:
21 1.1 thorpej * This product includes software developed by the NetBSD
22 1.1 thorpej * Foundation, Inc. and its contributors.
23 1.1 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 thorpej * contributors may be used to endorse or promote products derived
25 1.1 thorpej * from this software without specific prior written permission.
26 1.1 thorpej *
27 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
38 1.1 thorpej */
39 1.1 thorpej
40 1.1 thorpej #ifndef _DEV_OFW_OFW_PCI_H_
41 1.1 thorpej #define _DEV_OFW_OFW_PCI_H_
42 1.1 thorpej
43 1.1 thorpej /*
44 1.1 thorpej * PCI Bus Binding to:
45 1.1 thorpej *
46 1.1 thorpej * IEEE Std 1275-1994
47 1.1 thorpej * Standard for Boot (Initialization Configuration) Firmware
48 1.1 thorpej *
49 1.1 thorpej * Revision 2.1
50 1.1 thorpej */
51 1.1 thorpej
52 1.1 thorpej /*
53 1.1 thorpej * Section 2.2.1. Physical Address Formats
54 1.1 thorpej *
55 1.1 thorpej * A PCI physical address is represented by 3 address cells:
56 1.1 thorpej *
57 1.1 thorpej * phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr
58 1.1 thorpej * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
59 1.1 thorpej * phys.lo cell: llllllll llllllll llllllll llllllll
60 1.1 thorpej *
61 1.1 thorpej * n nonrelocatable
62 1.1 thorpej * p prefectable
63 1.1 thorpej * t aliased below 1MB (memory) or 64k (i/o)
64 1.1 thorpej * ss space code
65 1.1 thorpej * b bus number
66 1.1 thorpej * d device number
67 1.1 thorpej * f function number
68 1.1 thorpej * r register number
69 1.1 thorpej * h high 32-bits of PCI address
70 1.1 thorpej * l low 32-bits of PCI address
71 1.1 thorpej */
72 1.1 thorpej
73 1.1 thorpej #define OFW_PCI_PHYS_HI_NONRELOCATABLE 0x80000000
74 1.1 thorpej #define OFW_PCI_PHYS_HI_PREFETCHABLE 0x40000000
75 1.1 thorpej #define OFW_PCI_PHYS_HI_ALIASED 0x20000000
76 1.1 thorpej #define OFW_PCI_PHYS_HI_SPACEMASK 0x03000000
77 1.1 thorpej #define OFW_PCI_PHYS_HI_BUSMASK 0x00ff0000
78 1.1 thorpej #define OFW_PCI_PHYS_HI_BUSSHIFT 16
79 1.2 tsubai #define OFW_PCI_PHYS_HI_DEVICEMASK 0x0000f800
80 1.1 thorpej #define OFW_PCI_PHYS_HI_DEVICESHIFT 11
81 1.1 thorpej #define OFW_PCI_PHYS_HI_FUNCTIONMASK 0x00000700
82 1.1 thorpej #define OFW_PCI_PHYS_HI_FUNCTIONSHIFT 8
83 1.1 thorpej #define OFW_PCI_PHYS_HI_REGISTERMASK 0x000000ff
84 1.1 thorpej
85 1.1 thorpej #define OFW_PCI_PHYS_HI_SPACE_CONFIG 0x00000000
86 1.1 thorpej #define OFW_PCI_PHYS_HI_SPACE_IO 0x01000000
87 1.1 thorpej #define OFW_PCI_PHYS_HI_SPACE_MEM32 0x02000000
88 1.1 thorpej #define OFW_PCI_PHYS_HI_SPACE_MEM64 0x03000000
89 1.3 mrg
90 1.4 mrg #define OFW_PCI_PHYS_HI_BUS(hi) \
91 1.4 mrg (((hi) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
92 1.3 mrg #define OFW_PCI_PHYS_HI_DEVICE(hi) \
93 1.3 mrg (((hi) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
94 1.3 mrg #define OFW_PCI_PHYS_HI_FUNCTION(hi) \
95 1.3 mrg (((hi) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
96 1.3 mrg
97 1.3 mrg /*
98 1.3 mrg * This has the 3 32bit cell values, plus 2 more to make up a 64-bit size.
99 1.3 mrg */
100 1.3 mrg struct ofw_pci_register {
101 1.3 mrg u_int32_t phys_hi;
102 1.3 mrg u_int32_t phys_mid;
103 1.3 mrg u_int32_t phys_lo;
104 1.3 mrg u_int32_t size_hi;
105 1.3 mrg u_int32_t size_lo;
106 1.3 mrg };
107 1.1 thorpej
108 1.1 thorpej #endif /* _DEV_OFW_OFW_PCI_H_ */
109