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ofw_pci.h revision 1.4 
      1 /*	$NetBSD: ofw_pci.h,v 1.4 2001/02/17 16:28:37 mrg Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 #ifndef _DEV_OFW_OFW_PCI_H_
     41 #define	_DEV_OFW_OFW_PCI_H_
     42 
     43 /*
     44  * PCI Bus Binding to:
     45  *
     46  * IEEE Std 1275-1994
     47  * Standard for Boot (Initialization Configuration) Firmware
     48  *
     49  * Revision 2.1
     50  */
     51 
     52 /*
     53  * Section 2.2.1. Physical Address Formats
     54  *
     55  * A PCI physical address is represented by 3 address cells:
     56  *
     57  *	phys.hi cell:	npt000ss bbbbbbbb dddddfff rrrrrrrr
     58  *	phys.mid cell:	hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
     59  *	phys.lo cell:	llllllll llllllll llllllll llllllll
     60  *
     61  *	n	nonrelocatable
     62  *	p	prefectable
     63  *	t	aliased below 1MB (memory) or 64k (i/o)
     64  *	ss	space code
     65  *	b	bus number
     66  *	d	device number
     67  *	f	function number
     68  *	r	register number
     69  *	h	high 32-bits of PCI address
     70  *	l	low 32-bits of PCI address
     71  */
     72 
     73 #define	OFW_PCI_PHYS_HI_NONRELOCATABLE	0x80000000
     74 #define	OFW_PCI_PHYS_HI_PREFETCHABLE	0x40000000
     75 #define	OFW_PCI_PHYS_HI_ALIASED		0x20000000
     76 #define	OFW_PCI_PHYS_HI_SPACEMASK	0x03000000
     77 #define	OFW_PCI_PHYS_HI_BUSMASK		0x00ff0000
     78 #define	OFW_PCI_PHYS_HI_BUSSHIFT	16
     79 #define	OFW_PCI_PHYS_HI_DEVICEMASK	0x0000f800
     80 #define	OFW_PCI_PHYS_HI_DEVICESHIFT	11
     81 #define	OFW_PCI_PHYS_HI_FUNCTIONMASK	0x00000700
     82 #define	OFW_PCI_PHYS_HI_FUNCTIONSHIFT	8
     83 #define	OFW_PCI_PHYS_HI_REGISTERMASK	0x000000ff
     84 
     85 #define	OFW_PCI_PHYS_HI_SPACE_CONFIG	0x00000000
     86 #define	OFW_PCI_PHYS_HI_SPACE_IO	0x01000000
     87 #define	OFW_PCI_PHYS_HI_SPACE_MEM32	0x02000000
     88 #define	OFW_PCI_PHYS_HI_SPACE_MEM64	0x03000000
     89 
     90 #define OFW_PCI_PHYS_HI_BUS(hi) \
     91 	(((hi) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
     92 #define OFW_PCI_PHYS_HI_DEVICE(hi) \
     93 	(((hi) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
     94 #define OFW_PCI_PHYS_HI_FUNCTION(hi) \
     95 	(((hi) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
     96 
     97 /*
     98  * This has the 3 32bit cell values, plus 2 more to make up a 64-bit size.
     99  */
    100 struct ofw_pci_register {
    101 	u_int32_t	phys_hi;
    102 	u_int32_t	phys_mid;
    103 	u_int32_t	phys_lo;
    104 	u_int32_t	size_hi;
    105 	u_int32_t	size_lo;
    106 };
    107 
    108 #endif /* _DEV_OFW_OFW_PCI_H_ */
    109