onewire.c revision 1.18 1 1.17 martin /* $NetBSD: onewire.c,v 1.18 2019/11/30 23:04:12 ad Exp $ */
2 1.1 riz /* $OpenBSD: onewire.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
3 1.1 riz
4 1.18 ad /*-
5 1.18 ad * Copyright (c) 2019 The NetBSD Foundation, Inc.
6 1.18 ad * All rights reserved.
7 1.18 ad *
8 1.18 ad * This code is derived from software contributed to The NetBSD Foundation
9 1.18 ad * by Andrew Doran.
10 1.18 ad *
11 1.18 ad * Redistribution and use in source and binary forms, with or without
12 1.18 ad * modification, are permitted provided that the following conditions
13 1.18 ad * are met:
14 1.18 ad * 1. Redistributions of source code must retain the above copyright
15 1.18 ad * notice, this list of conditions and the following disclaimer.
16 1.18 ad * 2. Redistributions in binary form must reproduce the above copyright
17 1.18 ad * notice, this list of conditions and the following disclaimer in the
18 1.18 ad * documentation and/or other materials provided with the distribution.
19 1.18 ad *
20 1.18 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.18 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.18 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.18 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.18 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.18 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.18 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.18 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.18 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.18 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.18 ad * POSSIBILITY OF SUCH DAMAGE.
31 1.18 ad */
32 1.18 ad
33 1.1 riz /*
34 1.1 riz * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org>
35 1.1 riz *
36 1.1 riz * Permission to use, copy, modify, and distribute this software for any
37 1.1 riz * purpose with or without fee is hereby granted, provided that the above
38 1.1 riz * copyright notice and this permission notice appear in all copies.
39 1.1 riz *
40 1.1 riz * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
41 1.1 riz * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
42 1.1 riz * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
43 1.1 riz * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
44 1.1 riz * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
45 1.1 riz * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
46 1.1 riz * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
47 1.1 riz */
48 1.1 riz
49 1.1 riz #include <sys/cdefs.h>
50 1.18 ad __KERNEL_RCSID(0, "$NetBSD: onewire.c,v 1.18 2019/11/30 23:04:12 ad Exp $");
51 1.1 riz
52 1.1 riz /*
53 1.1 riz * 1-Wire bus driver.
54 1.1 riz */
55 1.1 riz
56 1.1 riz #include <sys/param.h>
57 1.1 riz #include <sys/systm.h>
58 1.1 riz #include <sys/conf.h>
59 1.1 riz #include <sys/device.h>
60 1.1 riz #include <sys/kernel.h>
61 1.1 riz #include <sys/kthread.h>
62 1.17 martin #include <sys/kmem.h>
63 1.1 riz #include <sys/proc.h>
64 1.1 riz #include <sys/queue.h>
65 1.14 mbalmer #include <sys/module.h>
66 1.1 riz
67 1.1 riz #include <dev/onewire/onewirereg.h>
68 1.1 riz #include <dev/onewire/onewirevar.h>
69 1.1 riz
70 1.1 riz #ifdef ONEWIRE_DEBUG
71 1.1 riz #define DPRINTF(x) printf x
72 1.1 riz #else
73 1.1 riz #define DPRINTF(x)
74 1.1 riz #endif
75 1.1 riz
76 1.17 martin int onewire_maxdevs = 8;
77 1.17 martin int onewire_scantime = 10; /* was 3 seconds - too often */
78 1.1 riz
79 1.1 riz struct onewire_softc {
80 1.9 xtraeme device_t sc_dev;
81 1.1 riz struct onewire_bus * sc_bus;
82 1.17 martin kmutex_t sc_lock;
83 1.17 martin kcondvar_t sc_scancv;
84 1.5 ad struct lwp * sc_thread;
85 1.1 riz TAILQ_HEAD(, onewire_device) sc_devs;
86 1.1 riz int sc_dying;
87 1.1 riz };
88 1.1 riz
89 1.1 riz struct onewire_device {
90 1.1 riz TAILQ_ENTRY(onewire_device) d_list;
91 1.9 xtraeme device_t d_dev;
92 1.1 riz u_int64_t d_rom;
93 1.17 martin bool d_present;
94 1.1 riz };
95 1.1 riz
96 1.9 xtraeme static int onewire_match(device_t, cfdata_t, void *);
97 1.9 xtraeme static void onewire_attach(device_t, device_t, void *);
98 1.9 xtraeme static int onewire_detach(device_t, int);
99 1.9 xtraeme static int onewire_activate(device_t, enum devact);
100 1.9 xtraeme int onewire_print(void *, const char *);
101 1.1 riz
102 1.9 xtraeme static void onewire_thread(void *);
103 1.9 xtraeme static void onewire_scan(struct onewire_softc *);
104 1.1 riz
105 1.9 xtraeme CFATTACH_DECL_NEW(onewire, sizeof(struct onewire_softc),
106 1.1 riz onewire_match, onewire_attach, onewire_detach, onewire_activate);
107 1.1 riz
108 1.1 riz extern struct cfdriver onewire_cd;
109 1.1 riz
110 1.9 xtraeme static int
111 1.9 xtraeme onewire_match(device_t parent, cfdata_t cf, void *aux)
112 1.1 riz {
113 1.1 riz return 1;
114 1.1 riz }
115 1.1 riz
116 1.9 xtraeme static void
117 1.9 xtraeme onewire_attach(device_t parent, device_t self, void *aux)
118 1.1 riz {
119 1.1 riz struct onewire_softc *sc = device_private(self);
120 1.1 riz struct onewirebus_attach_args *oba = aux;
121 1.1 riz
122 1.9 xtraeme sc->sc_dev = self;
123 1.1 riz sc->sc_bus = oba->oba_bus;
124 1.17 martin mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
125 1.17 martin cv_init(&sc->sc_scancv, "owscan");
126 1.1 riz TAILQ_INIT(&sc->sc_devs);
127 1.1 riz
128 1.6 xtraeme aprint_normal("\n");
129 1.1 riz
130 1.17 martin if (kthread_create(PRI_NONE, KTHREAD_MUSTJOIN | KTHREAD_MPSAFE, NULL,
131 1.17 martin onewire_thread, sc, &sc->sc_thread, "%s", device_xname(self)) != 0) {
132 1.9 xtraeme aprint_error_dev(self, "can't create kernel thread\n");
133 1.17 martin /* Normally the kthread destroys these. */
134 1.17 martin mutex_destroy(&sc->sc_lock);
135 1.17 martin cv_destroy(&sc->sc_scancv);
136 1.17 martin }
137 1.1 riz }
138 1.1 riz
139 1.9 xtraeme static int
140 1.9 xtraeme onewire_detach(device_t self, int flags)
141 1.1 riz {
142 1.1 riz struct onewire_softc *sc = device_private(self);
143 1.1 riz int rv;
144 1.1 riz
145 1.1 riz if (sc->sc_thread != NULL) {
146 1.17 martin mutex_enter(&sc->sc_lock);
147 1.17 martin sc->sc_dying = 1;
148 1.17 martin cv_broadcast(&sc->sc_scancv);
149 1.17 martin mutex_exit(&sc->sc_lock);
150 1.17 martin /* Must no longer touch sc_lock nor sc_scancv. */
151 1.17 martin kthread_join(sc->sc_thread);
152 1.1 riz }
153 1.1 riz
154 1.1 riz //rv = config_detach_children(self, flags);
155 1.1 riz rv = 0; /* XXX riz */
156 1.1 riz
157 1.6 xtraeme return rv;
158 1.1 riz }
159 1.1 riz
160 1.9 xtraeme static int
161 1.9 xtraeme onewire_activate(device_t self, enum devact act)
162 1.1 riz {
163 1.1 riz struct onewire_softc *sc = device_private(self);
164 1.1 riz
165 1.1 riz switch (act) {
166 1.1 riz case DVACT_DEACTIVATE:
167 1.1 riz sc->sc_dying = 1;
168 1.13 dyoung return 0;
169 1.13 dyoung default:
170 1.13 dyoung return EOPNOTSUPP;
171 1.1 riz }
172 1.1 riz }
173 1.1 riz
174 1.1 riz int
175 1.1 riz onewire_print(void *aux, const char *pnp)
176 1.1 riz {
177 1.1 riz struct onewire_attach_args *oa = aux;
178 1.1 riz const char *famname;
179 1.1 riz
180 1.1 riz if (pnp == NULL)
181 1.6 xtraeme aprint_normal(" ");
182 1.1 riz
183 1.1 riz famname = onewire_famname(ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
184 1.1 riz if (famname == NULL)
185 1.6 xtraeme aprint_normal("family 0x%02x",
186 1.6 xtraeme (uint)ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
187 1.1 riz else
188 1.6 xtraeme aprint_normal("\"%s\"", famname);
189 1.17 martin aprint_normal(" sn %012" PRIx64, ONEWIRE_ROM_SN(oa->oa_rom));
190 1.1 riz
191 1.1 riz if (pnp != NULL)
192 1.6 xtraeme aprint_normal(" at %s", pnp);
193 1.1 riz
194 1.6 xtraeme return UNCONF;
195 1.1 riz }
196 1.1 riz
197 1.1 riz int
198 1.4 christos onewirebus_print(void *aux, const char *pnp)
199 1.1 riz {
200 1.1 riz if (pnp != NULL)
201 1.6 xtraeme aprint_normal("onewire at %s", pnp);
202 1.1 riz
203 1.6 xtraeme return UNCONF;
204 1.1 riz }
205 1.1 riz
206 1.7 xtraeme void
207 1.7 xtraeme onewire_lock(void *arg)
208 1.1 riz {
209 1.1 riz struct onewire_softc *sc = arg;
210 1.1 riz
211 1.17 martin mutex_enter(&sc->sc_lock);
212 1.1 riz }
213 1.1 riz
214 1.1 riz void
215 1.1 riz onewire_unlock(void *arg)
216 1.1 riz {
217 1.1 riz struct onewire_softc *sc = arg;
218 1.1 riz
219 1.17 martin mutex_exit(&sc->sc_lock);
220 1.1 riz }
221 1.1 riz
222 1.1 riz int
223 1.1 riz onewire_reset(void *arg)
224 1.1 riz {
225 1.1 riz struct onewire_softc *sc = arg;
226 1.1 riz struct onewire_bus *bus = sc->sc_bus;
227 1.1 riz
228 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
229 1.17 martin
230 1.6 xtraeme return bus->bus_reset(bus->bus_cookie);
231 1.1 riz }
232 1.1 riz
233 1.1 riz int
234 1.18 ad onewire_read_bit(void *arg)
235 1.1 riz {
236 1.1 riz struct onewire_softc *sc = arg;
237 1.1 riz struct onewire_bus *bus = sc->sc_bus;
238 1.1 riz
239 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
240 1.17 martin
241 1.18 ad return bus->bus_read_bit(bus->bus_cookie);
242 1.18 ad }
243 1.18 ad
244 1.18 ad void
245 1.18 ad onewire_write_bit(void *arg, int value)
246 1.18 ad {
247 1.18 ad struct onewire_softc *sc = arg;
248 1.18 ad struct onewire_bus *bus = sc->sc_bus;
249 1.18 ad
250 1.18 ad KASSERT(mutex_owned(&sc->sc_lock));
251 1.18 ad
252 1.18 ad bus->bus_write_bit(bus->bus_cookie, value);
253 1.1 riz }
254 1.1 riz
255 1.1 riz int
256 1.1 riz onewire_read_byte(void *arg)
257 1.1 riz {
258 1.1 riz struct onewire_softc *sc = arg;
259 1.1 riz struct onewire_bus *bus = sc->sc_bus;
260 1.6 xtraeme uint8_t value = 0;
261 1.1 riz int i;
262 1.1 riz
263 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
264 1.17 martin
265 1.1 riz if (bus->bus_read_byte != NULL)
266 1.6 xtraeme return bus->bus_read_byte(bus->bus_cookie);
267 1.1 riz
268 1.1 riz for (i = 0; i < 8; i++)
269 1.18 ad value |= (bus->bus_read_bit(bus->bus_cookie) << i);
270 1.1 riz
271 1.6 xtraeme return value;
272 1.1 riz }
273 1.1 riz
274 1.1 riz void
275 1.1 riz onewire_write_byte(void *arg, int value)
276 1.1 riz {
277 1.1 riz struct onewire_softc *sc = arg;
278 1.1 riz struct onewire_bus *bus = sc->sc_bus;
279 1.1 riz int i;
280 1.1 riz
281 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
282 1.17 martin
283 1.1 riz if (bus->bus_write_byte != NULL)
284 1.6 xtraeme return bus->bus_write_byte(bus->bus_cookie, value);
285 1.1 riz
286 1.1 riz for (i = 0; i < 8; i++)
287 1.18 ad bus->bus_write_bit(bus->bus_cookie, (value >> i) & 0x1);
288 1.1 riz }
289 1.1 riz
290 1.1 riz int
291 1.1 riz onewire_triplet(void *arg, int dir)
292 1.1 riz {
293 1.1 riz struct onewire_softc *sc = arg;
294 1.1 riz struct onewire_bus *bus = sc->sc_bus;
295 1.1 riz int rv;
296 1.1 riz
297 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
298 1.17 martin
299 1.1 riz if (bus->bus_triplet != NULL)
300 1.6 xtraeme return bus->bus_triplet(bus->bus_cookie, dir);
301 1.1 riz
302 1.18 ad rv = bus->bus_read_bit(bus->bus_cookie);
303 1.1 riz rv <<= 1;
304 1.18 ad rv |= bus->bus_read_bit(bus->bus_cookie);
305 1.1 riz
306 1.1 riz switch (rv) {
307 1.1 riz case 0x0:
308 1.18 ad bus->bus_write_bit(bus->bus_cookie, dir);
309 1.1 riz break;
310 1.1 riz case 0x1:
311 1.18 ad bus->bus_write_bit(bus->bus_cookie, 0);
312 1.1 riz break;
313 1.1 riz default:
314 1.18 ad bus->bus_write_bit(bus->bus_cookie, 1);
315 1.1 riz }
316 1.1 riz
317 1.6 xtraeme return rv;
318 1.1 riz }
319 1.1 riz
320 1.1 riz void
321 1.1 riz onewire_read_block(void *arg, void *buf, int len)
322 1.1 riz {
323 1.17 martin struct onewire_softc *sc = arg;
324 1.6 xtraeme uint8_t *p = buf;
325 1.1 riz
326 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
327 1.17 martin
328 1.1 riz while (len--)
329 1.17 martin *p++ = onewire_read_byte(sc);
330 1.1 riz }
331 1.1 riz
332 1.1 riz void
333 1.1 riz onewire_write_block(void *arg, const void *buf, int len)
334 1.1 riz {
335 1.17 martin struct onewire_softc *sc = arg;
336 1.6 xtraeme const uint8_t *p = buf;
337 1.1 riz
338 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
339 1.17 martin
340 1.1 riz while (len--)
341 1.17 martin onewire_write_byte(sc, *p++);
342 1.1 riz }
343 1.1 riz
344 1.1 riz void
345 1.1 riz onewire_matchrom(void *arg, u_int64_t rom)
346 1.1 riz {
347 1.17 martin struct onewire_softc *sc = arg;
348 1.1 riz int i;
349 1.1 riz
350 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
351 1.17 martin
352 1.17 martin onewire_write_byte(sc, ONEWIRE_CMD_MATCH_ROM);
353 1.1 riz for (i = 0; i < 8; i++)
354 1.17 martin onewire_write_byte(sc, (rom >> (i * 8)) & 0xff);
355 1.1 riz }
356 1.1 riz
357 1.9 xtraeme static void
358 1.1 riz onewire_thread(void *arg)
359 1.1 riz {
360 1.1 riz struct onewire_softc *sc = arg;
361 1.18 ad int unit, dly;
362 1.18 ad
363 1.18 ad /*
364 1.18 ad * There can be many onewire busses, potentially funneled through
365 1.18 ad * few GPIO controllers. To avoid a thundering herd of kthreads and
366 1.18 ad * resulting contention for the GPIO controller, spread the probes
367 1.18 ad * out across an 8 second window. The kthreads could converge later
368 1.18 ad * due to timing effects.
369 1.18 ad */
370 1.18 ad unit = device_unit(sc->sc_dev);
371 1.18 ad dly = (unit & 0x07) * hz + ((unit >> 3) * hz >> 3) + 1;
372 1.18 ad (void)kpause("owdly", false, dly, NULL);
373 1.1 riz
374 1.17 martin mutex_enter(&sc->sc_lock);
375 1.1 riz while (!sc->sc_dying) {
376 1.1 riz onewire_scan(sc);
377 1.17 martin (void)cv_timedwait(&sc->sc_scancv, &sc->sc_lock,
378 1.17 martin onewire_scantime * hz);
379 1.1 riz }
380 1.17 martin mutex_exit(&sc->sc_lock);
381 1.1 riz
382 1.17 martin /* Caller has set sc_dying and will no longer touch these. */
383 1.17 martin cv_destroy(&sc->sc_scancv);
384 1.17 martin mutex_destroy(&sc->sc_lock);
385 1.1 riz kthread_exit(0);
386 1.1 riz }
387 1.9 xtraeme
388 1.9 xtraeme static void
389 1.1 riz onewire_scan(struct onewire_softc *sc)
390 1.1 riz {
391 1.1 riz struct onewire_device *d, *next, *nd;
392 1.1 riz struct onewire_attach_args oa;
393 1.1 riz int search = 1, count = 0, present;
394 1.1 riz int dir, rv;
395 1.6 xtraeme uint64_t mask, rom = 0, lastrom;
396 1.6 xtraeme uint8_t data[8];
397 1.1 riz int i, i0 = -1, lastd = -1;
398 1.1 riz
399 1.17 martin TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
400 1.17 martin d->d_present = false;
401 1.17 martin KASSERT(d->d_dev != NULL);
402 1.17 martin }
403 1.1 riz
404 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
405 1.17 martin KASSERT(curlwp == sc->sc_thread);
406 1.1 riz
407 1.17 martin while (search && count++ < onewire_maxdevs) {
408 1.1 riz /*
409 1.18 ad * Reset the bus, allowing for one retry if reset fails. If
410 1.18 ad * there's no presence pulse don't search for any devices.
411 1.1 riz */
412 1.1 riz if (onewire_reset(sc) != 0) {
413 1.1 riz DPRINTF(("%s: scan: no presence pulse\n",
414 1.9 xtraeme device_xname(sc->sc_dev)));
415 1.18 ad if (onewire_reset(sc) != 0) {
416 1.18 ad DPRINTF(("%s: scan: retry failed\n",
417 1.18 ad device_xname(sc->sc_dev)));
418 1.18 ad break;
419 1.18 ad }
420 1.1 riz }
421 1.1 riz
422 1.1 riz /*
423 1.1 riz * Start new search. Go through the previous path to
424 1.1 riz * the point we made a decision last time and make an
425 1.1 riz * opposite decision. If we didn't make any decision
426 1.1 riz * stop searching.
427 1.1 riz */
428 1.1 riz search = 0;
429 1.1 riz lastrom = rom;
430 1.1 riz rom = 0;
431 1.1 riz onewire_write_byte(sc, ONEWIRE_CMD_SEARCH_ROM);
432 1.1 riz for (i = 0,i0 = -1; i < 64; i++) {
433 1.1 riz dir = (lastrom >> i) & 0x1;
434 1.1 riz if (i == lastd)
435 1.1 riz dir = 1;
436 1.1 riz else if (i > lastd)
437 1.1 riz dir = 0;
438 1.1 riz rv = onewire_triplet(sc, dir);
439 1.1 riz switch (rv) {
440 1.1 riz case 0x0:
441 1.1 riz if (i != lastd) {
442 1.1 riz if (dir == 0)
443 1.1 riz i0 = i;
444 1.1 riz search = 1;
445 1.1 riz }
446 1.1 riz mask = dir;
447 1.1 riz break;
448 1.1 riz case 0x1:
449 1.1 riz mask = 0;
450 1.1 riz break;
451 1.1 riz case 0x2:
452 1.1 riz mask = 1;
453 1.1 riz break;
454 1.1 riz default:
455 1.1 riz DPRINTF(("%s: scan: triplet error 0x%x, "
456 1.1 riz "step %d\n",
457 1.9 xtraeme device_xname(sc->sc_dev), rv, i));
458 1.1 riz return;
459 1.1 riz }
460 1.1 riz rom |= (mask << i);
461 1.1 riz }
462 1.1 riz lastd = i0;
463 1.1 riz
464 1.18 ad /*
465 1.18 ad * Yield processor, but continue to hold the lock
466 1.18 ad * so that scan is not interrupted.
467 1.18 ad */
468 1.18 ad (void)kpause("owscan", false, 1, NULL);
469 1.18 ad
470 1.1 riz if (rom == 0)
471 1.1 riz continue;
472 1.1 riz
473 1.1 riz /*
474 1.1 riz * The last byte of the ROM code contains a CRC calculated
475 1.1 riz * from the first 7 bytes. Re-calculate it to make sure
476 1.1 riz * we found a valid device.
477 1.1 riz */
478 1.1 riz for (i = 0; i < 8; i++)
479 1.1 riz data[i] = (rom >> (i * 8)) & 0xff;
480 1.1 riz if (onewire_crc(data, 7) != data[7])
481 1.1 riz continue;
482 1.1 riz
483 1.1 riz /*
484 1.1 riz * Go through the list of attached devices to see if we
485 1.1 riz * found a new one.
486 1.1 riz */
487 1.1 riz present = 0;
488 1.14 mbalmer TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
489 1.1 riz if (d->d_rom == rom) {
490 1.17 martin d->d_present = true;
491 1.1 riz present = 1;
492 1.1 riz break;
493 1.1 riz }
494 1.1 riz }
495 1.1 riz if (!present) {
496 1.17 martin nd = kmem_alloc(sizeof(*nd), KM_SLEEP);
497 1.17 martin nd->d_dev = NULL;
498 1.1 riz nd->d_rom = rom;
499 1.17 martin nd->d_present = true;
500 1.1 riz TAILQ_INSERT_TAIL(&sc->sc_devs, nd, d_list);
501 1.1 riz }
502 1.1 riz }
503 1.1 riz
504 1.17 martin /*
505 1.17 martin * Detach disappeared devices, and attach new devices. Drop the
506 1.17 martin * lock when doing this in order to prevent lock order reversal
507 1.17 martin * against sysmon. This is safe because nothing other than this
508 1.17 martin * kthread modifies our device list.
509 1.17 martin */
510 1.17 martin for (d = TAILQ_FIRST(&sc->sc_devs); d != NULL; d = next) {
511 1.1 riz next = TAILQ_NEXT(d, d_list);
512 1.1 riz if (!d->d_present) {
513 1.17 martin mutex_exit(&sc->sc_lock);
514 1.17 martin
515 1.17 martin KERNEL_LOCK(1, NULL); /* XXXSMP */
516 1.1 riz config_detach(d->d_dev, DETACH_FORCE);
517 1.17 martin d->d_dev = NULL;
518 1.17 martin KERNEL_UNLOCK_ONE(NULL); /* XXXSMP */
519 1.17 martin
520 1.17 martin mutex_enter(&sc->sc_lock);
521 1.17 martin } else if (d->d_dev == NULL) {
522 1.17 martin memset(&oa, 0, sizeof(oa));
523 1.17 martin oa.oa_onewire = sc;
524 1.17 martin oa.oa_rom = d->d_rom;
525 1.17 martin mutex_exit(&sc->sc_lock);
526 1.17 martin
527 1.17 martin KERNEL_LOCK(1, NULL); /* XXXSMP */
528 1.17 martin d->d_dev = config_found(sc->sc_dev, &oa, onewire_print);
529 1.17 martin KERNEL_UNLOCK_ONE(NULL); /* XXXSMP */
530 1.17 martin
531 1.17 martin mutex_enter(&sc->sc_lock);
532 1.17 martin }
533 1.17 martin if (d->d_dev == NULL) {
534 1.1 riz TAILQ_REMOVE(&sc->sc_devs, d, d_list);
535 1.17 martin kmem_free(d, sizeof(*d));
536 1.1 riz }
537 1.1 riz }
538 1.1 riz }
539 1.14 mbalmer
540 1.14 mbalmer MODULE(MODULE_CLASS_DRIVER, onewire, NULL);
541 1.14 mbalmer
542 1.14 mbalmer #ifdef _MODULE
543 1.14 mbalmer #include "ioconf.c"
544 1.14 mbalmer #endif
545 1.14 mbalmer
546 1.14 mbalmer static int
547 1.14 mbalmer onewire_modcmd(modcmd_t cmd, void *opaque)
548 1.14 mbalmer {
549 1.14 mbalmer int error;
550 1.14 mbalmer
551 1.14 mbalmer error = 0;
552 1.14 mbalmer switch (cmd) {
553 1.14 mbalmer case MODULE_CMD_INIT:
554 1.14 mbalmer #ifdef _MODULE
555 1.14 mbalmer error = config_init_component(cfdriver_ioconf_onewire,
556 1.14 mbalmer cfattach_ioconf_onewire, cfdata_ioconf_onewire);
557 1.14 mbalmer if (error)
558 1.14 mbalmer aprint_error("%s: unable to init component\n",
559 1.14 mbalmer onewire_cd.cd_name);
560 1.14 mbalmer #endif
561 1.14 mbalmer break;
562 1.14 mbalmer case MODULE_CMD_FINI:
563 1.14 mbalmer #ifdef _MODULE
564 1.14 mbalmer config_fini_component(cfdriver_ioconf_onewire,
565 1.14 mbalmer cfattach_ioconf_onewire, cfdata_ioconf_onewire);
566 1.14 mbalmer #endif
567 1.14 mbalmer break;
568 1.14 mbalmer default:
569 1.14 mbalmer error = ENOTTY;
570 1.14 mbalmer }
571 1.14 mbalmer return error;
572 1.14 mbalmer }
573