onewire.c revision 1.19 1 1.19 macallan /* $NetBSD: onewire.c,v 1.19 2020/04/14 13:36:51 macallan Exp $ */
2 1.1 riz /* $OpenBSD: onewire.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
3 1.1 riz
4 1.18 ad /*-
5 1.18 ad * Copyright (c) 2019 The NetBSD Foundation, Inc.
6 1.18 ad * All rights reserved.
7 1.18 ad *
8 1.18 ad * This code is derived from software contributed to The NetBSD Foundation
9 1.18 ad * by Andrew Doran.
10 1.18 ad *
11 1.18 ad * Redistribution and use in source and binary forms, with or without
12 1.18 ad * modification, are permitted provided that the following conditions
13 1.18 ad * are met:
14 1.18 ad * 1. Redistributions of source code must retain the above copyright
15 1.18 ad * notice, this list of conditions and the following disclaimer.
16 1.18 ad * 2. Redistributions in binary form must reproduce the above copyright
17 1.18 ad * notice, this list of conditions and the following disclaimer in the
18 1.18 ad * documentation and/or other materials provided with the distribution.
19 1.18 ad *
20 1.18 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.18 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.18 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.18 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.18 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.18 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.18 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.18 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.18 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.18 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.18 ad * POSSIBILITY OF SUCH DAMAGE.
31 1.18 ad */
32 1.18 ad
33 1.1 riz /*
34 1.1 riz * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org>
35 1.1 riz *
36 1.1 riz * Permission to use, copy, modify, and distribute this software for any
37 1.1 riz * purpose with or without fee is hereby granted, provided that the above
38 1.1 riz * copyright notice and this permission notice appear in all copies.
39 1.1 riz *
40 1.1 riz * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
41 1.1 riz * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
42 1.1 riz * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
43 1.1 riz * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
44 1.1 riz * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
45 1.1 riz * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
46 1.1 riz * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
47 1.1 riz */
48 1.1 riz
49 1.1 riz #include <sys/cdefs.h>
50 1.19 macallan __KERNEL_RCSID(0, "$NetBSD: onewire.c,v 1.19 2020/04/14 13:36:51 macallan Exp $");
51 1.1 riz
52 1.1 riz /*
53 1.1 riz * 1-Wire bus driver.
54 1.1 riz */
55 1.1 riz
56 1.1 riz #include <sys/param.h>
57 1.1 riz #include <sys/systm.h>
58 1.1 riz #include <sys/conf.h>
59 1.1 riz #include <sys/device.h>
60 1.1 riz #include <sys/kernel.h>
61 1.1 riz #include <sys/kthread.h>
62 1.17 martin #include <sys/kmem.h>
63 1.1 riz #include <sys/proc.h>
64 1.1 riz #include <sys/queue.h>
65 1.14 mbalmer #include <sys/module.h>
66 1.1 riz
67 1.19 macallan #include "opt_onewire.h"
68 1.19 macallan
69 1.1 riz #include <dev/onewire/onewirereg.h>
70 1.1 riz #include <dev/onewire/onewirevar.h>
71 1.1 riz
72 1.1 riz #ifdef ONEWIRE_DEBUG
73 1.1 riz #define DPRINTF(x) printf x
74 1.1 riz #else
75 1.1 riz #define DPRINTF(x)
76 1.1 riz #endif
77 1.1 riz
78 1.17 martin int onewire_maxdevs = 8;
79 1.17 martin int onewire_scantime = 10; /* was 3 seconds - too often */
80 1.1 riz
81 1.1 riz struct onewire_softc {
82 1.9 xtraeme device_t sc_dev;
83 1.1 riz struct onewire_bus * sc_bus;
84 1.17 martin kmutex_t sc_lock;
85 1.17 martin kcondvar_t sc_scancv;
86 1.5 ad struct lwp * sc_thread;
87 1.1 riz TAILQ_HEAD(, onewire_device) sc_devs;
88 1.1 riz int sc_dying;
89 1.1 riz };
90 1.1 riz
91 1.1 riz struct onewire_device {
92 1.1 riz TAILQ_ENTRY(onewire_device) d_list;
93 1.9 xtraeme device_t d_dev;
94 1.1 riz u_int64_t d_rom;
95 1.17 martin bool d_present;
96 1.1 riz };
97 1.1 riz
98 1.9 xtraeme static int onewire_match(device_t, cfdata_t, void *);
99 1.9 xtraeme static void onewire_attach(device_t, device_t, void *);
100 1.9 xtraeme static int onewire_detach(device_t, int);
101 1.9 xtraeme static int onewire_activate(device_t, enum devact);
102 1.9 xtraeme int onewire_print(void *, const char *);
103 1.1 riz
104 1.9 xtraeme static void onewire_thread(void *);
105 1.9 xtraeme static void onewire_scan(struct onewire_softc *);
106 1.1 riz
107 1.9 xtraeme CFATTACH_DECL_NEW(onewire, sizeof(struct onewire_softc),
108 1.1 riz onewire_match, onewire_attach, onewire_detach, onewire_activate);
109 1.1 riz
110 1.1 riz extern struct cfdriver onewire_cd;
111 1.1 riz
112 1.9 xtraeme static int
113 1.9 xtraeme onewire_match(device_t parent, cfdata_t cf, void *aux)
114 1.1 riz {
115 1.1 riz return 1;
116 1.1 riz }
117 1.1 riz
118 1.9 xtraeme static void
119 1.9 xtraeme onewire_attach(device_t parent, device_t self, void *aux)
120 1.1 riz {
121 1.1 riz struct onewire_softc *sc = device_private(self);
122 1.1 riz struct onewirebus_attach_args *oba = aux;
123 1.1 riz
124 1.9 xtraeme sc->sc_dev = self;
125 1.1 riz sc->sc_bus = oba->oba_bus;
126 1.17 martin mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
127 1.17 martin cv_init(&sc->sc_scancv, "owscan");
128 1.1 riz TAILQ_INIT(&sc->sc_devs);
129 1.1 riz
130 1.6 xtraeme aprint_normal("\n");
131 1.1 riz
132 1.17 martin if (kthread_create(PRI_NONE, KTHREAD_MUSTJOIN | KTHREAD_MPSAFE, NULL,
133 1.17 martin onewire_thread, sc, &sc->sc_thread, "%s", device_xname(self)) != 0) {
134 1.9 xtraeme aprint_error_dev(self, "can't create kernel thread\n");
135 1.17 martin /* Normally the kthread destroys these. */
136 1.17 martin mutex_destroy(&sc->sc_lock);
137 1.17 martin cv_destroy(&sc->sc_scancv);
138 1.17 martin }
139 1.1 riz }
140 1.1 riz
141 1.9 xtraeme static int
142 1.9 xtraeme onewire_detach(device_t self, int flags)
143 1.1 riz {
144 1.1 riz struct onewire_softc *sc = device_private(self);
145 1.1 riz int rv;
146 1.1 riz
147 1.1 riz if (sc->sc_thread != NULL) {
148 1.17 martin mutex_enter(&sc->sc_lock);
149 1.17 martin sc->sc_dying = 1;
150 1.17 martin cv_broadcast(&sc->sc_scancv);
151 1.17 martin mutex_exit(&sc->sc_lock);
152 1.17 martin /* Must no longer touch sc_lock nor sc_scancv. */
153 1.17 martin kthread_join(sc->sc_thread);
154 1.1 riz }
155 1.1 riz
156 1.1 riz //rv = config_detach_children(self, flags);
157 1.1 riz rv = 0; /* XXX riz */
158 1.1 riz
159 1.6 xtraeme return rv;
160 1.1 riz }
161 1.1 riz
162 1.9 xtraeme static int
163 1.9 xtraeme onewire_activate(device_t self, enum devact act)
164 1.1 riz {
165 1.1 riz struct onewire_softc *sc = device_private(self);
166 1.1 riz
167 1.1 riz switch (act) {
168 1.1 riz case DVACT_DEACTIVATE:
169 1.1 riz sc->sc_dying = 1;
170 1.13 dyoung return 0;
171 1.13 dyoung default:
172 1.13 dyoung return EOPNOTSUPP;
173 1.1 riz }
174 1.1 riz }
175 1.1 riz
176 1.1 riz int
177 1.1 riz onewire_print(void *aux, const char *pnp)
178 1.1 riz {
179 1.1 riz struct onewire_attach_args *oa = aux;
180 1.1 riz const char *famname;
181 1.1 riz
182 1.1 riz if (pnp == NULL)
183 1.6 xtraeme aprint_normal(" ");
184 1.1 riz
185 1.1 riz famname = onewire_famname(ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
186 1.1 riz if (famname == NULL)
187 1.6 xtraeme aprint_normal("family 0x%02x",
188 1.6 xtraeme (uint)ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
189 1.1 riz else
190 1.6 xtraeme aprint_normal("\"%s\"", famname);
191 1.17 martin aprint_normal(" sn %012" PRIx64, ONEWIRE_ROM_SN(oa->oa_rom));
192 1.1 riz
193 1.1 riz if (pnp != NULL)
194 1.6 xtraeme aprint_normal(" at %s", pnp);
195 1.1 riz
196 1.6 xtraeme return UNCONF;
197 1.1 riz }
198 1.1 riz
199 1.1 riz int
200 1.4 christos onewirebus_print(void *aux, const char *pnp)
201 1.1 riz {
202 1.1 riz if (pnp != NULL)
203 1.6 xtraeme aprint_normal("onewire at %s", pnp);
204 1.1 riz
205 1.6 xtraeme return UNCONF;
206 1.1 riz }
207 1.1 riz
208 1.7 xtraeme void
209 1.7 xtraeme onewire_lock(void *arg)
210 1.1 riz {
211 1.1 riz struct onewire_softc *sc = arg;
212 1.1 riz
213 1.17 martin mutex_enter(&sc->sc_lock);
214 1.1 riz }
215 1.1 riz
216 1.1 riz void
217 1.1 riz onewire_unlock(void *arg)
218 1.1 riz {
219 1.1 riz struct onewire_softc *sc = arg;
220 1.1 riz
221 1.17 martin mutex_exit(&sc->sc_lock);
222 1.1 riz }
223 1.1 riz
224 1.1 riz int
225 1.1 riz onewire_reset(void *arg)
226 1.1 riz {
227 1.1 riz struct onewire_softc *sc = arg;
228 1.1 riz struct onewire_bus *bus = sc->sc_bus;
229 1.1 riz
230 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
231 1.17 martin
232 1.6 xtraeme return bus->bus_reset(bus->bus_cookie);
233 1.1 riz }
234 1.1 riz
235 1.1 riz int
236 1.18 ad onewire_read_bit(void *arg)
237 1.1 riz {
238 1.1 riz struct onewire_softc *sc = arg;
239 1.1 riz struct onewire_bus *bus = sc->sc_bus;
240 1.1 riz
241 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
242 1.17 martin
243 1.18 ad return bus->bus_read_bit(bus->bus_cookie);
244 1.18 ad }
245 1.18 ad
246 1.18 ad void
247 1.18 ad onewire_write_bit(void *arg, int value)
248 1.18 ad {
249 1.18 ad struct onewire_softc *sc = arg;
250 1.18 ad struct onewire_bus *bus = sc->sc_bus;
251 1.18 ad
252 1.18 ad KASSERT(mutex_owned(&sc->sc_lock));
253 1.18 ad
254 1.18 ad bus->bus_write_bit(bus->bus_cookie, value);
255 1.1 riz }
256 1.1 riz
257 1.1 riz int
258 1.1 riz onewire_read_byte(void *arg)
259 1.1 riz {
260 1.1 riz struct onewire_softc *sc = arg;
261 1.1 riz struct onewire_bus *bus = sc->sc_bus;
262 1.6 xtraeme uint8_t value = 0;
263 1.1 riz int i;
264 1.1 riz
265 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
266 1.17 martin
267 1.1 riz if (bus->bus_read_byte != NULL)
268 1.6 xtraeme return bus->bus_read_byte(bus->bus_cookie);
269 1.1 riz
270 1.1 riz for (i = 0; i < 8; i++)
271 1.18 ad value |= (bus->bus_read_bit(bus->bus_cookie) << i);
272 1.1 riz
273 1.6 xtraeme return value;
274 1.1 riz }
275 1.1 riz
276 1.1 riz void
277 1.1 riz onewire_write_byte(void *arg, int value)
278 1.1 riz {
279 1.1 riz struct onewire_softc *sc = arg;
280 1.1 riz struct onewire_bus *bus = sc->sc_bus;
281 1.1 riz int i;
282 1.1 riz
283 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
284 1.17 martin
285 1.1 riz if (bus->bus_write_byte != NULL)
286 1.6 xtraeme return bus->bus_write_byte(bus->bus_cookie, value);
287 1.1 riz
288 1.1 riz for (i = 0; i < 8; i++)
289 1.18 ad bus->bus_write_bit(bus->bus_cookie, (value >> i) & 0x1);
290 1.1 riz }
291 1.1 riz
292 1.1 riz int
293 1.1 riz onewire_triplet(void *arg, int dir)
294 1.1 riz {
295 1.1 riz struct onewire_softc *sc = arg;
296 1.1 riz struct onewire_bus *bus = sc->sc_bus;
297 1.1 riz int rv;
298 1.1 riz
299 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
300 1.17 martin
301 1.1 riz if (bus->bus_triplet != NULL)
302 1.6 xtraeme return bus->bus_triplet(bus->bus_cookie, dir);
303 1.1 riz
304 1.18 ad rv = bus->bus_read_bit(bus->bus_cookie);
305 1.1 riz rv <<= 1;
306 1.18 ad rv |= bus->bus_read_bit(bus->bus_cookie);
307 1.1 riz
308 1.1 riz switch (rv) {
309 1.1 riz case 0x0:
310 1.18 ad bus->bus_write_bit(bus->bus_cookie, dir);
311 1.1 riz break;
312 1.1 riz case 0x1:
313 1.18 ad bus->bus_write_bit(bus->bus_cookie, 0);
314 1.1 riz break;
315 1.1 riz default:
316 1.18 ad bus->bus_write_bit(bus->bus_cookie, 1);
317 1.1 riz }
318 1.1 riz
319 1.6 xtraeme return rv;
320 1.1 riz }
321 1.1 riz
322 1.1 riz void
323 1.1 riz onewire_read_block(void *arg, void *buf, int len)
324 1.1 riz {
325 1.17 martin struct onewire_softc *sc = arg;
326 1.6 xtraeme uint8_t *p = buf;
327 1.1 riz
328 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
329 1.17 martin
330 1.1 riz while (len--)
331 1.17 martin *p++ = onewire_read_byte(sc);
332 1.1 riz }
333 1.1 riz
334 1.1 riz void
335 1.1 riz onewire_write_block(void *arg, const void *buf, int len)
336 1.1 riz {
337 1.17 martin struct onewire_softc *sc = arg;
338 1.6 xtraeme const uint8_t *p = buf;
339 1.1 riz
340 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
341 1.17 martin
342 1.1 riz while (len--)
343 1.17 martin onewire_write_byte(sc, *p++);
344 1.1 riz }
345 1.1 riz
346 1.1 riz void
347 1.1 riz onewire_matchrom(void *arg, u_int64_t rom)
348 1.1 riz {
349 1.17 martin struct onewire_softc *sc = arg;
350 1.1 riz int i;
351 1.1 riz
352 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
353 1.17 martin
354 1.17 martin onewire_write_byte(sc, ONEWIRE_CMD_MATCH_ROM);
355 1.1 riz for (i = 0; i < 8; i++)
356 1.17 martin onewire_write_byte(sc, (rom >> (i * 8)) & 0xff);
357 1.1 riz }
358 1.1 riz
359 1.9 xtraeme static void
360 1.1 riz onewire_thread(void *arg)
361 1.1 riz {
362 1.1 riz struct onewire_softc *sc = arg;
363 1.18 ad int unit, dly;
364 1.18 ad
365 1.18 ad /*
366 1.18 ad * There can be many onewire busses, potentially funneled through
367 1.18 ad * few GPIO controllers. To avoid a thundering herd of kthreads and
368 1.18 ad * resulting contention for the GPIO controller, spread the probes
369 1.18 ad * out across an 8 second window. The kthreads could converge later
370 1.18 ad * due to timing effects.
371 1.18 ad */
372 1.18 ad unit = device_unit(sc->sc_dev);
373 1.18 ad dly = (unit & 0x07) * hz + ((unit >> 3) * hz >> 3) + 1;
374 1.18 ad (void)kpause("owdly", false, dly, NULL);
375 1.1 riz
376 1.17 martin mutex_enter(&sc->sc_lock);
377 1.1 riz while (!sc->sc_dying) {
378 1.1 riz onewire_scan(sc);
379 1.17 martin (void)cv_timedwait(&sc->sc_scancv, &sc->sc_lock,
380 1.17 martin onewire_scantime * hz);
381 1.1 riz }
382 1.17 martin mutex_exit(&sc->sc_lock);
383 1.1 riz
384 1.17 martin /* Caller has set sc_dying and will no longer touch these. */
385 1.17 martin cv_destroy(&sc->sc_scancv);
386 1.17 martin mutex_destroy(&sc->sc_lock);
387 1.1 riz kthread_exit(0);
388 1.1 riz }
389 1.9 xtraeme
390 1.9 xtraeme static void
391 1.1 riz onewire_scan(struct onewire_softc *sc)
392 1.1 riz {
393 1.1 riz struct onewire_device *d, *next, *nd;
394 1.1 riz struct onewire_attach_args oa;
395 1.1 riz int search = 1, count = 0, present;
396 1.1 riz int dir, rv;
397 1.6 xtraeme uint64_t mask, rom = 0, lastrom;
398 1.6 xtraeme uint8_t data[8];
399 1.1 riz int i, i0 = -1, lastd = -1;
400 1.1 riz
401 1.17 martin TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
402 1.17 martin d->d_present = false;
403 1.17 martin KASSERT(d->d_dev != NULL);
404 1.17 martin }
405 1.1 riz
406 1.17 martin KASSERT(mutex_owned(&sc->sc_lock));
407 1.17 martin KASSERT(curlwp == sc->sc_thread);
408 1.1 riz
409 1.17 martin while (search && count++ < onewire_maxdevs) {
410 1.1 riz /*
411 1.18 ad * Reset the bus, allowing for one retry if reset fails. If
412 1.18 ad * there's no presence pulse don't search for any devices.
413 1.1 riz */
414 1.1 riz if (onewire_reset(sc) != 0) {
415 1.1 riz DPRINTF(("%s: scan: no presence pulse\n",
416 1.9 xtraeme device_xname(sc->sc_dev)));
417 1.18 ad if (onewire_reset(sc) != 0) {
418 1.18 ad DPRINTF(("%s: scan: retry failed\n",
419 1.18 ad device_xname(sc->sc_dev)));
420 1.18 ad break;
421 1.18 ad }
422 1.1 riz }
423 1.1 riz
424 1.1 riz /*
425 1.1 riz * Start new search. Go through the previous path to
426 1.1 riz * the point we made a decision last time and make an
427 1.1 riz * opposite decision. If we didn't make any decision
428 1.1 riz * stop searching.
429 1.1 riz */
430 1.1 riz search = 0;
431 1.1 riz lastrom = rom;
432 1.1 riz rom = 0;
433 1.1 riz onewire_write_byte(sc, ONEWIRE_CMD_SEARCH_ROM);
434 1.1 riz for (i = 0,i0 = -1; i < 64; i++) {
435 1.1 riz dir = (lastrom >> i) & 0x1;
436 1.1 riz if (i == lastd)
437 1.1 riz dir = 1;
438 1.1 riz else if (i > lastd)
439 1.1 riz dir = 0;
440 1.1 riz rv = onewire_triplet(sc, dir);
441 1.1 riz switch (rv) {
442 1.1 riz case 0x0:
443 1.1 riz if (i != lastd) {
444 1.1 riz if (dir == 0)
445 1.1 riz i0 = i;
446 1.1 riz search = 1;
447 1.1 riz }
448 1.1 riz mask = dir;
449 1.1 riz break;
450 1.1 riz case 0x1:
451 1.1 riz mask = 0;
452 1.1 riz break;
453 1.1 riz case 0x2:
454 1.1 riz mask = 1;
455 1.1 riz break;
456 1.1 riz default:
457 1.1 riz DPRINTF(("%s: scan: triplet error 0x%x, "
458 1.1 riz "step %d\n",
459 1.9 xtraeme device_xname(sc->sc_dev), rv, i));
460 1.1 riz return;
461 1.1 riz }
462 1.1 riz rom |= (mask << i);
463 1.1 riz }
464 1.1 riz lastd = i0;
465 1.1 riz
466 1.18 ad /*
467 1.18 ad * Yield processor, but continue to hold the lock
468 1.18 ad * so that scan is not interrupted.
469 1.18 ad */
470 1.18 ad (void)kpause("owscan", false, 1, NULL);
471 1.18 ad
472 1.1 riz if (rom == 0)
473 1.1 riz continue;
474 1.1 riz
475 1.1 riz /*
476 1.1 riz * The last byte of the ROM code contains a CRC calculated
477 1.1 riz * from the first 7 bytes. Re-calculate it to make sure
478 1.1 riz * we found a valid device.
479 1.1 riz */
480 1.1 riz for (i = 0; i < 8; i++)
481 1.1 riz data[i] = (rom >> (i * 8)) & 0xff;
482 1.1 riz if (onewire_crc(data, 7) != data[7])
483 1.1 riz continue;
484 1.1 riz
485 1.1 riz /*
486 1.1 riz * Go through the list of attached devices to see if we
487 1.1 riz * found a new one.
488 1.1 riz */
489 1.1 riz present = 0;
490 1.14 mbalmer TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
491 1.1 riz if (d->d_rom == rom) {
492 1.17 martin d->d_present = true;
493 1.1 riz present = 1;
494 1.1 riz break;
495 1.1 riz }
496 1.1 riz }
497 1.1 riz if (!present) {
498 1.17 martin nd = kmem_alloc(sizeof(*nd), KM_SLEEP);
499 1.17 martin nd->d_dev = NULL;
500 1.1 riz nd->d_rom = rom;
501 1.17 martin nd->d_present = true;
502 1.1 riz TAILQ_INSERT_TAIL(&sc->sc_devs, nd, d_list);
503 1.1 riz }
504 1.1 riz }
505 1.1 riz
506 1.17 martin /*
507 1.17 martin * Detach disappeared devices, and attach new devices. Drop the
508 1.17 martin * lock when doing this in order to prevent lock order reversal
509 1.17 martin * against sysmon. This is safe because nothing other than this
510 1.17 martin * kthread modifies our device list.
511 1.17 martin */
512 1.17 martin for (d = TAILQ_FIRST(&sc->sc_devs); d != NULL; d = next) {
513 1.1 riz next = TAILQ_NEXT(d, d_list);
514 1.1 riz if (!d->d_present) {
515 1.17 martin mutex_exit(&sc->sc_lock);
516 1.17 martin
517 1.17 martin KERNEL_LOCK(1, NULL); /* XXXSMP */
518 1.1 riz config_detach(d->d_dev, DETACH_FORCE);
519 1.17 martin d->d_dev = NULL;
520 1.17 martin KERNEL_UNLOCK_ONE(NULL); /* XXXSMP */
521 1.17 martin
522 1.17 martin mutex_enter(&sc->sc_lock);
523 1.17 martin } else if (d->d_dev == NULL) {
524 1.17 martin memset(&oa, 0, sizeof(oa));
525 1.17 martin oa.oa_onewire = sc;
526 1.17 martin oa.oa_rom = d->d_rom;
527 1.17 martin mutex_exit(&sc->sc_lock);
528 1.17 martin
529 1.17 martin KERNEL_LOCK(1, NULL); /* XXXSMP */
530 1.17 martin d->d_dev = config_found(sc->sc_dev, &oa, onewire_print);
531 1.17 martin KERNEL_UNLOCK_ONE(NULL); /* XXXSMP */
532 1.17 martin
533 1.17 martin mutex_enter(&sc->sc_lock);
534 1.17 martin }
535 1.17 martin if (d->d_dev == NULL) {
536 1.1 riz TAILQ_REMOVE(&sc->sc_devs, d, d_list);
537 1.17 martin kmem_free(d, sizeof(*d));
538 1.1 riz }
539 1.1 riz }
540 1.1 riz }
541 1.14 mbalmer
542 1.14 mbalmer MODULE(MODULE_CLASS_DRIVER, onewire, NULL);
543 1.14 mbalmer
544 1.14 mbalmer #ifdef _MODULE
545 1.14 mbalmer #include "ioconf.c"
546 1.14 mbalmer #endif
547 1.14 mbalmer
548 1.14 mbalmer static int
549 1.14 mbalmer onewire_modcmd(modcmd_t cmd, void *opaque)
550 1.14 mbalmer {
551 1.14 mbalmer int error;
552 1.14 mbalmer
553 1.14 mbalmer error = 0;
554 1.14 mbalmer switch (cmd) {
555 1.14 mbalmer case MODULE_CMD_INIT:
556 1.14 mbalmer #ifdef _MODULE
557 1.14 mbalmer error = config_init_component(cfdriver_ioconf_onewire,
558 1.14 mbalmer cfattach_ioconf_onewire, cfdata_ioconf_onewire);
559 1.14 mbalmer if (error)
560 1.14 mbalmer aprint_error("%s: unable to init component\n",
561 1.14 mbalmer onewire_cd.cd_name);
562 1.14 mbalmer #endif
563 1.14 mbalmer break;
564 1.14 mbalmer case MODULE_CMD_FINI:
565 1.14 mbalmer #ifdef _MODULE
566 1.14 mbalmer config_fini_component(cfdriver_ioconf_onewire,
567 1.14 mbalmer cfattach_ioconf_onewire, cfdata_ioconf_onewire);
568 1.14 mbalmer #endif
569 1.14 mbalmer break;
570 1.14 mbalmer default:
571 1.14 mbalmer error = ENOTTY;
572 1.14 mbalmer }
573 1.14 mbalmer return error;
574 1.14 mbalmer }
575