Home | History | Annotate | Line # | Download | only in onewire
onewire.c revision 1.6
      1  1.6   xtraeme /* $NetBSD: onewire.c,v 1.6 2007/09/02 00:55:33 xtraeme Exp $ */
      2  1.1       riz /*	$OpenBSD: onewire.c,v 1.1 2006/03/04 16:27:03 grange Exp $	*/
      3  1.1       riz 
      4  1.1       riz /*
      5  1.1       riz  * Copyright (c) 2006 Alexander Yurchenko <grange (at) openbsd.org>
      6  1.1       riz  *
      7  1.1       riz  * Permission to use, copy, modify, and distribute this software for any
      8  1.1       riz  * purpose with or without fee is hereby granted, provided that the above
      9  1.1       riz  * copyright notice and this permission notice appear in all copies.
     10  1.1       riz  *
     11  1.1       riz  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12  1.1       riz  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13  1.1       riz  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14  1.1       riz  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15  1.1       riz  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16  1.1       riz  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17  1.1       riz  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18  1.1       riz  */
     19  1.1       riz 
     20  1.1       riz #include <sys/cdefs.h>
     21  1.6   xtraeme __KERNEL_RCSID(0, "$NetBSD: onewire.c,v 1.6 2007/09/02 00:55:33 xtraeme Exp $");
     22  1.1       riz 
     23  1.1       riz /*
     24  1.1       riz  * 1-Wire bus driver.
     25  1.1       riz  */
     26  1.1       riz 
     27  1.1       riz #include <sys/param.h>
     28  1.1       riz #include <sys/systm.h>
     29  1.1       riz #include <sys/conf.h>
     30  1.1       riz #include <sys/device.h>
     31  1.1       riz #include <sys/kernel.h>
     32  1.1       riz #include <sys/kthread.h>
     33  1.6   xtraeme #include <sys/rwlock.h>
     34  1.1       riz #include <sys/malloc.h>
     35  1.1       riz #include <sys/proc.h>
     36  1.1       riz #include <sys/queue.h>
     37  1.1       riz 
     38  1.1       riz #include <dev/onewire/onewirereg.h>
     39  1.1       riz #include <dev/onewire/onewirevar.h>
     40  1.1       riz 
     41  1.1       riz #ifdef ONEWIRE_DEBUG
     42  1.1       riz #define DPRINTF(x) printf x
     43  1.1       riz #else
     44  1.1       riz #define DPRINTF(x)
     45  1.1       riz #endif
     46  1.1       riz 
     47  1.1       riz //#define ONEWIRE_MAXDEVS		256
     48  1.1       riz #define ONEWIRE_MAXDEVS		8
     49  1.1       riz #define ONEWIRE_SCANTIME	3
     50  1.1       riz 
     51  1.1       riz struct onewire_softc {
     52  1.1       riz 	struct device			sc_dev;
     53  1.1       riz 
     54  1.1       riz 	struct onewire_bus *		sc_bus;
     55  1.6   xtraeme 	krwlock_t			sc_rwlock;
     56  1.5        ad 	struct lwp *			sc_thread;
     57  1.1       riz 	TAILQ_HEAD(, onewire_device)	sc_devs;
     58  1.1       riz 
     59  1.1       riz 	int				sc_dying;
     60  1.1       riz };
     61  1.1       riz 
     62  1.1       riz struct onewire_device {
     63  1.1       riz 	TAILQ_ENTRY(onewire_device)	d_list;
     64  1.1       riz 	struct device *			d_dev;
     65  1.1       riz 	u_int64_t			d_rom;
     66  1.1       riz 	int				d_present;
     67  1.1       riz };
     68  1.1       riz 
     69  1.1       riz int	onewire_match(struct device *, struct cfdata *, void *);
     70  1.1       riz void	onewire_attach(struct device *, struct device *, void *);
     71  1.1       riz int	onewire_detach(struct device *, int);
     72  1.1       riz int	onewire_activate(struct device *, enum devact);
     73  1.1       riz int	onewire_print(void *, const char *);
     74  1.1       riz 
     75  1.1       riz void	onewire_thread(void *);
     76  1.1       riz void	onewire_scan(struct onewire_softc *);
     77  1.1       riz 
     78  1.1       riz CFATTACH_DECL(onewire, sizeof(struct onewire_softc),
     79  1.1       riz 	onewire_match, onewire_attach, onewire_detach, onewire_activate);
     80  1.1       riz 
     81  1.1       riz const struct cdevsw onewire_cdevsw = {
     82  1.1       riz 	noopen, noclose, noread, nowrite, noioctl, nostop, notty,
     83  1.2  christos 	nopoll, nommap, nokqfilter, D_OTHER,
     84  1.1       riz };
     85  1.1       riz 
     86  1.1       riz extern struct cfdriver onewire_cd;
     87  1.1       riz 
     88  1.1       riz int
     89  1.6   xtraeme onewire_match(struct device *parent, struct cfdata *cf, void *aux)
     90  1.1       riz {
     91  1.1       riz 	return 1;
     92  1.1       riz }
     93  1.1       riz 
     94  1.1       riz void
     95  1.4  christos onewire_attach(struct device *parent, struct device *self, void *aux)
     96  1.1       riz {
     97  1.1       riz 	struct onewire_softc *sc = device_private(self);
     98  1.1       riz 	struct onewirebus_attach_args *oba = aux;
     99  1.1       riz 
    100  1.1       riz 	sc->sc_bus = oba->oba_bus;
    101  1.6   xtraeme 	rw_init(&sc->sc_rwlock);
    102  1.1       riz 	TAILQ_INIT(&sc->sc_devs);
    103  1.1       riz 
    104  1.6   xtraeme 	aprint_naive("\n");
    105  1.6   xtraeme 	aprint_normal("\n");
    106  1.1       riz 
    107  1.5        ad 	if (kthread_create(PRI_NONE, 0, NULL, onewire_thread, sc,
    108  1.5        ad 	    &sc->sc_thread, "%s", sc->sc_dev.dv_xname) != 0)
    109  1.6   xtraeme 		aprint_error("%s: can't create kernel thread\n",
    110  1.5        ad 		    sc->sc_dev.dv_xname);
    111  1.1       riz }
    112  1.1       riz 
    113  1.1       riz int
    114  1.4  christos onewire_detach(struct device *self, int flags)
    115  1.1       riz {
    116  1.1       riz 	struct onewire_softc *sc = device_private(self);
    117  1.1       riz 	int rv;
    118  1.1       riz 
    119  1.1       riz 	sc->sc_dying = 1;
    120  1.1       riz 	if (sc->sc_thread != NULL) {
    121  1.1       riz 		wakeup(sc->sc_thread);
    122  1.1       riz 		tsleep(&sc->sc_dying, PWAIT, "owdt", 0);
    123  1.1       riz 	}
    124  1.1       riz 
    125  1.1       riz 	onewire_lock(sc, 0);
    126  1.1       riz 	//rv = config_detach_children(self, flags);
    127  1.1       riz 	rv = 0;  /* XXX riz */
    128  1.1       riz 	onewire_unlock(sc);
    129  1.6   xtraeme 	rw_destroy(&sc->sc_rwlock);
    130  1.1       riz 
    131  1.6   xtraeme 	return rv;
    132  1.1       riz }
    133  1.1       riz 
    134  1.1       riz int
    135  1.1       riz onewire_activate(struct device *self, enum devact act)
    136  1.1       riz {
    137  1.1       riz 	struct onewire_softc *sc = device_private(self);
    138  1.1       riz 	int rv = 0;
    139  1.1       riz 
    140  1.1       riz 	switch (act) {
    141  1.1       riz 	case DVACT_ACTIVATE:
    142  1.1       riz 		rv = EOPNOTSUPP;
    143  1.1       riz 		break;
    144  1.1       riz 	case DVACT_DEACTIVATE:
    145  1.1       riz 		sc->sc_dying = 1;
    146  1.1       riz 		break;
    147  1.1       riz 	}
    148  1.1       riz 
    149  1.1       riz 	//return (config_activate_children(self, act));
    150  1.1       riz 	return rv;
    151  1.1       riz }
    152  1.1       riz 
    153  1.1       riz int
    154  1.1       riz onewire_print(void *aux, const char *pnp)
    155  1.1       riz {
    156  1.1       riz 	struct onewire_attach_args *oa = aux;
    157  1.1       riz 	const char *famname;
    158  1.1       riz 
    159  1.1       riz 	if (pnp == NULL)
    160  1.6   xtraeme 		aprint_normal(" ");
    161  1.1       riz 
    162  1.1       riz 	famname = onewire_famname(ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
    163  1.1       riz 	if (famname == NULL)
    164  1.6   xtraeme 		aprint_normal("family 0x%02x",
    165  1.6   xtraeme 		    (uint)ONEWIRE_ROM_FAMILY_TYPE(oa->oa_rom));
    166  1.1       riz 	else
    167  1.6   xtraeme 		aprint_normal("\"%s\"", famname);
    168  1.6   xtraeme 	aprint_normal(" sn %012llx", ONEWIRE_ROM_SN(oa->oa_rom));
    169  1.1       riz 
    170  1.1       riz 	if (pnp != NULL)
    171  1.6   xtraeme 		aprint_normal(" at %s", pnp);
    172  1.1       riz 
    173  1.6   xtraeme 	return UNCONF;
    174  1.1       riz }
    175  1.1       riz 
    176  1.1       riz int
    177  1.4  christos onewirebus_print(void *aux, const char *pnp)
    178  1.1       riz {
    179  1.1       riz 	if (pnp != NULL)
    180  1.6   xtraeme 		aprint_normal("onewire at %s", pnp);
    181  1.1       riz 
    182  1.6   xtraeme 	return UNCONF;
    183  1.1       riz }
    184  1.1       riz 
    185  1.1       riz int
    186  1.1       riz onewire_lock(void *arg, int flags)
    187  1.1       riz {
    188  1.1       riz 	struct onewire_softc *sc = arg;
    189  1.1       riz 
    190  1.1       riz 	if (flags & ONEWIRE_NOWAIT)
    191  1.6   xtraeme 		return rw_tryenter(&sc->sc_rwlock, RW_WRITER);
    192  1.6   xtraeme 
    193  1.6   xtraeme 	rw_enter(&sc->sc_rwlock, RW_WRITER);
    194  1.6   xtraeme 	return 0;
    195  1.1       riz }
    196  1.1       riz 
    197  1.1       riz void
    198  1.1       riz onewire_unlock(void *arg)
    199  1.1       riz {
    200  1.1       riz 	struct onewire_softc *sc = arg;
    201  1.1       riz 
    202  1.6   xtraeme 	rw_exit(&sc->sc_rwlock);
    203  1.1       riz }
    204  1.1       riz 
    205  1.1       riz int
    206  1.1       riz onewire_reset(void *arg)
    207  1.1       riz {
    208  1.1       riz 	struct onewire_softc *sc = arg;
    209  1.1       riz 	struct onewire_bus *bus = sc->sc_bus;
    210  1.1       riz 
    211  1.6   xtraeme 	return bus->bus_reset(bus->bus_cookie);
    212  1.1       riz }
    213  1.1       riz 
    214  1.1       riz int
    215  1.1       riz onewire_bit(void *arg, int value)
    216  1.1       riz {
    217  1.1       riz 	struct onewire_softc *sc = arg;
    218  1.1       riz 	struct onewire_bus *bus = sc->sc_bus;
    219  1.1       riz 
    220  1.6   xtraeme 	return bus->bus_bit(bus->bus_cookie, value);
    221  1.1       riz }
    222  1.1       riz 
    223  1.1       riz int
    224  1.1       riz onewire_read_byte(void *arg)
    225  1.1       riz {
    226  1.1       riz 	struct onewire_softc *sc = arg;
    227  1.1       riz 	struct onewire_bus *bus = sc->sc_bus;
    228  1.6   xtraeme 	uint8_t value = 0;
    229  1.1       riz 	int i;
    230  1.1       riz 
    231  1.1       riz 	if (bus->bus_read_byte != NULL)
    232  1.6   xtraeme 		return bus->bus_read_byte(bus->bus_cookie);
    233  1.1       riz 
    234  1.1       riz 	for (i = 0; i < 8; i++)
    235  1.1       riz 		value |= (bus->bus_bit(bus->bus_cookie, 1) << i);
    236  1.1       riz 
    237  1.6   xtraeme 	return value;
    238  1.1       riz }
    239  1.1       riz 
    240  1.1       riz void
    241  1.1       riz onewire_write_byte(void *arg, int value)
    242  1.1       riz {
    243  1.1       riz 	struct onewire_softc *sc = arg;
    244  1.1       riz 	struct onewire_bus *bus = sc->sc_bus;
    245  1.1       riz 	int i;
    246  1.1       riz 
    247  1.1       riz 	if (bus->bus_write_byte != NULL)
    248  1.6   xtraeme 		return bus->bus_write_byte(bus->bus_cookie, value);
    249  1.1       riz 
    250  1.1       riz 	for (i = 0; i < 8; i++)
    251  1.1       riz 		bus->bus_bit(bus->bus_cookie, (value >> i) & 0x1);
    252  1.1       riz }
    253  1.1       riz 
    254  1.1       riz int
    255  1.1       riz onewire_triplet(void *arg, int dir)
    256  1.1       riz {
    257  1.1       riz 	struct onewire_softc *sc = arg;
    258  1.1       riz 	struct onewire_bus *bus = sc->sc_bus;
    259  1.1       riz 	int rv;
    260  1.1       riz 
    261  1.1       riz 	if (bus->bus_triplet != NULL)
    262  1.6   xtraeme 		return bus->bus_triplet(bus->bus_cookie, dir);
    263  1.1       riz 
    264  1.1       riz 	rv = bus->bus_bit(bus->bus_cookie, 1);
    265  1.1       riz 	rv <<= 1;
    266  1.1       riz 	rv |= bus->bus_bit(bus->bus_cookie, 1);
    267  1.1       riz 
    268  1.1       riz 	switch (rv) {
    269  1.1       riz 	case 0x0:
    270  1.1       riz 		bus->bus_bit(bus->bus_cookie, dir);
    271  1.1       riz 		break;
    272  1.1       riz 	case 0x1:
    273  1.1       riz 		bus->bus_bit(bus->bus_cookie, 0);
    274  1.1       riz 		break;
    275  1.1       riz 	default:
    276  1.1       riz 		bus->bus_bit(bus->bus_cookie, 1);
    277  1.1       riz 	}
    278  1.1       riz 
    279  1.6   xtraeme 	return rv;
    280  1.1       riz }
    281  1.1       riz 
    282  1.1       riz void
    283  1.1       riz onewire_read_block(void *arg, void *buf, int len)
    284  1.1       riz {
    285  1.6   xtraeme 	uint8_t *p = buf;
    286  1.1       riz 
    287  1.1       riz 	while (len--)
    288  1.1       riz 		*p++ = onewire_read_byte(arg);
    289  1.1       riz }
    290  1.1       riz 
    291  1.1       riz void
    292  1.1       riz onewire_write_block(void *arg, const void *buf, int len)
    293  1.1       riz {
    294  1.6   xtraeme 	const uint8_t *p = buf;
    295  1.1       riz 
    296  1.1       riz 	while (len--)
    297  1.1       riz 		onewire_write_byte(arg, *p++);
    298  1.1       riz }
    299  1.1       riz 
    300  1.1       riz void
    301  1.1       riz onewire_matchrom(void *arg, u_int64_t rom)
    302  1.1       riz {
    303  1.1       riz 	int i;
    304  1.1       riz 
    305  1.1       riz 	onewire_write_byte(arg, ONEWIRE_CMD_MATCH_ROM);
    306  1.1       riz 	for (i = 0; i < 8; i++)
    307  1.1       riz 		onewire_write_byte(arg, (rom >> (i * 8)) & 0xff);
    308  1.1       riz }
    309  1.1       riz 
    310  1.1       riz void
    311  1.1       riz onewire_thread(void *arg)
    312  1.1       riz {
    313  1.1       riz 	struct onewire_softc *sc = arg;
    314  1.1       riz 
    315  1.1       riz 	while (!sc->sc_dying) {
    316  1.1       riz 		onewire_scan(sc);
    317  1.1       riz 		tsleep(sc->sc_thread, PWAIT, "owidle", ONEWIRE_SCANTIME * hz);
    318  1.1       riz 	}
    319  1.1       riz 
    320  1.1       riz 	sc->sc_thread = NULL;
    321  1.1       riz 	wakeup(&sc->sc_dying);
    322  1.1       riz 	kthread_exit(0);
    323  1.1       riz }
    324  1.1       riz void
    325  1.1       riz onewire_scan(struct onewire_softc *sc)
    326  1.1       riz {
    327  1.1       riz 	struct onewire_device *d, *next, *nd;
    328  1.1       riz 	struct onewire_attach_args oa;
    329  1.1       riz 	struct device *dev;
    330  1.1       riz 	int search = 1, count = 0, present;
    331  1.1       riz 	int dir, rv;
    332  1.6   xtraeme 	uint64_t mask, rom = 0, lastrom;
    333  1.6   xtraeme 	uint8_t data[8];
    334  1.1       riz 	int i, i0 = -1, lastd = -1;
    335  1.1       riz 
    336  1.1       riz 	TAILQ_FOREACH(d, &sc->sc_devs, d_list)
    337  1.1       riz 		d->d_present = 0;
    338  1.1       riz 
    339  1.1       riz 	while (search && count++ < ONEWIRE_MAXDEVS) {
    340  1.1       riz 		/* XXX: yield processor */
    341  1.1       riz 		tsleep(sc, PWAIT, "owscan", hz / 10);
    342  1.1       riz 
    343  1.1       riz 		/*
    344  1.1       riz 		 * Reset the bus. If there's no presence pulse
    345  1.1       riz 		 * don't search for any devices.
    346  1.1       riz 		 */
    347  1.1       riz 		onewire_lock(sc, 0);
    348  1.1       riz 		if (onewire_reset(sc) != 0) {
    349  1.1       riz 			DPRINTF(("%s: scan: no presence pulse\n",
    350  1.1       riz 			    sc->sc_dev.dv_xname));
    351  1.1       riz 			onewire_unlock(sc);
    352  1.1       riz 			break;
    353  1.1       riz 		}
    354  1.1       riz 
    355  1.1       riz 		/*
    356  1.1       riz 		 * Start new search. Go through the previous path to
    357  1.1       riz 		 * the point we made a decision last time and make an
    358  1.1       riz 		 * opposite decision. If we didn't make any decision
    359  1.1       riz 		 * stop searching.
    360  1.1       riz 		 */
    361  1.1       riz 		search = 0;
    362  1.1       riz 		lastrom = rom;
    363  1.1       riz 		rom = 0;
    364  1.1       riz 		onewire_write_byte(sc, ONEWIRE_CMD_SEARCH_ROM);
    365  1.1       riz 		for (i = 0,i0 = -1; i < 64; i++) {
    366  1.1       riz 			dir = (lastrom >> i) & 0x1;
    367  1.1       riz 			if (i == lastd)
    368  1.1       riz 				dir = 1;
    369  1.1       riz 			else if (i > lastd)
    370  1.1       riz 				dir = 0;
    371  1.1       riz 			rv = onewire_triplet(sc, dir);
    372  1.1       riz 			switch (rv) {
    373  1.1       riz 			case 0x0:
    374  1.1       riz 				if (i != lastd) {
    375  1.1       riz 					if (dir == 0)
    376  1.1       riz 						i0 = i;
    377  1.1       riz 					search = 1;
    378  1.1       riz 				}
    379  1.1       riz 				mask = dir;
    380  1.1       riz 				break;
    381  1.1       riz 			case 0x1:
    382  1.1       riz 				mask = 0;
    383  1.1       riz 				break;
    384  1.1       riz 			case 0x2:
    385  1.1       riz 				mask = 1;
    386  1.1       riz 				break;
    387  1.1       riz 			default:
    388  1.1       riz 				DPRINTF(("%s: scan: triplet error 0x%x, "
    389  1.1       riz 				    "step %d\n",
    390  1.1       riz 				    sc->sc_dev.dv_xname, rv, i));
    391  1.1       riz 				onewire_unlock(sc);
    392  1.1       riz 				return;
    393  1.1       riz 			}
    394  1.1       riz 			rom |= (mask << i);
    395  1.1       riz 		}
    396  1.1       riz 		lastd = i0;
    397  1.1       riz 		onewire_unlock(sc);
    398  1.1       riz 
    399  1.1       riz 		if (rom == 0)
    400  1.1       riz 			continue;
    401  1.1       riz 
    402  1.1       riz 		/*
    403  1.1       riz 		 * The last byte of the ROM code contains a CRC calculated
    404  1.1       riz 		 * from the first 7 bytes. Re-calculate it to make sure
    405  1.1       riz 		 * we found a valid device.
    406  1.1       riz 		 */
    407  1.1       riz 		for (i = 0; i < 8; i++)
    408  1.1       riz 			data[i] = (rom >> (i * 8)) & 0xff;
    409  1.1       riz 		if (onewire_crc(data, 7) != data[7])
    410  1.1       riz 			continue;
    411  1.1       riz 
    412  1.1       riz 		/*
    413  1.1       riz 		 * Go through the list of attached devices to see if we
    414  1.1       riz 		 * found a new one.
    415  1.1       riz 		 */
    416  1.1       riz 		present = 0;
    417  1.1       riz 		TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
    418  1.1       riz 			if (d->d_rom == rom) {
    419  1.1       riz 				d->d_present = 1;
    420  1.1       riz 				present = 1;
    421  1.1       riz 				break;
    422  1.1       riz 			}
    423  1.1       riz 		}
    424  1.1       riz 		if (!present) {
    425  1.1       riz 			bzero(&oa, sizeof(oa));
    426  1.1       riz 			oa.oa_onewire = sc;
    427  1.1       riz 			oa.oa_rom = rom;
    428  1.1       riz 			if ((dev = config_found(&sc->sc_dev, &oa,
    429  1.1       riz 			    onewire_print)) == NULL)
    430  1.1       riz 				continue;
    431  1.1       riz 
    432  1.1       riz 			MALLOC(nd, struct onewire_device *,
    433  1.1       riz 			    sizeof(struct onewire_device), M_DEVBUF, M_NOWAIT);
    434  1.1       riz 			if (nd == NULL)
    435  1.1       riz 				continue;
    436  1.1       riz 			nd->d_dev = dev;
    437  1.1       riz 			nd->d_rom = rom;
    438  1.1       riz 			nd->d_present = 1;
    439  1.1       riz 			TAILQ_INSERT_TAIL(&sc->sc_devs, nd, d_list);
    440  1.1       riz 		}
    441  1.1       riz 	}
    442  1.1       riz 
    443  1.1       riz 	/* Detach disappeared devices */
    444  1.1       riz 	onewire_lock(sc, 0);
    445  1.1       riz 	for (d = TAILQ_FIRST(&sc->sc_devs);
    446  1.1       riz 	    d != NULL; d = next) {
    447  1.1       riz 		next = TAILQ_NEXT(d, d_list);
    448  1.1       riz 		if (!d->d_present) {
    449  1.1       riz 			config_detach(d->d_dev, DETACH_FORCE);
    450  1.1       riz 			TAILQ_REMOVE(&sc->sc_devs, d, d_list);
    451  1.1       riz 			FREE(d, M_DEVBUF);
    452  1.1       riz 		}
    453  1.1       riz 	}
    454  1.1       riz 	onewire_unlock(sc);
    455  1.1       riz }
    456