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aac_pci.c revision 1.10
      1  1.10  gendalia /*	$NetBSD: aac_pci.c,v 1.10 2004/05/10 06:21:09 gendalia Exp $	*/
      2   1.1        ad 
      3   1.1        ad /*-
      4   1.1        ad  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5   1.1        ad  * All rights reserved.
      6   1.1        ad  *
      7   1.1        ad  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1        ad  * by Andrew Doran.
      9   1.1        ad  *
     10   1.1        ad  * Redistribution and use in source and binary forms, with or without
     11   1.1        ad  * modification, are permitted provided that the following conditions
     12   1.1        ad  * are met:
     13   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     14   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     15   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     17   1.1        ad  *    documentation and/or other materials provided with the distribution.
     18   1.1        ad  * 3. All advertising materials mentioning features or use of this software
     19   1.1        ad  *    must display the following acknowledgement:
     20   1.1        ad  *        This product includes software developed by the NetBSD
     21   1.1        ad  *        Foundation, Inc. and its contributors.
     22   1.1        ad  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23   1.1        ad  *    contributors may be used to endorse or promote products derived
     24   1.1        ad  *    from this software without specific prior written permission.
     25   1.1        ad  *
     26   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27   1.1        ad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28   1.1        ad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29   1.1        ad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30   1.1        ad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31   1.1        ad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32   1.1        ad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33   1.1        ad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34   1.1        ad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35   1.1        ad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36   1.1        ad  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1        ad  */
     38   1.1        ad 
     39   1.1        ad /*-
     40   1.1        ad  * Copyright (c) 2000 Michael Smith
     41   1.1        ad  * Copyright (c) 2000 BSDi
     42   1.1        ad  * Copyright (c) 2000 Niklas Hallqvist
     43   1.1        ad  * All rights reserved.
     44   1.1        ad  *
     45   1.1        ad  * Redistribution and use in source and binary forms, with or without
     46   1.1        ad  * modification, are permitted provided that the following conditions
     47   1.1        ad  * are met:
     48   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     49   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     50   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     51   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     52   1.1        ad  *    documentation and/or other materials provided with the distribution.
     53   1.1        ad  *
     54   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     55   1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56   1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57   1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     58   1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59   1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60   1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61   1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62   1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63   1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64   1.1        ad  * SUCH DAMAGE.
     65   1.1        ad  *
     66   1.1        ad  * from FreeBSD: aac_pci.c,v 1.1 2000/09/13 03:20:34 msmith Exp
     67   1.1        ad  * via OpenBSD: aac_pci.c,v 1.7 2002/03/14 01:26:58 millert Exp
     68   1.1        ad  */
     69   1.1        ad 
     70   1.1        ad /*
     71   1.1        ad  * PCI front-end for the `aac' driver.
     72   1.1        ad  */
     73   1.1        ad 
     74   1.1        ad #include <sys/cdefs.h>
     75  1.10  gendalia __KERNEL_RCSID(0, "$NetBSD: aac_pci.c,v 1.10 2004/05/10 06:21:09 gendalia Exp $");
     76   1.1        ad 
     77   1.1        ad #include <sys/param.h>
     78   1.1        ad #include <sys/systm.h>
     79   1.1        ad #include <sys/device.h>
     80   1.1        ad #include <sys/kernel.h>
     81   1.1        ad #include <sys/malloc.h>
     82   1.1        ad #include <sys/queue.h>
     83   1.1        ad 
     84   1.1        ad #include <machine/bus.h>
     85   1.1        ad #include <machine/endian.h>
     86   1.1        ad #include <machine/intr.h>
     87   1.1        ad 
     88   1.1        ad #include <dev/pci/pcidevs.h>
     89   1.1        ad #include <dev/pci/pcireg.h>
     90   1.1        ad #include <dev/pci/pcivar.h>
     91   1.1        ad 
     92   1.1        ad #include <dev/ic/aacreg.h>
     93   1.1        ad #include <dev/ic/aacvar.h>
     94   1.1        ad 
     95   1.1        ad int	aac_pci_match(struct device *, struct cfdata *, void *);
     96   1.1        ad void	aac_pci_attach(struct device *, struct device *, void *);
     97   1.1        ad const struct	aac_ident *aac_find_ident(struct pci_attach_args *);
     98   1.1        ad 
     99   1.1        ad /* i960Rx interface */
    100   1.1        ad int	aac_rx_get_fwstatus(struct aac_softc *);
    101   1.1        ad void	aac_rx_qnotify(struct aac_softc *, int);
    102   1.1        ad int	aac_rx_get_istatus(struct aac_softc *);
    103   1.1        ad void	aac_rx_clear_istatus(struct aac_softc *, int);
    104   1.1        ad void	aac_rx_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t,
    105   1.1        ad 			   u_int32_t, u_int32_t, u_int32_t);
    106   1.1        ad int	aac_rx_get_mailboxstatus(struct aac_softc *);
    107   1.1        ad void	aac_rx_set_interrupts(struct aac_softc *, int);
    108   1.1        ad 
    109   1.1        ad /* StrongARM interface */
    110   1.1        ad int	aac_sa_get_fwstatus(struct aac_softc *);
    111   1.1        ad void	aac_sa_qnotify(struct aac_softc *, int);
    112   1.1        ad int	aac_sa_get_istatus(struct aac_softc *);
    113   1.1        ad void	aac_sa_clear_istatus(struct aac_softc *, int);
    114   1.1        ad void	aac_sa_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t,
    115   1.1        ad 			   u_int32_t, u_int32_t, u_int32_t);
    116   1.1        ad int	aac_sa_get_mailboxstatus(struct aac_softc *);
    117   1.1        ad void	aac_sa_set_interrupts(struct aac_softc *, int);
    118   1.1        ad 
    119   1.1        ad const struct aac_interface aac_rx_interface = {
    120   1.1        ad 	aac_rx_get_fwstatus,
    121   1.1        ad 	aac_rx_qnotify,
    122   1.1        ad 	aac_rx_get_istatus,
    123   1.1        ad 	aac_rx_clear_istatus,
    124   1.1        ad 	aac_rx_set_mailbox,
    125   1.1        ad 	aac_rx_get_mailboxstatus,
    126   1.1        ad 	aac_rx_set_interrupts
    127   1.1        ad };
    128   1.1        ad 
    129   1.1        ad const struct aac_interface aac_sa_interface = {
    130   1.1        ad 	aac_sa_get_fwstatus,
    131   1.1        ad 	aac_sa_qnotify,
    132   1.1        ad 	aac_sa_get_istatus,
    133   1.1        ad 	aac_sa_clear_istatus,
    134   1.1        ad 	aac_sa_set_mailbox,
    135   1.1        ad 	aac_sa_get_mailboxstatus,
    136   1.1        ad 	aac_sa_set_interrupts
    137   1.1        ad };
    138   1.1        ad 
    139   1.1        ad struct aac_ident {
    140   1.1        ad 	u_short	vendor;
    141   1.1        ad 	u_short	device;
    142   1.1        ad 	u_short	subvendor;
    143   1.1        ad 	u_short	subdevice;
    144   1.1        ad 	u_short	hwif;
    145   1.1        ad 	u_short	quirks;
    146   1.1        ad 	const char	*prodstr;
    147   1.1        ad } const aac_ident[] = {
    148   1.1        ad 	{
    149   1.1        ad 		PCI_VENDOR_DELL,
    150   1.1        ad 		PCI_PRODUCT_DELL_PERC_2SI,
    151   1.1        ad 		PCI_VENDOR_DELL,
    152   1.1        ad 		PCI_PRODUCT_DELL_PERC_2SI,
    153   1.1        ad 		AAC_HWIF_I960RX,
    154   1.1        ad 		0,
    155   1.1        ad 		"Dell PERC 2/Si"
    156   1.1        ad 	},
    157   1.1        ad 	{
    158   1.1        ad 		PCI_VENDOR_DELL,
    159   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    160   1.1        ad 		PCI_VENDOR_DELL,
    161   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    162   1.1        ad 		AAC_HWIF_I960RX,
    163   1.1        ad 		0,
    164   1.1        ad 		"Dell PERC 3/Di"
    165   1.1        ad 	},
    166   1.1        ad 	{
    167   1.1        ad 		PCI_VENDOR_DELL,
    168   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    169   1.1        ad 		PCI_VENDOR_DELL,
    170   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_SUB2,
    171   1.1        ad 		AAC_HWIF_I960RX,
    172   1.1        ad 		0,
    173   1.1        ad 		"Dell PERC 3/Di"
    174   1.1        ad 	},
    175   1.1        ad 	{
    176   1.1        ad 		PCI_VENDOR_DELL,
    177   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    178   1.1        ad 		PCI_VENDOR_DELL,
    179   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_SUB3,
    180   1.1        ad 		AAC_HWIF_I960RX,
    181   1.1        ad 		0,
    182   1.1        ad 		"Dell PERC 3/Di"
    183   1.1        ad 	},
    184   1.1        ad 	{
    185   1.1        ad 		PCI_VENDOR_DELL,
    186   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_2,
    187   1.1        ad 		PCI_VENDOR_DELL,
    188   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_2_SUB,
    189   1.3        ad 		AAC_HWIF_I960RX,
    190   1.3        ad 		0,
    191   1.3        ad 		"Dell PERC 3/Di"
    192   1.3        ad 	},
    193   1.3        ad         {
    194   1.3        ad 		PCI_VENDOR_DELL,
    195   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    196   1.3        ad 		PCI_VENDOR_DELL,
    197   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB,
    198   1.3        ad 		AAC_HWIF_I960RX,
    199   1.3        ad 		0,
    200   1.3        ad 		"Dell PERC 3/Di"
    201   1.3        ad 	},
    202   1.3        ad 	{
    203   1.3        ad 		PCI_VENDOR_DELL,
    204   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    205   1.3        ad 		PCI_VENDOR_DELL,
    206   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB2,
    207   1.3        ad 		AAC_HWIF_I960RX,
    208   1.3        ad 		0,
    209   1.3        ad 		"Dell PERC 3/Di"
    210   1.3        ad 	},
    211   1.3        ad 	{
    212   1.3        ad 		PCI_VENDOR_DELL,
    213   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    214   1.3        ad 		PCI_VENDOR_DELL,
    215   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB3,
    216   1.1        ad 		AAC_HWIF_I960RX,
    217   1.1        ad 		0,
    218   1.1        ad 		"Dell PERC 3/Di"
    219   1.1        ad 	},
    220   1.1        ad 	{
    221   1.1        ad 		PCI_VENDOR_DELL,
    222   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI,
    223   1.1        ad 		PCI_VENDOR_DELL,
    224   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI,
    225   1.1        ad 		AAC_HWIF_I960RX,
    226   1.1        ad 		0,
    227   1.1        ad 		"Dell PERC 3/Si"
    228   1.1        ad 	},
    229   1.1        ad 	{
    230   1.1        ad 		PCI_VENDOR_DELL,
    231   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI_2,
    232   1.1        ad 		PCI_VENDOR_DELL,
    233   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI_2_SUB,
    234   1.1        ad 		AAC_HWIF_I960RX,
    235   1.1        ad 		0,
    236   1.1        ad 		"Dell PERC 3/Si"
    237   1.1        ad 	},
    238   1.1        ad 	{
    239   1.1        ad 		PCI_VENDOR_ADP2,
    240   1.1        ad 		PCI_PRODUCT_ADP2_AAC2622,
    241   1.1        ad 		PCI_VENDOR_ADP2,
    242   1.1        ad 		PCI_PRODUCT_ADP2_AAC2622,
    243   1.1        ad 		AAC_HWIF_I960RX,
    244   1.1        ad 		0,
    245   1.1        ad 		"Adaptec ADP-2622"
    246   1.1        ad 	},
    247   1.1        ad 	{
    248   1.1        ad 		PCI_VENDOR_ADP2,
    249   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    250   1.1        ad 		PCI_VENDOR_ADP2,
    251   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S_SUB2M,
    252   1.8  gendalia 		AAC_HWIF_I960RX,
    253   1.8  gendalia 		0,
    254   1.8  gendalia 		"Adaptec ASR-2200S"
    255   1.8  gendalia 	},
    256   1.8  gendalia 	{
    257   1.8  gendalia 		PCI_VENDOR_ADP2,
    258   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    259   1.8  gendalia 		PCI_VENDOR_DELL,
    260   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S_SUB2M,
    261   1.8  gendalia 		AAC_HWIF_I960RX,
    262   1.8  gendalia 		0,
    263   1.8  gendalia 		"Dell PERC 320/DC"
    264   1.8  gendalia 	},
    265   1.8  gendalia 	{
    266   1.8  gendalia 		PCI_VENDOR_ADP2,
    267   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    268   1.8  gendalia 		PCI_VENDOR_ADP2,
    269   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    270   1.1        ad 		AAC_HWIF_I960RX,
    271   1.1        ad 		0,
    272   1.1        ad 		"Adaptec ASR-2200S"
    273   1.1        ad 	},
    274   1.1        ad 	{
    275   1.1        ad 		PCI_VENDOR_ADP2,
    276   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    277   1.1        ad 		PCI_VENDOR_ADP2,
    278  1.10  gendalia 		PCI_PRODUCT_ADP2_AAR2810SA,
    279  1.10  gendalia 		AAC_HWIF_I960RX,
    280  1.10  gendalia 		0,
    281  1.10  gendalia 		"Adaptec AAR-2810SA"
    282  1.10  gendalia 	},
    283  1.10  gendalia 	{
    284  1.10  gendalia 		PCI_VENDOR_ADP2,
    285  1.10  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    286  1.10  gendalia 		PCI_VENDOR_ADP2,
    287   1.1        ad 		PCI_PRODUCT_ADP2_ASR2120S,
    288   1.1        ad 		AAC_HWIF_I960RX,
    289   1.1        ad 		0,
    290   1.1        ad 		"Adaptec ASR-2120S"
    291   1.1        ad 	},
    292   1.1        ad 	{
    293   1.9  jdolecek 		PCI_VENDOR_ADP2,
    294   1.9  jdolecek 		PCI_PRODUCT_ADP2_ASR2200S,
    295   1.9  jdolecek 		PCI_VENDOR_ADP2,
    296   1.9  jdolecek 		0x0290,
    297   1.9  jdolecek 		AAC_HWIF_I960RX,
    298   1.9  jdolecek 		0,
    299   1.9  jdolecek 		"Adaptec ASR-2410SA"
    300   1.9  jdolecek 	},
    301   1.9  jdolecek 	{
    302   1.1        ad 		PCI_VENDOR_DEC,
    303   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    304   1.1        ad 		PCI_VENDOR_ADP2,
    305   1.1        ad 		PCI_PRODUCT_ADP2_AAC364,
    306   1.1        ad 		AAC_HWIF_STRONGARM,
    307   1.1        ad 		0,
    308   1.1        ad 		"Adaptec AAC-364"
    309   1.1        ad 	},
    310   1.1        ad 	{
    311   1.1        ad 		PCI_VENDOR_DEC,
    312   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    313   1.1        ad 		PCI_VENDOR_ADP2,
    314   1.1        ad 		PCI_PRODUCT_ADP2_ASR5400S,
    315   1.1        ad 		AAC_HWIF_STRONGARM,
    316   1.1        ad 		0,
    317   1.1        ad 		"Adaptec ASR-5400S"
    318   1.1        ad 	},
    319   1.1        ad 	{
    320   1.1        ad 		PCI_VENDOR_DEC,
    321   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    322   1.1        ad 		PCI_VENDOR_ADP2,
    323   1.1        ad 		PCI_PRODUCT_ADP2_PERC_2QC,
    324   1.1        ad 		AAC_HWIF_STRONGARM,
    325   1.1        ad 		AAC_QUIRK_PERC2QC,
    326   1.1        ad 		"Dell PERC 2/QC"
    327   1.1        ad 	},
    328   1.1        ad 	{
    329   1.1        ad 		PCI_VENDOR_DEC,
    330   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    331   1.1        ad 		PCI_VENDOR_ADP2,
    332   1.1        ad 		PCI_PRODUCT_ADP2_PERC_3QC,
    333   1.1        ad 		AAC_HWIF_STRONGARM,
    334   1.1        ad 		0,
    335   1.1        ad 		"Dell PERC 3/QC"
    336   1.1        ad 	},
    337   1.1        ad 	{
    338   1.1        ad 		PCI_VENDOR_DEC,
    339   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    340   1.1        ad 		PCI_VENDOR_HP,
    341   1.1        ad 		PCI_PRODUCT_HP_NETRAID_4M,
    342   1.1        ad 		AAC_HWIF_STRONGARM,
    343   1.1        ad 		0,
    344   1.1        ad 		"HP NetRAID-4M"
    345   1.1        ad 	},
    346   1.1        ad };
    347   1.1        ad 
    348   1.5   thorpej CFATTACH_DECL(aac_pci, sizeof(struct aac_softc),
    349   1.6   thorpej     aac_pci_match, aac_pci_attach, NULL, NULL);
    350   1.1        ad 
    351   1.1        ad const struct aac_ident *
    352   1.1        ad aac_find_ident(struct pci_attach_args *pa)
    353   1.1        ad {
    354   1.1        ad 	const struct aac_ident *m, *mm;
    355   1.1        ad 	u_int32_t subsysid;
    356   1.1        ad 
    357   1.1        ad 	m = aac_ident;
    358   1.1        ad 	mm = aac_ident + (sizeof(aac_ident) / sizeof(aac_ident[0]));
    359   1.1        ad 
    360   1.1        ad 	while (m < mm) {
    361   1.1        ad 		if (m->vendor == PCI_VENDOR(pa->pa_id) &&
    362   1.1        ad 		    m->device == PCI_PRODUCT(pa->pa_id)) {
    363   1.1        ad 			subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag,
    364   1.1        ad 			    PCI_SUBSYS_ID_REG);
    365   1.1        ad 			if (m->subvendor == PCI_VENDOR(subsysid) &&
    366   1.1        ad 			    m->subdevice == PCI_PRODUCT(subsysid))
    367   1.1        ad 				return (m);
    368   1.1        ad 		}
    369   1.1        ad 		m++;
    370   1.1        ad 	}
    371   1.1        ad 
    372   1.1        ad 	return (NULL);
    373   1.1        ad }
    374   1.1        ad 
    375   1.1        ad int
    376   1.1        ad aac_pci_match(struct device *parent, struct cfdata *match, void *aux)
    377   1.1        ad {
    378   1.1        ad 	struct pci_attach_args *pa;
    379   1.1        ad 
    380   1.1        ad 	pa = aux;
    381   1.1        ad 
    382   1.1        ad 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
    383   1.1        ad 		return (0);
    384   1.1        ad 
    385   1.1        ad 	return (aac_find_ident(pa) != NULL);
    386   1.1        ad }
    387   1.1        ad 
    388   1.1        ad void
    389   1.1        ad aac_pci_attach(struct device *parent, struct device *self, void *aux)
    390   1.1        ad {
    391   1.1        ad 	struct pci_attach_args *pa;
    392   1.1        ad 	pci_chipset_tag_t pc;
    393   1.1        ad 	struct aac_softc *sc;
    394   1.1        ad 	u_int16_t command;
    395   1.1        ad 	bus_addr_t membase;
    396   1.1        ad 	bus_size_t memsize;
    397   1.1        ad 	pci_intr_handle_t ih;
    398   1.1        ad 	const char *intrstr;
    399   1.1        ad 	int state;
    400   1.1        ad 	const struct aac_ident *m;
    401   1.1        ad 
    402   1.1        ad 	pa = aux;
    403   1.1        ad 	pc = pa->pa_pc;
    404   1.1        ad 	sc = (struct aac_softc *)self;
    405   1.1        ad 	state = 0;
    406   1.1        ad 
    407   1.7   thorpej 	aprint_naive(": RAID controller\n");
    408   1.7   thorpej 	aprint_normal(": ");
    409   1.1        ad 
    410   1.1        ad 	/*
    411   1.1        ad 	 * Verify that the adapter is correctly set up in PCI space.
    412   1.1        ad 	 */
    413   1.1        ad 	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    414   1.1        ad 	command |= PCI_COMMAND_MASTER_ENABLE;
    415   1.1        ad 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
    416   1.1        ad 	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    417   1.1        ad 	AAC_DPRINTF(AAC_D_MISC, ("pci command status reg 0x08x "));
    418   1.1        ad 
    419   1.1        ad 	if ((command & PCI_COMMAND_MASTER_ENABLE) == 0) {
    420   1.7   thorpej 		aprint_error("can't enable bus-master feature\n");
    421   1.1        ad 		goto bail_out;
    422   1.1        ad 	}
    423   1.1        ad 
    424   1.1        ad 	if ((command & PCI_COMMAND_MEM_ENABLE) == 0) {
    425   1.7   thorpej 		aprint_error("memory window not available\n");
    426   1.1        ad 		goto bail_out;
    427   1.1        ad 	}
    428   1.1        ad 
    429   1.1        ad 	/*
    430   1.1        ad 	 * Map control/status registers.
    431   1.1        ad 	 */
    432   1.1        ad 	if (pci_mapreg_map(pa, PCI_MAPREG_START,
    433   1.1        ad 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_memt,
    434   1.1        ad 	    &sc->sc_memh, &membase, &memsize)) {
    435   1.7   thorpej 		aprint_error("can't find mem space\n");
    436   1.1        ad 		goto bail_out;
    437   1.1        ad 	}
    438   1.1        ad 	state++;
    439   1.1        ad 
    440   1.1        ad 	if (pci_intr_map(pa, &ih)) {
    441   1.7   thorpej 		aprint_error("couldn't map interrupt\n");
    442   1.1        ad 		goto bail_out;
    443   1.1        ad 	}
    444   1.1        ad 	intrstr = pci_intr_string(pc, ih);
    445   1.1        ad 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, aac_intr, sc);
    446   1.1        ad 	if (sc->sc_ih == NULL) {
    447   1.7   thorpej 		aprint_error("couldn't establish interrupt");
    448   1.1        ad 		if (intrstr != NULL)
    449   1.7   thorpej 			aprint_normal(" at %s", intrstr);
    450   1.7   thorpej 		aprint_normal("\n");
    451   1.1        ad 		goto bail_out;
    452   1.1        ad 	}
    453   1.1        ad 	state++;
    454   1.1        ad 
    455   1.1        ad 	sc->sc_dmat = pa->pa_dmat;
    456   1.1        ad 
    457   1.1        ad 	m = aac_find_ident(pa);
    458   1.7   thorpej 	aprint_normal("%s\n", m->prodstr);
    459   1.1        ad 	if (intrstr != NULL)
    460   1.7   thorpej 		aprint_normal("%s: interrupting at %s\n",
    461   1.7   thorpej 		    sc->sc_dv.dv_xname, intrstr);
    462   1.1        ad 
    463   1.1        ad 	sc->sc_hwif = m->hwif;
    464   1.1        ad 	sc->sc_quirks = m->quirks;
    465   1.1        ad 	switch (sc->sc_hwif) {
    466   1.1        ad 		case AAC_HWIF_I960RX:
    467   1.1        ad 			AAC_DPRINTF(AAC_D_MISC,
    468   1.1        ad 			    ("set hardware up for i960Rx"));
    469   1.1        ad 			sc->sc_if = aac_rx_interface;
    470   1.1        ad 			break;
    471   1.1        ad 
    472   1.1        ad 		case AAC_HWIF_STRONGARM:
    473   1.1        ad 			AAC_DPRINTF(AAC_D_MISC,
    474   1.1        ad 			    ("set hardware up for StrongARM"));
    475   1.1        ad 			sc->sc_if = aac_sa_interface;
    476   1.1        ad 			break;
    477   1.1        ad 	}
    478   1.1        ad 
    479   1.1        ad 	if (!aac_attach(sc))
    480   1.1        ad 		return;
    481   1.1        ad 
    482   1.1        ad  bail_out:
    483   1.1        ad 	if (state > 1)
    484   1.1        ad 		pci_intr_disestablish(pc, sc->sc_ih);
    485   1.1        ad 	if (state > 0)
    486   1.1        ad 		bus_space_unmap(sc->sc_memt, sc->sc_memh, memsize);
    487   1.1        ad }
    488   1.1        ad 
    489   1.1        ad /*
    490   1.1        ad  * Read the current firmware status word.
    491   1.1        ad  */
    492   1.1        ad int
    493   1.1        ad aac_sa_get_fwstatus(struct aac_softc *sc)
    494   1.1        ad {
    495   1.1        ad 
    496   1.1        ad 	return (AAC_GETREG4(sc, AAC_SA_FWSTATUS));
    497   1.1        ad }
    498   1.1        ad 
    499   1.1        ad int
    500   1.1        ad aac_rx_get_fwstatus(struct aac_softc *sc)
    501   1.1        ad {
    502   1.1        ad 
    503   1.1        ad 	return (AAC_GETREG4(sc, AAC_RX_FWSTATUS));
    504   1.1        ad }
    505   1.1        ad 
    506   1.1        ad /*
    507   1.1        ad  * Notify the controller of a change in a given queue
    508   1.1        ad  */
    509   1.1        ad 
    510   1.1        ad void
    511   1.1        ad aac_sa_qnotify(struct aac_softc *sc, int qbit)
    512   1.1        ad {
    513   1.1        ad 
    514   1.1        ad 	AAC_SETREG2(sc, AAC_SA_DOORBELL1_SET, qbit);
    515   1.1        ad }
    516   1.1        ad 
    517   1.1        ad void
    518   1.1        ad aac_rx_qnotify(struct aac_softc *sc, int qbit)
    519   1.1        ad {
    520   1.1        ad 
    521   1.1        ad 	AAC_SETREG4(sc, AAC_RX_IDBR, qbit);
    522   1.1        ad }
    523   1.1        ad 
    524   1.1        ad /*
    525   1.1        ad  * Get the interrupt reason bits
    526   1.1        ad  */
    527   1.1        ad int
    528   1.1        ad aac_sa_get_istatus(struct aac_softc *sc)
    529   1.1        ad {
    530   1.1        ad 
    531   1.1        ad 	return (AAC_GETREG2(sc, AAC_SA_DOORBELL0));
    532   1.1        ad }
    533   1.1        ad 
    534   1.1        ad int
    535   1.1        ad aac_rx_get_istatus(struct aac_softc *sc)
    536   1.1        ad {
    537   1.1        ad 
    538   1.1        ad 	return (AAC_GETREG4(sc, AAC_RX_ODBR));
    539   1.1        ad }
    540   1.1        ad 
    541   1.1        ad /*
    542   1.1        ad  * Clear some interrupt reason bits
    543   1.1        ad  */
    544   1.1        ad void
    545   1.1        ad aac_sa_clear_istatus(struct aac_softc *sc, int mask)
    546   1.1        ad {
    547   1.1        ad 
    548   1.1        ad 	AAC_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask);
    549   1.1        ad }
    550   1.1        ad 
    551   1.1        ad void
    552   1.1        ad aac_rx_clear_istatus(struct aac_softc *sc, int mask)
    553   1.1        ad {
    554   1.1        ad 
    555   1.1        ad 	AAC_SETREG4(sc, AAC_RX_ODBR, mask);
    556   1.1        ad }
    557   1.1        ad 
    558   1.1        ad /*
    559   1.1        ad  * Populate the mailbox and set the command word
    560   1.1        ad  */
    561   1.1        ad void
    562   1.1        ad aac_sa_set_mailbox(struct aac_softc *sc, u_int32_t command,
    563   1.1        ad 		   u_int32_t arg0, u_int32_t arg1, u_int32_t arg2,
    564   1.1        ad 		   u_int32_t arg3)
    565   1.1        ad {
    566   1.1        ad 
    567   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX, command);
    568   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 4, arg0);
    569   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 8, arg1);
    570   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 12, arg2);
    571   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 16, arg3);
    572   1.1        ad }
    573   1.1        ad 
    574   1.1        ad void
    575   1.1        ad aac_rx_set_mailbox(struct aac_softc *sc, u_int32_t command,
    576   1.1        ad 		   u_int32_t arg0, u_int32_t arg1, u_int32_t arg2,
    577   1.1        ad 		   u_int32_t arg3)
    578   1.1        ad {
    579   1.1        ad 
    580   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX, command);
    581   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 4, arg0);
    582   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 8, arg1);
    583   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 12, arg2);
    584   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 16, arg3);
    585   1.1        ad }
    586   1.1        ad 
    587   1.1        ad /*
    588   1.1        ad  * Fetch the immediate command status word
    589   1.1        ad  */
    590   1.1        ad int
    591   1.1        ad aac_sa_get_mailboxstatus(struct aac_softc *sc)
    592   1.1        ad {
    593   1.1        ad 
    594   1.1        ad 	return (AAC_GETREG4(sc, AAC_SA_MAILBOX));
    595   1.1        ad }
    596   1.1        ad 
    597   1.1        ad int
    598   1.1        ad aac_rx_get_mailboxstatus(struct aac_softc *sc)
    599   1.1        ad {
    600   1.1        ad 
    601   1.1        ad 	return (AAC_GETREG4(sc, AAC_RX_MAILBOX));
    602   1.1        ad }
    603   1.1        ad 
    604   1.1        ad /*
    605   1.1        ad  * Set/clear interrupt masks
    606   1.1        ad  */
    607   1.1        ad void
    608   1.1        ad aac_sa_set_interrupts(struct aac_softc *sc, int enable)
    609   1.1        ad {
    610   1.1        ad 
    611   1.1        ad 	if (enable)
    612   1.1        ad 		AAC_SETREG2((sc), AAC_SA_MASK0_CLEAR, AAC_DB_INTERRUPTS);
    613   1.1        ad 	else
    614   1.1        ad 		AAC_SETREG2((sc), AAC_SA_MASK0_SET, ~0);
    615   1.1        ad }
    616   1.1        ad 
    617   1.1        ad void
    618   1.1        ad aac_rx_set_interrupts(struct aac_softc *sc, int enable)
    619   1.1        ad {
    620   1.1        ad 
    621   1.1        ad 	if (enable)
    622   1.1        ad 		AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INTERRUPTS);
    623   1.1        ad 	else
    624   1.1        ad 		AAC_SETREG4(sc, AAC_RX_OIMR, ~0);
    625   1.1        ad }
    626