aac_pci.c revision 1.2.6.2
1 1.2.6.2 nathanw /* $NetBSD: aac_pci.c,v 1.2.6.2 2002/06/20 03:45:19 nathanw Exp $ */ 2 1.2.6.2 nathanw 3 1.2.6.2 nathanw /*- 4 1.2.6.2 nathanw * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 1.2.6.2 nathanw * All rights reserved. 6 1.2.6.2 nathanw * 7 1.2.6.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 8 1.2.6.2 nathanw * by Andrew Doran. 9 1.2.6.2 nathanw * 10 1.2.6.2 nathanw * Redistribution and use in source and binary forms, with or without 11 1.2.6.2 nathanw * modification, are permitted provided that the following conditions 12 1.2.6.2 nathanw * are met: 13 1.2.6.2 nathanw * 1. Redistributions of source code must retain the above copyright 14 1.2.6.2 nathanw * notice, this list of conditions and the following disclaimer. 15 1.2.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.6.2 nathanw * notice, this list of conditions and the following disclaimer in the 17 1.2.6.2 nathanw * documentation and/or other materials provided with the distribution. 18 1.2.6.2 nathanw * 3. All advertising materials mentioning features or use of this software 19 1.2.6.2 nathanw * must display the following acknowledgement: 20 1.2.6.2 nathanw * This product includes software developed by the NetBSD 21 1.2.6.2 nathanw * Foundation, Inc. and its contributors. 22 1.2.6.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.2.6.2 nathanw * contributors may be used to endorse or promote products derived 24 1.2.6.2 nathanw * from this software without specific prior written permission. 25 1.2.6.2 nathanw * 26 1.2.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.2.6.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.2.6.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.2.6.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.2.6.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.2.6.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.2.6.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.2.6.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.2.6.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.2.6.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.2.6.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 37 1.2.6.2 nathanw */ 38 1.2.6.2 nathanw 39 1.2.6.2 nathanw /*- 40 1.2.6.2 nathanw * Copyright (c) 2000 Michael Smith 41 1.2.6.2 nathanw * Copyright (c) 2000 BSDi 42 1.2.6.2 nathanw * Copyright (c) 2000 Niklas Hallqvist 43 1.2.6.2 nathanw * All rights reserved. 44 1.2.6.2 nathanw * 45 1.2.6.2 nathanw * Redistribution and use in source and binary forms, with or without 46 1.2.6.2 nathanw * modification, are permitted provided that the following conditions 47 1.2.6.2 nathanw * are met: 48 1.2.6.2 nathanw * 1. Redistributions of source code must retain the above copyright 49 1.2.6.2 nathanw * notice, this list of conditions and the following disclaimer. 50 1.2.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 51 1.2.6.2 nathanw * notice, this list of conditions and the following disclaimer in the 52 1.2.6.2 nathanw * documentation and/or other materials provided with the distribution. 53 1.2.6.2 nathanw * 54 1.2.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 55 1.2.6.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 56 1.2.6.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 57 1.2.6.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 58 1.2.6.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 59 1.2.6.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 60 1.2.6.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 1.2.6.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 62 1.2.6.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 63 1.2.6.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 64 1.2.6.2 nathanw * SUCH DAMAGE. 65 1.2.6.2 nathanw * 66 1.2.6.2 nathanw * from FreeBSD: aac_pci.c,v 1.1 2000/09/13 03:20:34 msmith Exp 67 1.2.6.2 nathanw * via OpenBSD: aac_pci.c,v 1.7 2002/03/14 01:26:58 millert Exp 68 1.2.6.2 nathanw */ 69 1.2.6.2 nathanw 70 1.2.6.2 nathanw /* 71 1.2.6.2 nathanw * PCI front-end for the `aac' driver. 72 1.2.6.2 nathanw */ 73 1.2.6.2 nathanw 74 1.2.6.2 nathanw #include <sys/cdefs.h> 75 1.2.6.2 nathanw __KERNEL_RCSID(0, "$NetBSD: aac_pci.c,v 1.2.6.2 2002/06/20 03:45:19 nathanw Exp $"); 76 1.2.6.2 nathanw 77 1.2.6.2 nathanw #include <sys/param.h> 78 1.2.6.2 nathanw #include <sys/systm.h> 79 1.2.6.2 nathanw #include <sys/device.h> 80 1.2.6.2 nathanw #include <sys/kernel.h> 81 1.2.6.2 nathanw #include <sys/malloc.h> 82 1.2.6.2 nathanw #include <sys/queue.h> 83 1.2.6.2 nathanw 84 1.2.6.2 nathanw #include <machine/bus.h> 85 1.2.6.2 nathanw #include <machine/endian.h> 86 1.2.6.2 nathanw #include <machine/intr.h> 87 1.2.6.2 nathanw 88 1.2.6.2 nathanw #include <dev/pci/pcidevs.h> 89 1.2.6.2 nathanw #include <dev/pci/pcireg.h> 90 1.2.6.2 nathanw #include <dev/pci/pcivar.h> 91 1.2.6.2 nathanw 92 1.2.6.2 nathanw #include <dev/ic/aacreg.h> 93 1.2.6.2 nathanw #include <dev/ic/aacvar.h> 94 1.2.6.2 nathanw 95 1.2.6.2 nathanw int aac_pci_match(struct device *, struct cfdata *, void *); 96 1.2.6.2 nathanw void aac_pci_attach(struct device *, struct device *, void *); 97 1.2.6.2 nathanw const struct aac_ident *aac_find_ident(struct pci_attach_args *); 98 1.2.6.2 nathanw 99 1.2.6.2 nathanw /* i960Rx interface */ 100 1.2.6.2 nathanw int aac_rx_get_fwstatus(struct aac_softc *); 101 1.2.6.2 nathanw void aac_rx_qnotify(struct aac_softc *, int); 102 1.2.6.2 nathanw int aac_rx_get_istatus(struct aac_softc *); 103 1.2.6.2 nathanw void aac_rx_clear_istatus(struct aac_softc *, int); 104 1.2.6.2 nathanw void aac_rx_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t, 105 1.2.6.2 nathanw u_int32_t, u_int32_t, u_int32_t); 106 1.2.6.2 nathanw int aac_rx_get_mailboxstatus(struct aac_softc *); 107 1.2.6.2 nathanw void aac_rx_set_interrupts(struct aac_softc *, int); 108 1.2.6.2 nathanw 109 1.2.6.2 nathanw /* StrongARM interface */ 110 1.2.6.2 nathanw int aac_sa_get_fwstatus(struct aac_softc *); 111 1.2.6.2 nathanw void aac_sa_qnotify(struct aac_softc *, int); 112 1.2.6.2 nathanw int aac_sa_get_istatus(struct aac_softc *); 113 1.2.6.2 nathanw void aac_sa_clear_istatus(struct aac_softc *, int); 114 1.2.6.2 nathanw void aac_sa_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t, 115 1.2.6.2 nathanw u_int32_t, u_int32_t, u_int32_t); 116 1.2.6.2 nathanw int aac_sa_get_mailboxstatus(struct aac_softc *); 117 1.2.6.2 nathanw void aac_sa_set_interrupts(struct aac_softc *, int); 118 1.2.6.2 nathanw 119 1.2.6.2 nathanw const struct aac_interface aac_rx_interface = { 120 1.2.6.2 nathanw aac_rx_get_fwstatus, 121 1.2.6.2 nathanw aac_rx_qnotify, 122 1.2.6.2 nathanw aac_rx_get_istatus, 123 1.2.6.2 nathanw aac_rx_clear_istatus, 124 1.2.6.2 nathanw aac_rx_set_mailbox, 125 1.2.6.2 nathanw aac_rx_get_mailboxstatus, 126 1.2.6.2 nathanw aac_rx_set_interrupts 127 1.2.6.2 nathanw }; 128 1.2.6.2 nathanw 129 1.2.6.2 nathanw const struct aac_interface aac_sa_interface = { 130 1.2.6.2 nathanw aac_sa_get_fwstatus, 131 1.2.6.2 nathanw aac_sa_qnotify, 132 1.2.6.2 nathanw aac_sa_get_istatus, 133 1.2.6.2 nathanw aac_sa_clear_istatus, 134 1.2.6.2 nathanw aac_sa_set_mailbox, 135 1.2.6.2 nathanw aac_sa_get_mailboxstatus, 136 1.2.6.2 nathanw aac_sa_set_interrupts 137 1.2.6.2 nathanw }; 138 1.2.6.2 nathanw 139 1.2.6.2 nathanw struct aac_ident { 140 1.2.6.2 nathanw u_short vendor; 141 1.2.6.2 nathanw u_short device; 142 1.2.6.2 nathanw u_short subvendor; 143 1.2.6.2 nathanw u_short subdevice; 144 1.2.6.2 nathanw u_short hwif; 145 1.2.6.2 nathanw u_short quirks; 146 1.2.6.2 nathanw const char *prodstr; 147 1.2.6.2 nathanw } const aac_ident[] = { 148 1.2.6.2 nathanw { 149 1.2.6.2 nathanw PCI_VENDOR_DELL, 150 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_2SI, 151 1.2.6.2 nathanw PCI_VENDOR_DELL, 152 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_2SI, 153 1.2.6.2 nathanw AAC_HWIF_I960RX, 154 1.2.6.2 nathanw 0, 155 1.2.6.2 nathanw "Dell PERC 2/Si" 156 1.2.6.2 nathanw }, 157 1.2.6.2 nathanw { 158 1.2.6.2 nathanw PCI_VENDOR_DELL, 159 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI, 160 1.2.6.2 nathanw PCI_VENDOR_DELL, 161 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI, 162 1.2.6.2 nathanw AAC_HWIF_I960RX, 163 1.2.6.2 nathanw 0, 164 1.2.6.2 nathanw "Dell PERC 3/Di" 165 1.2.6.2 nathanw }, 166 1.2.6.2 nathanw { 167 1.2.6.2 nathanw PCI_VENDOR_DELL, 168 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI, 169 1.2.6.2 nathanw PCI_VENDOR_DELL, 170 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI_SUB2, 171 1.2.6.2 nathanw AAC_HWIF_I960RX, 172 1.2.6.2 nathanw 0, 173 1.2.6.2 nathanw "Dell PERC 3/Di" 174 1.2.6.2 nathanw }, 175 1.2.6.2 nathanw { 176 1.2.6.2 nathanw PCI_VENDOR_DELL, 177 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI, 178 1.2.6.2 nathanw PCI_VENDOR_DELL, 179 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI_SUB3, 180 1.2.6.2 nathanw AAC_HWIF_I960RX, 181 1.2.6.2 nathanw 0, 182 1.2.6.2 nathanw "Dell PERC 3/Di" 183 1.2.6.2 nathanw }, 184 1.2.6.2 nathanw { 185 1.2.6.2 nathanw PCI_VENDOR_DELL, 186 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI_2, 187 1.2.6.2 nathanw PCI_VENDOR_DELL, 188 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3DI_2_SUB, 189 1.2.6.2 nathanw AAC_HWIF_I960RX, 190 1.2.6.2 nathanw 0, 191 1.2.6.2 nathanw "Dell PERC 3/Di" 192 1.2.6.2 nathanw }, 193 1.2.6.2 nathanw { 194 1.2.6.2 nathanw PCI_VENDOR_DELL, 195 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3SI, 196 1.2.6.2 nathanw PCI_VENDOR_DELL, 197 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3SI, 198 1.2.6.2 nathanw AAC_HWIF_I960RX, 199 1.2.6.2 nathanw 0, 200 1.2.6.2 nathanw "Dell PERC 3/Si" 201 1.2.6.2 nathanw }, 202 1.2.6.2 nathanw { 203 1.2.6.2 nathanw PCI_VENDOR_DELL, 204 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3SI_2, 205 1.2.6.2 nathanw PCI_VENDOR_DELL, 206 1.2.6.2 nathanw PCI_PRODUCT_DELL_PERC_3SI_2_SUB, 207 1.2.6.2 nathanw AAC_HWIF_I960RX, 208 1.2.6.2 nathanw 0, 209 1.2.6.2 nathanw "Dell PERC 3/Si" 210 1.2.6.2 nathanw }, 211 1.2.6.2 nathanw { 212 1.2.6.2 nathanw PCI_VENDOR_ADP2, 213 1.2.6.2 nathanw PCI_PRODUCT_ADP2_AAC2622, 214 1.2.6.2 nathanw PCI_VENDOR_ADP2, 215 1.2.6.2 nathanw PCI_PRODUCT_ADP2_AAC2622, 216 1.2.6.2 nathanw AAC_HWIF_I960RX, 217 1.2.6.2 nathanw 0, 218 1.2.6.2 nathanw "Adaptec ADP-2622" 219 1.2.6.2 nathanw }, 220 1.2.6.2 nathanw { 221 1.2.6.2 nathanw PCI_VENDOR_ADP2, 222 1.2.6.2 nathanw PCI_PRODUCT_ADP2_ASR2200S, 223 1.2.6.2 nathanw PCI_VENDOR_ADP2, 224 1.2.6.2 nathanw PCI_PRODUCT_ADP2_ASR2200S, 225 1.2.6.2 nathanw AAC_HWIF_I960RX, 226 1.2.6.2 nathanw 0, 227 1.2.6.2 nathanw "Adaptec ASR-2200S" 228 1.2.6.2 nathanw }, 229 1.2.6.2 nathanw { 230 1.2.6.2 nathanw PCI_VENDOR_ADP2, 231 1.2.6.2 nathanw PCI_PRODUCT_ADP2_ASR2200S, 232 1.2.6.2 nathanw PCI_VENDOR_ADP2, 233 1.2.6.2 nathanw PCI_PRODUCT_ADP2_ASR2120S, 234 1.2.6.2 nathanw AAC_HWIF_I960RX, 235 1.2.6.2 nathanw 0, 236 1.2.6.2 nathanw "Adaptec ASR-2120S" 237 1.2.6.2 nathanw }, 238 1.2.6.2 nathanw { 239 1.2.6.2 nathanw PCI_VENDOR_DEC, 240 1.2.6.2 nathanw PCI_PRODUCT_DEC_21554, 241 1.2.6.2 nathanw PCI_VENDOR_ADP2, 242 1.2.6.2 nathanw PCI_PRODUCT_ADP2_AAC364, 243 1.2.6.2 nathanw AAC_HWIF_STRONGARM, 244 1.2.6.2 nathanw 0, 245 1.2.6.2 nathanw "Adaptec AAC-364" 246 1.2.6.2 nathanw }, 247 1.2.6.2 nathanw { 248 1.2.6.2 nathanw PCI_VENDOR_DEC, 249 1.2.6.2 nathanw PCI_PRODUCT_DEC_21554, 250 1.2.6.2 nathanw PCI_VENDOR_ADP2, 251 1.2.6.2 nathanw PCI_PRODUCT_ADP2_ASR5400S, 252 1.2.6.2 nathanw AAC_HWIF_STRONGARM, 253 1.2.6.2 nathanw 0, 254 1.2.6.2 nathanw "Adaptec ASR-5400S" 255 1.2.6.2 nathanw }, 256 1.2.6.2 nathanw { 257 1.2.6.2 nathanw PCI_VENDOR_DEC, 258 1.2.6.2 nathanw PCI_PRODUCT_DEC_21554, 259 1.2.6.2 nathanw PCI_VENDOR_ADP2, 260 1.2.6.2 nathanw PCI_PRODUCT_ADP2_PERC_2QC, 261 1.2.6.2 nathanw AAC_HWIF_STRONGARM, 262 1.2.6.2 nathanw AAC_QUIRK_PERC2QC, 263 1.2.6.2 nathanw "Dell PERC 2/QC" 264 1.2.6.2 nathanw }, 265 1.2.6.2 nathanw { 266 1.2.6.2 nathanw PCI_VENDOR_DEC, 267 1.2.6.2 nathanw PCI_PRODUCT_DEC_21554, 268 1.2.6.2 nathanw PCI_VENDOR_ADP2, 269 1.2.6.2 nathanw PCI_PRODUCT_ADP2_PERC_3QC, 270 1.2.6.2 nathanw AAC_HWIF_STRONGARM, 271 1.2.6.2 nathanw 0, 272 1.2.6.2 nathanw "Dell PERC 3/QC" 273 1.2.6.2 nathanw }, 274 1.2.6.2 nathanw { 275 1.2.6.2 nathanw PCI_VENDOR_DEC, 276 1.2.6.2 nathanw PCI_PRODUCT_DEC_21554, 277 1.2.6.2 nathanw PCI_VENDOR_HP, 278 1.2.6.2 nathanw PCI_PRODUCT_HP_NETRAID_4M, 279 1.2.6.2 nathanw AAC_HWIF_STRONGARM, 280 1.2.6.2 nathanw 0, 281 1.2.6.2 nathanw "HP NetRAID-4M" 282 1.2.6.2 nathanw }, 283 1.2.6.2 nathanw }; 284 1.2.6.2 nathanw 285 1.2.6.2 nathanw struct cfattach aac_pci_ca = { 286 1.2.6.2 nathanw sizeof(struct aac_softc), aac_pci_match, aac_pci_attach 287 1.2.6.2 nathanw }; 288 1.2.6.2 nathanw 289 1.2.6.2 nathanw const struct aac_ident * 290 1.2.6.2 nathanw aac_find_ident(struct pci_attach_args *pa) 291 1.2.6.2 nathanw { 292 1.2.6.2 nathanw const struct aac_ident *m, *mm; 293 1.2.6.2 nathanw u_int32_t subsysid; 294 1.2.6.2 nathanw 295 1.2.6.2 nathanw m = aac_ident; 296 1.2.6.2 nathanw mm = aac_ident + (sizeof(aac_ident) / sizeof(aac_ident[0])); 297 1.2.6.2 nathanw 298 1.2.6.2 nathanw while (m < mm) { 299 1.2.6.2 nathanw if (m->vendor == PCI_VENDOR(pa->pa_id) && 300 1.2.6.2 nathanw m->device == PCI_PRODUCT(pa->pa_id)) { 301 1.2.6.2 nathanw subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, 302 1.2.6.2 nathanw PCI_SUBSYS_ID_REG); 303 1.2.6.2 nathanw if (m->subvendor == PCI_VENDOR(subsysid) && 304 1.2.6.2 nathanw m->subdevice == PCI_PRODUCT(subsysid)) 305 1.2.6.2 nathanw return (m); 306 1.2.6.2 nathanw } 307 1.2.6.2 nathanw m++; 308 1.2.6.2 nathanw } 309 1.2.6.2 nathanw 310 1.2.6.2 nathanw return (NULL); 311 1.2.6.2 nathanw } 312 1.2.6.2 nathanw 313 1.2.6.2 nathanw int 314 1.2.6.2 nathanw aac_pci_match(struct device *parent, struct cfdata *match, void *aux) 315 1.2.6.2 nathanw { 316 1.2.6.2 nathanw struct pci_attach_args *pa; 317 1.2.6.2 nathanw 318 1.2.6.2 nathanw pa = aux; 319 1.2.6.2 nathanw 320 1.2.6.2 nathanw if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O) 321 1.2.6.2 nathanw return (0); 322 1.2.6.2 nathanw 323 1.2.6.2 nathanw return (aac_find_ident(pa) != NULL); 324 1.2.6.2 nathanw } 325 1.2.6.2 nathanw 326 1.2.6.2 nathanw void 327 1.2.6.2 nathanw aac_pci_attach(struct device *parent, struct device *self, void *aux) 328 1.2.6.2 nathanw { 329 1.2.6.2 nathanw struct pci_attach_args *pa; 330 1.2.6.2 nathanw pci_chipset_tag_t pc; 331 1.2.6.2 nathanw struct aac_softc *sc; 332 1.2.6.2 nathanw u_int16_t command; 333 1.2.6.2 nathanw bus_addr_t membase; 334 1.2.6.2 nathanw bus_size_t memsize; 335 1.2.6.2 nathanw pci_intr_handle_t ih; 336 1.2.6.2 nathanw const char *intrstr; 337 1.2.6.2 nathanw int state; 338 1.2.6.2 nathanw const struct aac_ident *m; 339 1.2.6.2 nathanw 340 1.2.6.2 nathanw pa = aux; 341 1.2.6.2 nathanw pc = pa->pa_pc; 342 1.2.6.2 nathanw sc = (struct aac_softc *)self; 343 1.2.6.2 nathanw state = 0; 344 1.2.6.2 nathanw 345 1.2.6.2 nathanw printf(": "); 346 1.2.6.2 nathanw 347 1.2.6.2 nathanw /* 348 1.2.6.2 nathanw * Verify that the adapter is correctly set up in PCI space. 349 1.2.6.2 nathanw */ 350 1.2.6.2 nathanw command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 351 1.2.6.2 nathanw command |= PCI_COMMAND_MASTER_ENABLE; 352 1.2.6.2 nathanw pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 353 1.2.6.2 nathanw command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 354 1.2.6.2 nathanw AAC_DPRINTF(AAC_D_MISC, ("pci command status reg 0x08x ")); 355 1.2.6.2 nathanw 356 1.2.6.2 nathanw if ((command & PCI_COMMAND_MASTER_ENABLE) == 0) { 357 1.2.6.2 nathanw printf("can't enable bus-master feature\n"); 358 1.2.6.2 nathanw goto bail_out; 359 1.2.6.2 nathanw } 360 1.2.6.2 nathanw 361 1.2.6.2 nathanw if ((command & PCI_COMMAND_MEM_ENABLE) == 0) { 362 1.2.6.2 nathanw printf("memory window not available\n"); 363 1.2.6.2 nathanw goto bail_out; 364 1.2.6.2 nathanw } 365 1.2.6.2 nathanw 366 1.2.6.2 nathanw /* 367 1.2.6.2 nathanw * Map control/status registers. 368 1.2.6.2 nathanw */ 369 1.2.6.2 nathanw if (pci_mapreg_map(pa, PCI_MAPREG_START, 370 1.2.6.2 nathanw PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_memt, 371 1.2.6.2 nathanw &sc->sc_memh, &membase, &memsize)) { 372 1.2.6.2 nathanw printf("can't find mem space\n"); 373 1.2.6.2 nathanw goto bail_out; 374 1.2.6.2 nathanw } 375 1.2.6.2 nathanw state++; 376 1.2.6.2 nathanw 377 1.2.6.2 nathanw if (pci_intr_map(pa, &ih)) { 378 1.2.6.2 nathanw printf("couldn't map interrupt\n"); 379 1.2.6.2 nathanw goto bail_out; 380 1.2.6.2 nathanw } 381 1.2.6.2 nathanw intrstr = pci_intr_string(pc, ih); 382 1.2.6.2 nathanw sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, aac_intr, sc); 383 1.2.6.2 nathanw if (sc->sc_ih == NULL) { 384 1.2.6.2 nathanw printf("couldn't establish interrupt"); 385 1.2.6.2 nathanw if (intrstr != NULL) 386 1.2.6.2 nathanw printf(" at %s", intrstr); 387 1.2.6.2 nathanw printf("\n"); 388 1.2.6.2 nathanw goto bail_out; 389 1.2.6.2 nathanw } 390 1.2.6.2 nathanw state++; 391 1.2.6.2 nathanw 392 1.2.6.2 nathanw sc->sc_dmat = pa->pa_dmat; 393 1.2.6.2 nathanw 394 1.2.6.2 nathanw m = aac_find_ident(pa); 395 1.2.6.2 nathanw printf("%s\n", m->prodstr); 396 1.2.6.2 nathanw if (intrstr != NULL) 397 1.2.6.2 nathanw printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname, intrstr); 398 1.2.6.2 nathanw 399 1.2.6.2 nathanw sc->sc_hwif = m->hwif; 400 1.2.6.2 nathanw sc->sc_quirks = m->quirks; 401 1.2.6.2 nathanw switch (sc->sc_hwif) { 402 1.2.6.2 nathanw case AAC_HWIF_I960RX: 403 1.2.6.2 nathanw AAC_DPRINTF(AAC_D_MISC, 404 1.2.6.2 nathanw ("set hardware up for i960Rx")); 405 1.2.6.2 nathanw sc->sc_if = aac_rx_interface; 406 1.2.6.2 nathanw break; 407 1.2.6.2 nathanw 408 1.2.6.2 nathanw case AAC_HWIF_STRONGARM: 409 1.2.6.2 nathanw AAC_DPRINTF(AAC_D_MISC, 410 1.2.6.2 nathanw ("set hardware up for StrongARM")); 411 1.2.6.2 nathanw sc->sc_if = aac_sa_interface; 412 1.2.6.2 nathanw break; 413 1.2.6.2 nathanw } 414 1.2.6.2 nathanw 415 1.2.6.2 nathanw if (!aac_attach(sc)) 416 1.2.6.2 nathanw return; 417 1.2.6.2 nathanw 418 1.2.6.2 nathanw bail_out: 419 1.2.6.2 nathanw if (state > 1) 420 1.2.6.2 nathanw pci_intr_disestablish(pc, sc->sc_ih); 421 1.2.6.2 nathanw if (state > 0) 422 1.2.6.2 nathanw bus_space_unmap(sc->sc_memt, sc->sc_memh, memsize); 423 1.2.6.2 nathanw } 424 1.2.6.2 nathanw 425 1.2.6.2 nathanw /* 426 1.2.6.2 nathanw * Read the current firmware status word. 427 1.2.6.2 nathanw */ 428 1.2.6.2 nathanw int 429 1.2.6.2 nathanw aac_sa_get_fwstatus(struct aac_softc *sc) 430 1.2.6.2 nathanw { 431 1.2.6.2 nathanw 432 1.2.6.2 nathanw return (AAC_GETREG4(sc, AAC_SA_FWSTATUS)); 433 1.2.6.2 nathanw } 434 1.2.6.2 nathanw 435 1.2.6.2 nathanw int 436 1.2.6.2 nathanw aac_rx_get_fwstatus(struct aac_softc *sc) 437 1.2.6.2 nathanw { 438 1.2.6.2 nathanw 439 1.2.6.2 nathanw return (AAC_GETREG4(sc, AAC_RX_FWSTATUS)); 440 1.2.6.2 nathanw } 441 1.2.6.2 nathanw 442 1.2.6.2 nathanw /* 443 1.2.6.2 nathanw * Notify the controller of a change in a given queue 444 1.2.6.2 nathanw */ 445 1.2.6.2 nathanw 446 1.2.6.2 nathanw void 447 1.2.6.2 nathanw aac_sa_qnotify(struct aac_softc *sc, int qbit) 448 1.2.6.2 nathanw { 449 1.2.6.2 nathanw 450 1.2.6.2 nathanw AAC_SETREG2(sc, AAC_SA_DOORBELL1_SET, qbit); 451 1.2.6.2 nathanw } 452 1.2.6.2 nathanw 453 1.2.6.2 nathanw void 454 1.2.6.2 nathanw aac_rx_qnotify(struct aac_softc *sc, int qbit) 455 1.2.6.2 nathanw { 456 1.2.6.2 nathanw 457 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_IDBR, qbit); 458 1.2.6.2 nathanw } 459 1.2.6.2 nathanw 460 1.2.6.2 nathanw /* 461 1.2.6.2 nathanw * Get the interrupt reason bits 462 1.2.6.2 nathanw */ 463 1.2.6.2 nathanw int 464 1.2.6.2 nathanw aac_sa_get_istatus(struct aac_softc *sc) 465 1.2.6.2 nathanw { 466 1.2.6.2 nathanw 467 1.2.6.2 nathanw return (AAC_GETREG2(sc, AAC_SA_DOORBELL0)); 468 1.2.6.2 nathanw } 469 1.2.6.2 nathanw 470 1.2.6.2 nathanw int 471 1.2.6.2 nathanw aac_rx_get_istatus(struct aac_softc *sc) 472 1.2.6.2 nathanw { 473 1.2.6.2 nathanw 474 1.2.6.2 nathanw return (AAC_GETREG4(sc, AAC_RX_ODBR)); 475 1.2.6.2 nathanw } 476 1.2.6.2 nathanw 477 1.2.6.2 nathanw /* 478 1.2.6.2 nathanw * Clear some interrupt reason bits 479 1.2.6.2 nathanw */ 480 1.2.6.2 nathanw void 481 1.2.6.2 nathanw aac_sa_clear_istatus(struct aac_softc *sc, int mask) 482 1.2.6.2 nathanw { 483 1.2.6.2 nathanw 484 1.2.6.2 nathanw AAC_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask); 485 1.2.6.2 nathanw } 486 1.2.6.2 nathanw 487 1.2.6.2 nathanw void 488 1.2.6.2 nathanw aac_rx_clear_istatus(struct aac_softc *sc, int mask) 489 1.2.6.2 nathanw { 490 1.2.6.2 nathanw 491 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_ODBR, mask); 492 1.2.6.2 nathanw } 493 1.2.6.2 nathanw 494 1.2.6.2 nathanw /* 495 1.2.6.2 nathanw * Populate the mailbox and set the command word 496 1.2.6.2 nathanw */ 497 1.2.6.2 nathanw void 498 1.2.6.2 nathanw aac_sa_set_mailbox(struct aac_softc *sc, u_int32_t command, 499 1.2.6.2 nathanw u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, 500 1.2.6.2 nathanw u_int32_t arg3) 501 1.2.6.2 nathanw { 502 1.2.6.2 nathanw 503 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_SA_MAILBOX, command); 504 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_SA_MAILBOX + 4, arg0); 505 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_SA_MAILBOX + 8, arg1); 506 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_SA_MAILBOX + 12, arg2); 507 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_SA_MAILBOX + 16, arg3); 508 1.2.6.2 nathanw } 509 1.2.6.2 nathanw 510 1.2.6.2 nathanw void 511 1.2.6.2 nathanw aac_rx_set_mailbox(struct aac_softc *sc, u_int32_t command, 512 1.2.6.2 nathanw u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, 513 1.2.6.2 nathanw u_int32_t arg3) 514 1.2.6.2 nathanw { 515 1.2.6.2 nathanw 516 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_MAILBOX, command); 517 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_MAILBOX + 4, arg0); 518 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_MAILBOX + 8, arg1); 519 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_MAILBOX + 12, arg2); 520 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_MAILBOX + 16, arg3); 521 1.2.6.2 nathanw } 522 1.2.6.2 nathanw 523 1.2.6.2 nathanw /* 524 1.2.6.2 nathanw * Fetch the immediate command status word 525 1.2.6.2 nathanw */ 526 1.2.6.2 nathanw int 527 1.2.6.2 nathanw aac_sa_get_mailboxstatus(struct aac_softc *sc) 528 1.2.6.2 nathanw { 529 1.2.6.2 nathanw 530 1.2.6.2 nathanw return (AAC_GETREG4(sc, AAC_SA_MAILBOX)); 531 1.2.6.2 nathanw } 532 1.2.6.2 nathanw 533 1.2.6.2 nathanw int 534 1.2.6.2 nathanw aac_rx_get_mailboxstatus(struct aac_softc *sc) 535 1.2.6.2 nathanw { 536 1.2.6.2 nathanw 537 1.2.6.2 nathanw return (AAC_GETREG4(sc, AAC_RX_MAILBOX)); 538 1.2.6.2 nathanw } 539 1.2.6.2 nathanw 540 1.2.6.2 nathanw /* 541 1.2.6.2 nathanw * Set/clear interrupt masks 542 1.2.6.2 nathanw */ 543 1.2.6.2 nathanw void 544 1.2.6.2 nathanw aac_sa_set_interrupts(struct aac_softc *sc, int enable) 545 1.2.6.2 nathanw { 546 1.2.6.2 nathanw 547 1.2.6.2 nathanw if (enable) 548 1.2.6.2 nathanw AAC_SETREG2((sc), AAC_SA_MASK0_CLEAR, AAC_DB_INTERRUPTS); 549 1.2.6.2 nathanw else 550 1.2.6.2 nathanw AAC_SETREG2((sc), AAC_SA_MASK0_SET, ~0); 551 1.2.6.2 nathanw } 552 1.2.6.2 nathanw 553 1.2.6.2 nathanw void 554 1.2.6.2 nathanw aac_rx_set_interrupts(struct aac_softc *sc, int enable) 555 1.2.6.2 nathanw { 556 1.2.6.2 nathanw 557 1.2.6.2 nathanw if (enable) 558 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INTERRUPTS); 559 1.2.6.2 nathanw else 560 1.2.6.2 nathanw AAC_SETREG4(sc, AAC_RX_OIMR, ~0); 561 1.2.6.2 nathanw } 562
Indexes created Thu Oct 02 01:09:59 GMT 2025