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aac_pci.c revision 1.22
      1  1.22        ad /*	$NetBSD: aac_pci.c,v 1.22 2007/10/19 12:00:38 ad Exp $	*/
      2   1.1        ad 
      3   1.1        ad /*-
      4   1.1        ad  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5   1.1        ad  * All rights reserved.
      6   1.1        ad  *
      7   1.1        ad  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1        ad  * by Andrew Doran.
      9   1.1        ad  *
     10   1.1        ad  * Redistribution and use in source and binary forms, with or without
     11   1.1        ad  * modification, are permitted provided that the following conditions
     12   1.1        ad  * are met:
     13   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     14   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     15   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     17   1.1        ad  *    documentation and/or other materials provided with the distribution.
     18   1.1        ad  * 3. All advertising materials mentioning features or use of this software
     19   1.1        ad  *    must display the following acknowledgement:
     20   1.1        ad  *        This product includes software developed by the NetBSD
     21   1.1        ad  *        Foundation, Inc. and its contributors.
     22   1.1        ad  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23   1.1        ad  *    contributors may be used to endorse or promote products derived
     24   1.1        ad  *    from this software without specific prior written permission.
     25   1.1        ad  *
     26   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27   1.1        ad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28   1.1        ad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29   1.1        ad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30   1.1        ad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31   1.1        ad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32   1.1        ad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33   1.1        ad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34   1.1        ad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35   1.1        ad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36   1.1        ad  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1        ad  */
     38   1.1        ad 
     39   1.1        ad /*-
     40   1.1        ad  * Copyright (c) 2000 Michael Smith
     41   1.1        ad  * Copyright (c) 2000 BSDi
     42   1.1        ad  * Copyright (c) 2000 Niklas Hallqvist
     43   1.1        ad  * All rights reserved.
     44   1.1        ad  *
     45   1.1        ad  * Redistribution and use in source and binary forms, with or without
     46   1.1        ad  * modification, are permitted provided that the following conditions
     47   1.1        ad  * are met:
     48   1.1        ad  * 1. Redistributions of source code must retain the above copyright
     49   1.1        ad  *    notice, this list of conditions and the following disclaimer.
     50   1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     51   1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     52   1.1        ad  *    documentation and/or other materials provided with the distribution.
     53   1.1        ad  *
     54   1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     55   1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56   1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57   1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     58   1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59   1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60   1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61   1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62   1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63   1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64   1.1        ad  * SUCH DAMAGE.
     65   1.1        ad  *
     66   1.1        ad  * from FreeBSD: aac_pci.c,v 1.1 2000/09/13 03:20:34 msmith Exp
     67   1.1        ad  * via OpenBSD: aac_pci.c,v 1.7 2002/03/14 01:26:58 millert Exp
     68   1.1        ad  */
     69   1.1        ad 
     70   1.1        ad /*
     71   1.1        ad  * PCI front-end for the `aac' driver.
     72   1.1        ad  */
     73   1.1        ad 
     74   1.1        ad #include <sys/cdefs.h>
     75  1.22        ad __KERNEL_RCSID(0, "$NetBSD: aac_pci.c,v 1.22 2007/10/19 12:00:38 ad Exp $");
     76   1.1        ad 
     77   1.1        ad #include <sys/param.h>
     78   1.1        ad #include <sys/systm.h>
     79   1.1        ad #include <sys/device.h>
     80   1.1        ad #include <sys/kernel.h>
     81   1.1        ad #include <sys/malloc.h>
     82   1.1        ad #include <sys/queue.h>
     83   1.1        ad 
     84  1.22        ad #include <sys/bus.h>
     85   1.1        ad #include <machine/endian.h>
     86  1.22        ad #include <sys/intr.h>
     87   1.1        ad 
     88   1.1        ad #include <dev/pci/pcidevs.h>
     89   1.1        ad #include <dev/pci/pcireg.h>
     90   1.1        ad #include <dev/pci/pcivar.h>
     91   1.1        ad 
     92   1.1        ad #include <dev/ic/aacreg.h>
     93   1.1        ad #include <dev/ic/aacvar.h>
     94   1.1        ad 
     95  1.21    briggs struct aac_pci_softc {
     96  1.21    briggs 	struct aac_softc	sc_aac;
     97  1.21    briggs 	pci_chipset_tag_t	sc_pc;
     98  1.21    briggs 	pci_intr_handle_t	sc_ih;
     99  1.21    briggs };
    100  1.21    briggs 
    101  1.11     perry /* i960Rx interface */
    102  1.15   thorpej static int	aac_rx_get_fwstatus(struct aac_softc *);
    103  1.15   thorpej static void	aac_rx_qnotify(struct aac_softc *, int);
    104  1.15   thorpej static int	aac_rx_get_istatus(struct aac_softc *);
    105  1.15   thorpej static void	aac_rx_clear_istatus(struct aac_softc *, int);
    106  1.15   thorpej static void	aac_rx_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t,
    107   1.1        ad 			   u_int32_t, u_int32_t, u_int32_t);
    108  1.15   thorpej static uint32_t aac_rx_get_mailbox(struct aac_softc *, int);
    109  1.15   thorpej static void	aac_rx_set_interrupts(struct aac_softc *, int);
    110  1.21    briggs static int	aac_rx_send_command(struct aac_softc *, struct aac_ccb *);
    111  1.21    briggs static int	aac_rx_get_outb_queue(struct aac_softc *);
    112  1.21    briggs static void	aac_rx_set_outb_queue(struct aac_softc *, int);
    113   1.1        ad 
    114   1.1        ad /* StrongARM interface */
    115  1.15   thorpej static int	aac_sa_get_fwstatus(struct aac_softc *);
    116  1.15   thorpej static void	aac_sa_qnotify(struct aac_softc *, int);
    117  1.15   thorpej static int	aac_sa_get_istatus(struct aac_softc *);
    118  1.15   thorpej static void	aac_sa_clear_istatus(struct aac_softc *, int);
    119  1.15   thorpej static void	aac_sa_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t,
    120   1.1        ad 			   u_int32_t, u_int32_t, u_int32_t);
    121  1.15   thorpej static uint32_t aac_sa_get_mailbox(struct aac_softc *, int);
    122  1.15   thorpej static void	aac_sa_set_interrupts(struct aac_softc *, int);
    123   1.1        ad 
    124  1.21    briggs /* Rocket/MIPS interface */
    125  1.21    briggs static int	aac_rkt_get_fwstatus(struct aac_softc *);
    126  1.21    briggs static void	aac_rkt_qnotify(struct aac_softc *, int);
    127  1.21    briggs static int	aac_rkt_get_istatus(struct aac_softc *);
    128  1.21    briggs static void	aac_rkt_clear_istatus(struct aac_softc *, int);
    129  1.21    briggs static void	aac_rkt_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t,
    130  1.21    briggs 			   u_int32_t, u_int32_t, u_int32_t);
    131  1.21    briggs static uint32_t aac_rkt_get_mailbox(struct aac_softc *, int);
    132  1.21    briggs static void	aac_rkt_set_interrupts(struct aac_softc *, int);
    133  1.21    briggs static int	aac_rkt_send_command(struct aac_softc *, struct aac_ccb *);
    134  1.21    briggs static int	aac_rkt_get_outb_queue(struct aac_softc *);
    135  1.21    briggs static void	aac_rkt_set_outb_queue(struct aac_softc *, int);
    136  1.21    briggs 
    137  1.15   thorpej static const struct aac_interface aac_rx_interface = {
    138   1.1        ad 	aac_rx_get_fwstatus,
    139   1.1        ad 	aac_rx_qnotify,
    140   1.1        ad 	aac_rx_get_istatus,
    141   1.1        ad 	aac_rx_clear_istatus,
    142   1.1        ad 	aac_rx_set_mailbox,
    143  1.12    briggs 	aac_rx_get_mailbox,
    144  1.21    briggs 	aac_rx_set_interrupts,
    145  1.21    briggs 	aac_rx_send_command,
    146  1.21    briggs 	aac_rx_get_outb_queue,
    147  1.21    briggs 	aac_rx_set_outb_queue
    148   1.1        ad };
    149   1.1        ad 
    150  1.15   thorpej static const struct aac_interface aac_sa_interface = {
    151   1.1        ad 	aac_sa_get_fwstatus,
    152   1.1        ad 	aac_sa_qnotify,
    153   1.1        ad 	aac_sa_get_istatus,
    154   1.1        ad 	aac_sa_clear_istatus,
    155   1.1        ad 	aac_sa_set_mailbox,
    156  1.12    briggs 	aac_sa_get_mailbox,
    157  1.21    briggs 	aac_sa_set_interrupts,
    158  1.21    briggs 	NULL, NULL, NULL
    159  1.21    briggs };
    160  1.21    briggs 
    161  1.21    briggs static const struct aac_interface aac_rkt_interface = {
    162  1.21    briggs 	aac_rkt_get_fwstatus,
    163  1.21    briggs 	aac_rkt_qnotify,
    164  1.21    briggs 	aac_rkt_get_istatus,
    165  1.21    briggs 	aac_rkt_clear_istatus,
    166  1.21    briggs 	aac_rkt_set_mailbox,
    167  1.21    briggs 	aac_rkt_get_mailbox,
    168  1.21    briggs 	aac_rkt_set_interrupts,
    169  1.21    briggs 	aac_rkt_send_command,
    170  1.21    briggs 	aac_rkt_get_outb_queue,
    171  1.21    briggs 	aac_rkt_set_outb_queue
    172   1.1        ad };
    173   1.1        ad 
    174  1.17  christos static struct aac_ident {
    175   1.1        ad 	u_short	vendor;
    176   1.1        ad 	u_short	device;
    177   1.1        ad 	u_short	subvendor;
    178   1.1        ad 	u_short	subdevice;
    179   1.1        ad 	u_short	hwif;
    180   1.1        ad 	u_short	quirks;
    181   1.1        ad 	const char	*prodstr;
    182  1.17  christos } const aac_ident[] = {
    183   1.1        ad 	{
    184   1.1        ad 		PCI_VENDOR_DELL,
    185   1.1        ad 		PCI_PRODUCT_DELL_PERC_2SI,
    186   1.1        ad 		PCI_VENDOR_DELL,
    187   1.1        ad 		PCI_PRODUCT_DELL_PERC_2SI,
    188   1.1        ad 		AAC_HWIF_I960RX,
    189   1.1        ad 		0,
    190   1.1        ad 		"Dell PERC 2/Si"
    191   1.1        ad 	},
    192   1.1        ad 	{
    193   1.1        ad 		PCI_VENDOR_DELL,
    194   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    195   1.1        ad 		PCI_VENDOR_DELL,
    196   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    197   1.1        ad 		AAC_HWIF_I960RX,
    198   1.1        ad 		0,
    199   1.1        ad 		"Dell PERC 3/Di"
    200   1.1        ad 	},
    201   1.1        ad 	{
    202   1.1        ad 		PCI_VENDOR_DELL,
    203   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    204   1.1        ad 		PCI_VENDOR_DELL,
    205   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_SUB2,
    206   1.1        ad 		AAC_HWIF_I960RX,
    207   1.1        ad 		0,
    208   1.1        ad 		"Dell PERC 3/Di"
    209   1.1        ad 	},
    210   1.1        ad 	{
    211   1.1        ad 		PCI_VENDOR_DELL,
    212   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI,
    213   1.1        ad 		PCI_VENDOR_DELL,
    214   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_SUB3,
    215   1.1        ad 		AAC_HWIF_I960RX,
    216   1.1        ad 		0,
    217   1.1        ad 		"Dell PERC 3/Di"
    218   1.1        ad 	},
    219   1.1        ad 	{
    220   1.1        ad 		PCI_VENDOR_DELL,
    221   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_2,
    222   1.1        ad 		PCI_VENDOR_DELL,
    223   1.1        ad 		PCI_PRODUCT_DELL_PERC_3DI_2_SUB,
    224   1.3        ad 		AAC_HWIF_I960RX,
    225   1.3        ad 		0,
    226   1.3        ad 		"Dell PERC 3/Di"
    227   1.3        ad 	},
    228   1.3        ad         {
    229   1.3        ad 		PCI_VENDOR_DELL,
    230   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    231   1.3        ad 		PCI_VENDOR_DELL,
    232   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB,
    233   1.3        ad 		AAC_HWIF_I960RX,
    234   1.3        ad 		0,
    235   1.3        ad 		"Dell PERC 3/Di"
    236   1.3        ad 	},
    237   1.3        ad 	{
    238   1.3        ad 		PCI_VENDOR_DELL,
    239   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    240   1.3        ad 		PCI_VENDOR_DELL,
    241   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB2,
    242   1.3        ad 		AAC_HWIF_I960RX,
    243   1.3        ad 		0,
    244   1.3        ad 		"Dell PERC 3/Di"
    245   1.3        ad 	},
    246   1.3        ad 	{
    247   1.3        ad 		PCI_VENDOR_DELL,
    248   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3,
    249   1.3        ad 		PCI_VENDOR_DELL,
    250   1.3        ad 		PCI_PRODUCT_DELL_PERC_3DI_3_SUB3,
    251   1.1        ad 		AAC_HWIF_I960RX,
    252   1.1        ad 		0,
    253   1.1        ad 		"Dell PERC 3/Di"
    254   1.1        ad 	},
    255   1.1        ad 	{
    256   1.1        ad 		PCI_VENDOR_DELL,
    257   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI,
    258   1.1        ad 		PCI_VENDOR_DELL,
    259   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI,
    260   1.1        ad 		AAC_HWIF_I960RX,
    261   1.1        ad 		0,
    262   1.1        ad 		"Dell PERC 3/Si"
    263   1.1        ad 	},
    264   1.1        ad 	{
    265   1.1        ad 		PCI_VENDOR_DELL,
    266   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI_2,
    267   1.1        ad 		PCI_VENDOR_DELL,
    268   1.1        ad 		PCI_PRODUCT_DELL_PERC_3SI_2_SUB,
    269   1.1        ad 		AAC_HWIF_I960RX,
    270   1.1        ad 		0,
    271   1.1        ad 		"Dell PERC 3/Si"
    272   1.1        ad 	},
    273   1.1        ad 	{
    274   1.1        ad 		PCI_VENDOR_ADP2,
    275  1.14    martti 		PCI_PRODUCT_ADP2_ASR2200S,
    276  1.14    martti 		PCI_VENDOR_DELL,
    277  1.14    martti 		PCI_PRODUCT_DELL_CERC_1_5,
    278  1.14    martti 		AAC_HWIF_I960RX,
    279  1.14    martti 		AAC_QUIRK_NO4GB,
    280  1.14    martti 		"Dell CERC SATA RAID 1.5/6ch"
    281  1.14    martti 	},
    282  1.14    martti 	{
    283  1.14    martti 		PCI_VENDOR_ADP2,
    284   1.1        ad 		PCI_PRODUCT_ADP2_AAC2622,
    285   1.1        ad 		PCI_VENDOR_ADP2,
    286   1.1        ad 		PCI_PRODUCT_ADP2_AAC2622,
    287   1.1        ad 		AAC_HWIF_I960RX,
    288   1.1        ad 		0,
    289   1.1        ad 		"Adaptec ADP-2622"
    290   1.1        ad 	},
    291   1.1        ad 	{
    292   1.1        ad 		PCI_VENDOR_ADP2,
    293   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    294   1.1        ad 		PCI_VENDOR_ADP2,
    295   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S_SUB2M,
    296   1.8  gendalia 		AAC_HWIF_I960RX,
    297  1.21    briggs 		AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS,
    298   1.8  gendalia 		"Adaptec ASR-2200S"
    299   1.8  gendalia 	},
    300   1.8  gendalia 	{
    301   1.8  gendalia 		PCI_VENDOR_ADP2,
    302   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    303   1.8  gendalia 		PCI_VENDOR_DELL,
    304   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S_SUB2M,
    305   1.8  gendalia 		AAC_HWIF_I960RX,
    306  1.21    briggs 		AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS,
    307   1.8  gendalia 		"Dell PERC 320/DC"
    308   1.8  gendalia 	},
    309   1.8  gendalia 	{
    310   1.8  gendalia 		PCI_VENDOR_ADP2,
    311   1.8  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    312   1.8  gendalia 		PCI_VENDOR_ADP2,
    313   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    314   1.1        ad 		AAC_HWIF_I960RX,
    315  1.21    briggs 		AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS,
    316   1.1        ad 		"Adaptec ASR-2200S"
    317   1.1        ad 	},
    318   1.1        ad 	{
    319   1.1        ad 		PCI_VENDOR_ADP2,
    320   1.1        ad 		PCI_PRODUCT_ADP2_ASR2200S,
    321   1.1        ad 		PCI_VENDOR_ADP2,
    322  1.10  gendalia 		PCI_PRODUCT_ADP2_AAR2810SA,
    323  1.10  gendalia 		AAC_HWIF_I960RX,
    324  1.21    briggs 		AAC_QUIRK_NO4GB,
    325  1.10  gendalia 		"Adaptec AAR-2810SA"
    326  1.10  gendalia 	},
    327  1.10  gendalia 	{
    328  1.10  gendalia 		PCI_VENDOR_ADP2,
    329  1.10  gendalia 		PCI_PRODUCT_ADP2_ASR2200S,
    330  1.10  gendalia 		PCI_VENDOR_ADP2,
    331   1.1        ad 		PCI_PRODUCT_ADP2_ASR2120S,
    332   1.1        ad 		AAC_HWIF_I960RX,
    333  1.21    briggs 		AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS,
    334   1.1        ad 		"Adaptec ASR-2120S"
    335   1.1        ad 	},
    336   1.1        ad 	{
    337   1.9  jdolecek 		PCI_VENDOR_ADP2,
    338   1.9  jdolecek 		PCI_PRODUCT_ADP2_ASR2200S,
    339   1.9  jdolecek 		PCI_VENDOR_ADP2,
    340  1.13      tron 		PCI_PRODUCT_ADP2_ASR2410SA,
    341   1.9  jdolecek 		AAC_HWIF_I960RX,
    342  1.21    briggs 		AAC_QUIRK_NO4GB,
    343   1.9  jdolecek 		"Adaptec ASR-2410SA"
    344   1.9  jdolecek 	},
    345   1.9  jdolecek 	{
    346  1.20  christos 		PCI_VENDOR_ADP2,
    347  1.20  christos 		PCI_PRODUCT_ADP2_ASR2200S,
    348  1.20  christos 		PCI_VENDOR_HP,
    349  1.20  christos 		PCI_PRODUCT_ADP2_HP_M110_G2,
    350  1.20  christos 		AAC_HWIF_I960RX,
    351  1.21    briggs 		AAC_QUIRK_NO4GB,
    352  1.20  christos 		"HP ML110 G2 (Adaptec ASR-2610SA)"
    353  1.20  christos 	},
    354  1.20  christos 	{
    355   1.1        ad 		PCI_VENDOR_DEC,
    356   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    357   1.1        ad 		PCI_VENDOR_ADP2,
    358   1.1        ad 		PCI_PRODUCT_ADP2_AAC364,
    359   1.1        ad 		AAC_HWIF_STRONGARM,
    360   1.1        ad 		0,
    361   1.1        ad 		"Adaptec AAC-364"
    362   1.1        ad 	},
    363   1.1        ad 	{
    364   1.1        ad 		PCI_VENDOR_DEC,
    365   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    366   1.1        ad 		PCI_VENDOR_ADP2,
    367   1.1        ad 		PCI_PRODUCT_ADP2_ASR5400S,
    368   1.1        ad 		AAC_HWIF_STRONGARM,
    369  1.21    briggs 		AAC_QUIRK_BROKEN_MMAP,
    370   1.1        ad 		"Adaptec ASR-5400S"
    371   1.1        ad 	},
    372   1.1        ad 	{
    373   1.1        ad 		PCI_VENDOR_DEC,
    374   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    375   1.1        ad 		PCI_VENDOR_ADP2,
    376   1.1        ad 		PCI_PRODUCT_ADP2_PERC_2QC,
    377   1.1        ad 		AAC_HWIF_STRONGARM,
    378   1.1        ad 		AAC_QUIRK_PERC2QC,
    379   1.1        ad 		"Dell PERC 2/QC"
    380   1.1        ad 	},
    381   1.1        ad 	{
    382   1.1        ad 		PCI_VENDOR_DEC,
    383   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    384   1.1        ad 		PCI_VENDOR_ADP2,
    385   1.1        ad 		PCI_PRODUCT_ADP2_PERC_3QC,
    386   1.1        ad 		AAC_HWIF_STRONGARM,
    387   1.1        ad 		0,
    388   1.1        ad 		"Dell PERC 3/QC"
    389   1.1        ad 	},
    390   1.1        ad 	{
    391   1.1        ad 		PCI_VENDOR_DEC,
    392   1.2  augustss 		PCI_PRODUCT_DEC_21554,
    393   1.1        ad 		PCI_VENDOR_HP,
    394   1.1        ad 		PCI_PRODUCT_HP_NETRAID_4M,
    395   1.1        ad 		AAC_HWIF_STRONGARM,
    396   1.1        ad 		0,
    397   1.1        ad 		"HP NetRAID-4M"
    398   1.1        ad 	},
    399   1.1        ad };
    400   1.1        ad 
    401  1.15   thorpej static const struct aac_ident *
    402   1.1        ad aac_find_ident(struct pci_attach_args *pa)
    403   1.1        ad {
    404   1.1        ad 	const struct aac_ident *m, *mm;
    405   1.1        ad 	u_int32_t subsysid;
    406   1.1        ad 
    407   1.1        ad 	m = aac_ident;
    408   1.1        ad 	mm = aac_ident + (sizeof(aac_ident) / sizeof(aac_ident[0]));
    409   1.1        ad 
    410   1.1        ad 	while (m < mm) {
    411   1.1        ad 		if (m->vendor == PCI_VENDOR(pa->pa_id) &&
    412   1.1        ad 		    m->device == PCI_PRODUCT(pa->pa_id)) {
    413   1.1        ad 			subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag,
    414   1.1        ad 			    PCI_SUBSYS_ID_REG);
    415   1.1        ad 			if (m->subvendor == PCI_VENDOR(subsysid) &&
    416   1.1        ad 			    m->subdevice == PCI_PRODUCT(subsysid))
    417   1.1        ad 				return (m);
    418   1.1        ad 		}
    419   1.1        ad 		m++;
    420   1.1        ad 	}
    421   1.1        ad 
    422   1.1        ad 	return (NULL);
    423   1.1        ad }
    424   1.1        ad 
    425  1.15   thorpej static int
    426  1.21    briggs aac_pci_intr_set(struct aac_softc *sc, int (*hand)(void*), void *arg)
    427  1.21    briggs {
    428  1.21    briggs 	struct aac_pci_softc	*pcisc;
    429  1.21    briggs 
    430  1.21    briggs 	pcisc = (struct aac_pci_softc *) sc;
    431  1.21    briggs 
    432  1.21    briggs 	pci_intr_disestablish(pcisc->sc_pc, sc->sc_ih);
    433  1.21    briggs 	sc->sc_ih = pci_intr_establish(pcisc->sc_pc, pcisc->sc_ih,
    434  1.21    briggs 				       IPL_BIO, hand, arg);
    435  1.21    briggs 	if (sc->sc_ih == NULL) {
    436  1.21    briggs 		return ENXIO;
    437  1.21    briggs 	}
    438  1.21    briggs 	return 0;
    439  1.21    briggs }
    440  1.21    briggs 
    441  1.21    briggs static int
    442  1.19  christos aac_pci_match(struct device *parent, struct cfdata *match,
    443  1.18  christos     void *aux)
    444   1.1        ad {
    445   1.1        ad 	struct pci_attach_args *pa;
    446   1.1        ad 
    447   1.1        ad 	pa = aux;
    448   1.1        ad 
    449   1.1        ad 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
    450   1.1        ad 		return (0);
    451   1.1        ad 
    452   1.1        ad 	return (aac_find_ident(pa) != NULL);
    453   1.1        ad }
    454   1.1        ad 
    455  1.15   thorpej static void
    456  1.19  christos aac_pci_attach(struct device *parent, struct device *self, void *aux)
    457   1.1        ad {
    458   1.1        ad 	struct pci_attach_args *pa;
    459   1.1        ad 	pci_chipset_tag_t pc;
    460  1.21    briggs 	struct aac_pci_softc *pcisc;
    461   1.1        ad 	struct aac_softc *sc;
    462   1.1        ad 	u_int16_t command;
    463   1.1        ad 	bus_addr_t membase;
    464   1.1        ad 	bus_size_t memsize;
    465   1.1        ad 	const char *intrstr;
    466   1.1        ad 	int state;
    467   1.1        ad 	const struct aac_ident *m;
    468   1.1        ad 
    469   1.1        ad 	pa = aux;
    470   1.1        ad 	pc = pa->pa_pc;
    471  1.21    briggs 	pcisc = (struct aac_pci_softc *)self;
    472  1.21    briggs 	pcisc->sc_pc = pc;
    473  1.21    briggs 	sc = &pcisc->sc_aac;
    474   1.1        ad 	state = 0;
    475   1.1        ad 
    476   1.7   thorpej 	aprint_naive(": RAID controller\n");
    477   1.7   thorpej 	aprint_normal(": ");
    478   1.1        ad 
    479   1.1        ad 	/*
    480   1.1        ad 	 * Verify that the adapter is correctly set up in PCI space.
    481   1.1        ad 	 */
    482   1.1        ad 	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    483   1.1        ad 	command |= PCI_COMMAND_MASTER_ENABLE;
    484   1.1        ad 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
    485   1.1        ad 	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    486   1.1        ad 	AAC_DPRINTF(AAC_D_MISC, ("pci command status reg 0x08x "));
    487   1.1        ad 
    488   1.1        ad 	if ((command & PCI_COMMAND_MASTER_ENABLE) == 0) {
    489   1.7   thorpej 		aprint_error("can't enable bus-master feature\n");
    490   1.1        ad 		goto bail_out;
    491   1.1        ad 	}
    492   1.1        ad 
    493   1.1        ad 	if ((command & PCI_COMMAND_MEM_ENABLE) == 0) {
    494   1.7   thorpej 		aprint_error("memory window not available\n");
    495   1.1        ad 		goto bail_out;
    496   1.1        ad 	}
    497   1.1        ad 
    498   1.1        ad 	/*
    499   1.1        ad 	 * Map control/status registers.
    500   1.1        ad 	 */
    501   1.1        ad 	if (pci_mapreg_map(pa, PCI_MAPREG_START,
    502   1.1        ad 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_memt,
    503   1.1        ad 	    &sc->sc_memh, &membase, &memsize)) {
    504   1.7   thorpej 		aprint_error("can't find mem space\n");
    505   1.1        ad 		goto bail_out;
    506   1.1        ad 	}
    507   1.1        ad 	state++;
    508   1.1        ad 
    509  1.21    briggs 	if (pci_intr_map(pa, &pcisc->sc_ih)) {
    510   1.7   thorpej 		aprint_error("couldn't map interrupt\n");
    511   1.1        ad 		goto bail_out;
    512   1.1        ad 	}
    513  1.21    briggs 	intrstr = pci_intr_string(pc, pcisc->sc_ih);
    514  1.21    briggs 	sc->sc_ih = pci_intr_establish(pc, pcisc->sc_ih, IPL_BIO, aac_intr, sc);
    515   1.1        ad 	if (sc->sc_ih == NULL) {
    516   1.7   thorpej 		aprint_error("couldn't establish interrupt");
    517   1.1        ad 		if (intrstr != NULL)
    518   1.7   thorpej 			aprint_normal(" at %s", intrstr);
    519   1.7   thorpej 		aprint_normal("\n");
    520   1.1        ad 		goto bail_out;
    521   1.1        ad 	}
    522   1.1        ad 	state++;
    523   1.1        ad 
    524   1.1        ad 	sc->sc_dmat = pa->pa_dmat;
    525   1.1        ad 
    526   1.1        ad 	m = aac_find_ident(pa);
    527   1.7   thorpej 	aprint_normal("%s\n", m->prodstr);
    528   1.1        ad 	if (intrstr != NULL)
    529   1.7   thorpej 		aprint_normal("%s: interrupting at %s\n",
    530   1.7   thorpej 		    sc->sc_dv.dv_xname, intrstr);
    531   1.1        ad 
    532   1.1        ad 	sc->sc_hwif = m->hwif;
    533   1.1        ad 	sc->sc_quirks = m->quirks;
    534   1.1        ad 	switch (sc->sc_hwif) {
    535   1.1        ad 		case AAC_HWIF_I960RX:
    536   1.1        ad 			AAC_DPRINTF(AAC_D_MISC,
    537   1.1        ad 			    ("set hardware up for i960Rx"));
    538   1.1        ad 			sc->sc_if = aac_rx_interface;
    539   1.1        ad 			break;
    540   1.1        ad 
    541   1.1        ad 		case AAC_HWIF_STRONGARM:
    542   1.1        ad 			AAC_DPRINTF(AAC_D_MISC,
    543   1.1        ad 			    ("set hardware up for StrongARM"));
    544   1.1        ad 			sc->sc_if = aac_sa_interface;
    545   1.1        ad 			break;
    546  1.21    briggs 
    547  1.21    briggs 		case AAC_HWIF_RKT:
    548  1.21    briggs 			AAC_DPRINTF(AAC_D_MISC,
    549  1.21    briggs 			    ("set hardware up for MIPS/Rocket"));
    550  1.21    briggs 			sc->sc_if = aac_rkt_interface;
    551  1.21    briggs 			break;
    552   1.1        ad 	}
    553  1.21    briggs 	sc->sc_regsize = memsize;
    554  1.21    briggs 	sc->sc_intr_set = aac_pci_intr_set;
    555   1.1        ad 
    556   1.1        ad 	if (!aac_attach(sc))
    557   1.1        ad 		return;
    558   1.1        ad 
    559   1.1        ad  bail_out:
    560   1.1        ad 	if (state > 1)
    561   1.1        ad 		pci_intr_disestablish(pc, sc->sc_ih);
    562   1.1        ad 	if (state > 0)
    563   1.1        ad 		bus_space_unmap(sc->sc_memt, sc->sc_memh, memsize);
    564   1.1        ad }
    565   1.1        ad 
    566  1.15   thorpej CFATTACH_DECL(aac_pci, sizeof(struct aac_softc),
    567  1.15   thorpej     aac_pci_match, aac_pci_attach, NULL, NULL);
    568  1.15   thorpej 
    569   1.1        ad /*
    570   1.1        ad  * Read the current firmware status word.
    571   1.1        ad  */
    572  1.15   thorpej static int
    573   1.1        ad aac_sa_get_fwstatus(struct aac_softc *sc)
    574   1.1        ad {
    575   1.1        ad 
    576   1.1        ad 	return (AAC_GETREG4(sc, AAC_SA_FWSTATUS));
    577   1.1        ad }
    578   1.1        ad 
    579  1.15   thorpej static int
    580   1.1        ad aac_rx_get_fwstatus(struct aac_softc *sc)
    581   1.1        ad {
    582   1.1        ad 
    583   1.1        ad 	return (AAC_GETREG4(sc, AAC_RX_FWSTATUS));
    584   1.1        ad }
    585   1.1        ad 
    586  1.21    briggs static int
    587  1.21    briggs aac_rkt_get_fwstatus(struct aac_softc *sc)
    588  1.21    briggs {
    589  1.21    briggs 
    590  1.21    briggs 	return (AAC_GETREG4(sc, AAC_RKT_FWSTATUS));
    591  1.21    briggs }
    592  1.21    briggs 
    593   1.1        ad /*
    594   1.1        ad  * Notify the controller of a change in a given queue
    595   1.1        ad  */
    596   1.1        ad 
    597  1.15   thorpej static void
    598   1.1        ad aac_sa_qnotify(struct aac_softc *sc, int qbit)
    599   1.1        ad {
    600   1.1        ad 
    601   1.1        ad 	AAC_SETREG2(sc, AAC_SA_DOORBELL1_SET, qbit);
    602   1.1        ad }
    603   1.1        ad 
    604  1.15   thorpej static void
    605   1.1        ad aac_rx_qnotify(struct aac_softc *sc, int qbit)
    606   1.1        ad {
    607   1.1        ad 
    608   1.1        ad 	AAC_SETREG4(sc, AAC_RX_IDBR, qbit);
    609   1.1        ad }
    610   1.1        ad 
    611  1.21    briggs static void
    612  1.21    briggs aac_rkt_qnotify(struct aac_softc *sc, int qbit)
    613  1.21    briggs {
    614  1.21    briggs 
    615  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_IDBR, qbit);
    616  1.21    briggs }
    617  1.21    briggs 
    618   1.1        ad /*
    619   1.1        ad  * Get the interrupt reason bits
    620   1.1        ad  */
    621  1.15   thorpej static int
    622   1.1        ad aac_sa_get_istatus(struct aac_softc *sc)
    623   1.1        ad {
    624   1.1        ad 
    625   1.1        ad 	return (AAC_GETREG2(sc, AAC_SA_DOORBELL0));
    626   1.1        ad }
    627   1.1        ad 
    628  1.15   thorpej static int
    629   1.1        ad aac_rx_get_istatus(struct aac_softc *sc)
    630   1.1        ad {
    631   1.1        ad 
    632   1.1        ad 	return (AAC_GETREG4(sc, AAC_RX_ODBR));
    633   1.1        ad }
    634   1.1        ad 
    635  1.21    briggs static int
    636  1.21    briggs aac_rkt_get_istatus(struct aac_softc *sc)
    637  1.21    briggs {
    638  1.21    briggs 
    639  1.21    briggs 	return (AAC_GETREG4(sc, AAC_RKT_ODBR));
    640  1.21    briggs }
    641  1.21    briggs 
    642   1.1        ad /*
    643   1.1        ad  * Clear some interrupt reason bits
    644   1.1        ad  */
    645  1.15   thorpej static void
    646   1.1        ad aac_sa_clear_istatus(struct aac_softc *sc, int mask)
    647   1.1        ad {
    648   1.1        ad 
    649   1.1        ad 	AAC_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask);
    650   1.1        ad }
    651   1.1        ad 
    652  1.15   thorpej static void
    653   1.1        ad aac_rx_clear_istatus(struct aac_softc *sc, int mask)
    654   1.1        ad {
    655   1.1        ad 
    656   1.1        ad 	AAC_SETREG4(sc, AAC_RX_ODBR, mask);
    657   1.1        ad }
    658   1.1        ad 
    659  1.21    briggs static void
    660  1.21    briggs aac_rkt_clear_istatus(struct aac_softc *sc, int mask)
    661  1.21    briggs {
    662  1.21    briggs 
    663  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_ODBR, mask);
    664  1.21    briggs }
    665  1.21    briggs 
    666   1.1        ad /*
    667   1.1        ad  * Populate the mailbox and set the command word
    668   1.1        ad  */
    669  1.15   thorpej static void
    670   1.1        ad aac_sa_set_mailbox(struct aac_softc *sc, u_int32_t command,
    671   1.1        ad 		   u_int32_t arg0, u_int32_t arg1, u_int32_t arg2,
    672   1.1        ad 		   u_int32_t arg3)
    673   1.1        ad {
    674   1.1        ad 
    675   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX, command);
    676   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 4, arg0);
    677   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 8, arg1);
    678   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 12, arg2);
    679   1.1        ad 	AAC_SETREG4(sc, AAC_SA_MAILBOX + 16, arg3);
    680   1.1        ad }
    681   1.1        ad 
    682  1.15   thorpej static void
    683   1.1        ad aac_rx_set_mailbox(struct aac_softc *sc, u_int32_t command,
    684   1.1        ad 		   u_int32_t arg0, u_int32_t arg1, u_int32_t arg2,
    685   1.1        ad 		   u_int32_t arg3)
    686   1.1        ad {
    687   1.1        ad 
    688   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX, command);
    689   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 4, arg0);
    690   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 8, arg1);
    691   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 12, arg2);
    692   1.1        ad 	AAC_SETREG4(sc, AAC_RX_MAILBOX + 16, arg3);
    693   1.1        ad }
    694   1.1        ad 
    695  1.21    briggs static void
    696  1.21    briggs aac_rkt_set_mailbox(struct aac_softc *sc, u_int32_t command,
    697  1.21    briggs 		    u_int32_t arg0, u_int32_t arg1, u_int32_t arg2,
    698  1.21    briggs 		    u_int32_t arg3)
    699  1.21    briggs {
    700  1.21    briggs 
    701  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_MAILBOX, command);
    702  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_MAILBOX + 4, arg0);
    703  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_MAILBOX + 8, arg1);
    704  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_MAILBOX + 12, arg2);
    705  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_MAILBOX + 16, arg3);
    706  1.21    briggs }
    707  1.21    briggs 
    708   1.1        ad /*
    709  1.12    briggs  * Fetch the specified mailbox
    710   1.1        ad  */
    711  1.15   thorpej static uint32_t
    712  1.12    briggs aac_sa_get_mailbox(struct aac_softc *sc, int mb)
    713   1.1        ad {
    714   1.1        ad 
    715  1.12    briggs 	return (AAC_GETREG4(sc, AAC_SA_MAILBOX + (mb * 4)));
    716   1.1        ad }
    717   1.1        ad 
    718  1.15   thorpej static uint32_t
    719  1.12    briggs aac_rx_get_mailbox(struct aac_softc *sc, int mb)
    720   1.1        ad {
    721   1.1        ad 
    722  1.12    briggs 	return (AAC_GETREG4(sc, AAC_RX_MAILBOX + (mb * 4)));
    723   1.1        ad }
    724   1.1        ad 
    725  1.21    briggs static uint32_t
    726  1.21    briggs aac_rkt_get_mailbox(struct aac_softc *sc, int mb)
    727  1.21    briggs {
    728  1.21    briggs 
    729  1.21    briggs 	return (AAC_GETREG4(sc, AAC_RKT_MAILBOX + (mb * 4)));
    730  1.21    briggs }
    731  1.21    briggs 
    732   1.1        ad /*
    733   1.1        ad  * Set/clear interrupt masks
    734   1.1        ad  */
    735  1.15   thorpej static void
    736   1.1        ad aac_sa_set_interrupts(struct aac_softc *sc, int enable)
    737   1.1        ad {
    738   1.1        ad 
    739   1.1        ad 	if (enable)
    740   1.1        ad 		AAC_SETREG2((sc), AAC_SA_MASK0_CLEAR, AAC_DB_INTERRUPTS);
    741   1.1        ad 	else
    742   1.1        ad 		AAC_SETREG2((sc), AAC_SA_MASK0_SET, ~0);
    743   1.1        ad }
    744   1.1        ad 
    745  1.15   thorpej static void
    746   1.1        ad aac_rx_set_interrupts(struct aac_softc *sc, int enable)
    747   1.1        ad {
    748   1.1        ad 
    749  1.21    briggs 	if (enable) {
    750  1.21    briggs 		if (sc->sc_quirks & AAC_QUIRK_NEW_COMM)
    751  1.21    briggs 			AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INT_NEW_COMM);
    752  1.21    briggs 		else
    753  1.21    briggs 			AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INTERRUPTS);
    754  1.21    briggs 	} else {
    755   1.1        ad 		AAC_SETREG4(sc, AAC_RX_OIMR, ~0);
    756  1.21    briggs 	}
    757  1.21    briggs }
    758  1.21    briggs 
    759  1.21    briggs static void
    760  1.21    briggs aac_rkt_set_interrupts(struct aac_softc *sc, int enable)
    761  1.21    briggs {
    762  1.21    briggs 
    763  1.21    briggs 	if (enable) {
    764  1.21    briggs 		if (sc->sc_quirks & AAC_QUIRK_NEW_COMM)
    765  1.21    briggs 			AAC_SETREG4(sc, AAC_RKT_OIMR, ~AAC_DB_INT_NEW_COMM);
    766  1.21    briggs 		else
    767  1.21    briggs 			AAC_SETREG4(sc, AAC_RKT_OIMR, ~AAC_DB_INTERRUPTS);
    768  1.21    briggs 	} else {
    769  1.21    briggs 		AAC_SETREG4(sc, AAC_RKT_OIMR, ~0);
    770  1.21    briggs 	}
    771  1.21    briggs }
    772  1.21    briggs 
    773  1.21    briggs /*
    774  1.21    briggs  * New comm. interface: Send command functions
    775  1.21    briggs  */
    776  1.21    briggs static int
    777  1.21    briggs aac_rx_send_command(struct aac_softc *sc, struct aac_ccb *ac)
    778  1.21    briggs {
    779  1.21    briggs 	u_int32_t	index, device;
    780  1.21    briggs 
    781  1.21    briggs 	index = AAC_GETREG4(sc, AAC_RX_IQUE);
    782  1.21    briggs 	if (index == 0xffffffffL)
    783  1.21    briggs 		index = AAC_GETREG4(sc, AAC_RX_IQUE);
    784  1.21    briggs 	if (index == 0xffffffffL)
    785  1.21    briggs 		return index;
    786  1.21    briggs #ifdef notyet
    787  1.21    briggs 	aac_enqueue_busy(ac);
    788  1.21    briggs #endif
    789  1.21    briggs 	device = index;
    790  1.21    briggs 	AAC_SETREG4(sc, device,
    791  1.21    briggs 	    htole32((u_int32_t)(ac->ac_fibphys & 0xffffffffUL)));
    792  1.21    briggs 	device += 4;
    793  1.21    briggs 	if (sizeof(bus_addr_t) > 4) {
    794  1.21    briggs 		AAC_SETREG4(sc, device,
    795  1.21    briggs 		    htole32((u_int32_t)((u_int64_t)ac->ac_fibphys >> 32)));
    796  1.21    briggs 	} else {
    797  1.21    briggs 		AAC_SETREG4(sc, device, 0);
    798  1.21    briggs 	}
    799  1.21    briggs 	device += 4;
    800  1.21    briggs 	AAC_SETREG4(sc, device, ac->ac_fib->Header.Size);
    801  1.21    briggs 	AAC_SETREG4(sc, AAC_RX_IQUE, index);
    802  1.21    briggs 	return 0;
    803  1.21    briggs }
    804  1.21    briggs 
    805  1.21    briggs static int
    806  1.21    briggs aac_rkt_send_command(struct aac_softc *sc, struct aac_ccb *ac)
    807  1.21    briggs {
    808  1.21    briggs 	u_int32_t	index, device;
    809  1.21    briggs 
    810  1.21    briggs 	index = AAC_GETREG4(sc, AAC_RKT_IQUE);
    811  1.21    briggs 	if (index == 0xffffffffL)
    812  1.21    briggs 		index = AAC_GETREG4(sc, AAC_RKT_IQUE);
    813  1.21    briggs 	if (index == 0xffffffffL)
    814  1.21    briggs 		return index;
    815  1.21    briggs #ifdef notyet
    816  1.21    briggs 	aac_enqueue_busy(ac);
    817  1.21    briggs #endif
    818  1.21    briggs 	device = index;
    819  1.21    briggs 	AAC_SETREG4(sc, device,
    820  1.21    briggs 	    htole32((u_int32_t)(ac->ac_fibphys & 0xffffffffUL)));
    821  1.21    briggs 	device += 4;
    822  1.21    briggs 	if (sizeof(bus_addr_t) > 4) {
    823  1.21    briggs 		AAC_SETREG4(sc, device,
    824  1.21    briggs 		    htole32((u_int32_t)((u_int64_t)ac->ac_fibphys >> 32)));
    825  1.21    briggs 	} else {
    826  1.21    briggs 		AAC_SETREG4(sc, device, 0);
    827  1.21    briggs 	}
    828  1.21    briggs 	device += 4;
    829  1.21    briggs 	AAC_SETREG4(sc, device, ac->ac_fib->Header.Size);
    830  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_IQUE, index);
    831  1.21    briggs 	return 0;
    832  1.21    briggs }
    833  1.21    briggs 
    834  1.21    briggs /*
    835  1.21    briggs  * New comm. interface: get, set outbound queue index
    836  1.21    briggs  */
    837  1.21    briggs static int
    838  1.21    briggs aac_rx_get_outb_queue(struct aac_softc *sc)
    839  1.21    briggs {
    840  1.21    briggs 
    841  1.21    briggs 	return AAC_GETREG4(sc, AAC_RX_OQUE);
    842  1.21    briggs }
    843  1.21    briggs 
    844  1.21    briggs static int
    845  1.21    briggs aac_rkt_get_outb_queue(struct aac_softc *sc)
    846  1.21    briggs {
    847  1.21    briggs 
    848  1.21    briggs 	return AAC_GETREG4(sc, AAC_RKT_OQUE);
    849  1.21    briggs }
    850  1.21    briggs 
    851  1.21    briggs static void
    852  1.21    briggs aac_rx_set_outb_queue(struct aac_softc *sc, int index)
    853  1.21    briggs {
    854  1.21    briggs 
    855  1.21    briggs 	AAC_SETREG4(sc, AAC_RX_OQUE, index);
    856  1.21    briggs }
    857  1.21    briggs 
    858  1.21    briggs static void
    859  1.21    briggs aac_rkt_set_outb_queue(struct aac_softc *sc, int index)
    860  1.21    briggs {
    861  1.21    briggs 
    862  1.21    briggs 	AAC_SETREG4(sc, AAC_RKT_OQUE, index);
    863   1.1        ad }
    864