aac_pci.c revision 1.25.8.2
1 /* $NetBSD: aac_pci.c,v 1.25.8.2 2010/11/20 20:56:46 riz Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 2000 Michael Smith 34 * Copyright (c) 2000 BSDi 35 * Copyright (c) 2000 Niklas Hallqvist 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58 * 59 * from FreeBSD: aac_pci.c,v 1.1 2000/09/13 03:20:34 msmith Exp 60 * via OpenBSD: aac_pci.c,v 1.7 2002/03/14 01:26:58 millert Exp 61 */ 62 63 /* 64 * PCI front-end for the `aac' driver. 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: aac_pci.c,v 1.25.8.2 2010/11/20 20:56:46 riz Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/device.h> 73 #include <sys/kernel.h> 74 #include <sys/malloc.h> 75 #include <sys/queue.h> 76 77 #include <sys/bus.h> 78 #include <machine/endian.h> 79 #include <sys/intr.h> 80 81 #include <dev/pci/pcidevs.h> 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcivar.h> 84 85 #include <dev/ic/aacreg.h> 86 #include <dev/ic/aacvar.h> 87 88 struct aac_pci_softc { 89 struct aac_softc sc_aac; 90 pci_chipset_tag_t sc_pc; 91 pci_intr_handle_t sc_ih; 92 }; 93 94 /* i960Rx interface */ 95 static int aac_rx_get_fwstatus(struct aac_softc *); 96 static void aac_rx_qnotify(struct aac_softc *, int); 97 static int aac_rx_get_istatus(struct aac_softc *); 98 static void aac_rx_clear_istatus(struct aac_softc *, int); 99 static void aac_rx_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t, 100 u_int32_t, u_int32_t, u_int32_t); 101 static uint32_t aac_rx_get_mailbox(struct aac_softc *, int); 102 static void aac_rx_set_interrupts(struct aac_softc *, int); 103 static int aac_rx_send_command(struct aac_softc *, struct aac_ccb *); 104 static int aac_rx_get_outb_queue(struct aac_softc *); 105 static void aac_rx_set_outb_queue(struct aac_softc *, int); 106 107 /* StrongARM interface */ 108 static int aac_sa_get_fwstatus(struct aac_softc *); 109 static void aac_sa_qnotify(struct aac_softc *, int); 110 static int aac_sa_get_istatus(struct aac_softc *); 111 static void aac_sa_clear_istatus(struct aac_softc *, int); 112 static void aac_sa_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t, 113 u_int32_t, u_int32_t, u_int32_t); 114 static uint32_t aac_sa_get_mailbox(struct aac_softc *, int); 115 static void aac_sa_set_interrupts(struct aac_softc *, int); 116 117 /* Rocket/MIPS interface */ 118 static int aac_rkt_get_fwstatus(struct aac_softc *); 119 static void aac_rkt_qnotify(struct aac_softc *, int); 120 static int aac_rkt_get_istatus(struct aac_softc *); 121 static void aac_rkt_clear_istatus(struct aac_softc *, int); 122 static void aac_rkt_set_mailbox(struct aac_softc *, u_int32_t, u_int32_t, 123 u_int32_t, u_int32_t, u_int32_t); 124 static uint32_t aac_rkt_get_mailbox(struct aac_softc *, int); 125 static void aac_rkt_set_interrupts(struct aac_softc *, int); 126 static int aac_rkt_send_command(struct aac_softc *, struct aac_ccb *); 127 static int aac_rkt_get_outb_queue(struct aac_softc *); 128 static void aac_rkt_set_outb_queue(struct aac_softc *, int); 129 130 static const struct aac_interface aac_rx_interface = { 131 aac_rx_get_fwstatus, 132 aac_rx_qnotify, 133 aac_rx_get_istatus, 134 aac_rx_clear_istatus, 135 aac_rx_set_mailbox, 136 aac_rx_get_mailbox, 137 aac_rx_set_interrupts, 138 aac_rx_send_command, 139 aac_rx_get_outb_queue, 140 aac_rx_set_outb_queue 141 }; 142 143 static const struct aac_interface aac_sa_interface = { 144 aac_sa_get_fwstatus, 145 aac_sa_qnotify, 146 aac_sa_get_istatus, 147 aac_sa_clear_istatus, 148 aac_sa_set_mailbox, 149 aac_sa_get_mailbox, 150 aac_sa_set_interrupts, 151 NULL, NULL, NULL 152 }; 153 154 static const struct aac_interface aac_rkt_interface = { 155 aac_rkt_get_fwstatus, 156 aac_rkt_qnotify, 157 aac_rkt_get_istatus, 158 aac_rkt_clear_istatus, 159 aac_rkt_set_mailbox, 160 aac_rkt_get_mailbox, 161 aac_rkt_set_interrupts, 162 aac_rkt_send_command, 163 aac_rkt_get_outb_queue, 164 aac_rkt_set_outb_queue 165 }; 166 167 static struct aac_ident { 168 u_short vendor; 169 u_short device; 170 u_short subvendor; 171 u_short subdevice; 172 u_short hwif; 173 u_short quirks; 174 const char *prodstr; 175 } const aac_ident[] = { 176 { 177 PCI_VENDOR_DELL, 178 PCI_PRODUCT_DELL_PERC_2SI, 179 PCI_VENDOR_DELL, 180 PCI_PRODUCT_DELL_PERC_2SI, 181 AAC_HWIF_I960RX, 182 0, 183 "Dell PERC 2/Si" 184 }, 185 { 186 PCI_VENDOR_DELL, 187 PCI_PRODUCT_DELL_PERC_3DI, 188 PCI_VENDOR_DELL, 189 PCI_PRODUCT_DELL_PERC_3DI, 190 AAC_HWIF_I960RX, 191 0, 192 "Dell PERC 3/Di" 193 }, 194 { 195 PCI_VENDOR_DELL, 196 PCI_PRODUCT_DELL_PERC_3DI, 197 PCI_VENDOR_DELL, 198 PCI_PRODUCT_DELL_PERC_3DI_SUB2, 199 AAC_HWIF_I960RX, 200 0, 201 "Dell PERC 3/Di" 202 }, 203 { 204 PCI_VENDOR_DELL, 205 PCI_PRODUCT_DELL_PERC_3DI, 206 PCI_VENDOR_DELL, 207 PCI_PRODUCT_DELL_PERC_3DI_SUB3, 208 AAC_HWIF_I960RX, 209 0, 210 "Dell PERC 3/Di" 211 }, 212 { 213 PCI_VENDOR_DELL, 214 PCI_PRODUCT_DELL_PERC_3DI_2, 215 PCI_VENDOR_DELL, 216 PCI_PRODUCT_DELL_PERC_3DI_2_SUB, 217 AAC_HWIF_I960RX, 218 0, 219 "Dell PERC 3/Di" 220 }, 221 { 222 PCI_VENDOR_DELL, 223 PCI_PRODUCT_DELL_PERC_3DI_3, 224 PCI_VENDOR_DELL, 225 PCI_PRODUCT_DELL_PERC_3DI_3_SUB, 226 AAC_HWIF_I960RX, 227 0, 228 "Dell PERC 3/Di" 229 }, 230 { 231 PCI_VENDOR_DELL, 232 PCI_PRODUCT_DELL_PERC_3DI_3, 233 PCI_VENDOR_DELL, 234 PCI_PRODUCT_DELL_PERC_3DI_3_SUB2, 235 AAC_HWIF_I960RX, 236 0, 237 "Dell PERC 3/Di" 238 }, 239 { 240 PCI_VENDOR_DELL, 241 PCI_PRODUCT_DELL_PERC_3DI_3, 242 PCI_VENDOR_DELL, 243 PCI_PRODUCT_DELL_PERC_3DI_3_SUB3, 244 AAC_HWIF_I960RX, 245 0, 246 "Dell PERC 3/Di" 247 }, 248 { 249 PCI_VENDOR_DELL, 250 PCI_PRODUCT_DELL_PERC_3SI, 251 PCI_VENDOR_DELL, 252 PCI_PRODUCT_DELL_PERC_3SI, 253 AAC_HWIF_I960RX, 254 0, 255 "Dell PERC 3/Si" 256 }, 257 { 258 PCI_VENDOR_DELL, 259 PCI_PRODUCT_DELL_PERC_3SI_2, 260 PCI_VENDOR_DELL, 261 PCI_PRODUCT_DELL_PERC_3SI_2_SUB, 262 AAC_HWIF_I960RX, 263 0, 264 "Dell PERC 3/Si" 265 }, 266 { 267 PCI_VENDOR_ADP2, 268 PCI_PRODUCT_ADP2_ASR2200S, 269 PCI_VENDOR_DELL, 270 PCI_PRODUCT_DELL_CERC_1_5, 271 AAC_HWIF_I960RX, 272 AAC_QUIRK_NO4GB, 273 "Dell CERC SATA RAID 1.5/6ch" 274 }, 275 { 276 PCI_VENDOR_ADP2, 277 PCI_PRODUCT_ADP2_AAC2622, 278 PCI_VENDOR_ADP2, 279 PCI_PRODUCT_ADP2_AAC2622, 280 AAC_HWIF_I960RX, 281 0, 282 "Adaptec ADP-2622" 283 }, 284 { 285 PCI_VENDOR_ADP2, 286 PCI_PRODUCT_ADP2_ASR2200S, 287 PCI_VENDOR_ADP2, 288 PCI_PRODUCT_ADP2_ASR2200S_SUB2M, 289 AAC_HWIF_I960RX, 290 AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS, 291 "Adaptec ASR-2200S" 292 }, 293 { 294 PCI_VENDOR_ADP2, 295 PCI_PRODUCT_ADP2_ASR2200S, 296 PCI_VENDOR_DELL, 297 PCI_PRODUCT_ADP2_ASR2200S_SUB2M, 298 AAC_HWIF_I960RX, 299 AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS, 300 "Dell PERC 320/DC" 301 }, 302 { 303 PCI_VENDOR_ADP2, 304 PCI_PRODUCT_ADP2_ASR2200S, 305 PCI_VENDOR_ADP2, 306 PCI_PRODUCT_ADP2_ASR2200S, 307 AAC_HWIF_I960RX, 308 AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS, 309 "Adaptec ASR-2200S" 310 }, 311 { 312 PCI_VENDOR_ADP2, 313 PCI_PRODUCT_ADP2_ASR2200S, 314 PCI_VENDOR_ADP2, 315 PCI_PRODUCT_ADP2_AAR2810SA, 316 AAC_HWIF_I960RX, 317 AAC_QUIRK_NO4GB, 318 "Adaptec AAR-2810SA" 319 }, 320 { 321 PCI_VENDOR_ADP2, 322 PCI_PRODUCT_ADP2_ASR2200S, 323 PCI_VENDOR_ADP2, 324 PCI_PRODUCT_ADP2_ASR2120S, 325 AAC_HWIF_I960RX, 326 AAC_QUIRK_NO4GB | AAC_QUIRK_256FIBS, 327 "Adaptec ASR-2120S" 328 }, 329 { 330 PCI_VENDOR_ADP2, 331 PCI_PRODUCT_ADP2_ASR2200S, 332 PCI_VENDOR_ADP2, 333 PCI_PRODUCT_ADP2_ASR2410SA, 334 AAC_HWIF_I960RX, 335 AAC_QUIRK_NO4GB, 336 "Adaptec ASR-2410SA" 337 }, 338 { 339 PCI_VENDOR_ADP2, 340 PCI_PRODUCT_ADP2_ASR2200S, 341 PCI_VENDOR_HP, 342 PCI_PRODUCT_ADP2_HP_M110_G2, 343 AAC_HWIF_I960RX, 344 AAC_QUIRK_NO4GB, 345 "HP ML110 G2 (Adaptec ASR-2610SA)" 346 }, 347 { 348 PCI_VENDOR_ADP2, 349 PCI_PRODUCT_ADP2_ASR2120S, 350 PCI_VENDOR_IBM, 351 PCI_PRODUCT_IBM_SERVERAID8K, 352 AAC_HWIF_RKT, 353 0, 354 "IBM ServeRAID 8k" 355 }, 356 { 357 PCI_VENDOR_DEC, 358 PCI_PRODUCT_DEC_21554, 359 PCI_VENDOR_ADP2, 360 PCI_PRODUCT_ADP2_AAC364, 361 AAC_HWIF_STRONGARM, 362 0, 363 "Adaptec AAC-364" 364 }, 365 { 366 PCI_VENDOR_DEC, 367 PCI_PRODUCT_DEC_21554, 368 PCI_VENDOR_ADP2, 369 PCI_PRODUCT_ADP2_ASR5400S, 370 AAC_HWIF_STRONGARM, 371 AAC_QUIRK_BROKEN_MMAP, 372 "Adaptec ASR-5400S" 373 }, 374 { 375 PCI_VENDOR_DEC, 376 PCI_PRODUCT_DEC_21554, 377 PCI_VENDOR_ADP2, 378 PCI_PRODUCT_ADP2_PERC_2QC, 379 AAC_HWIF_STRONGARM, 380 AAC_QUIRK_PERC2QC, 381 "Dell PERC 2/QC" 382 }, 383 { 384 PCI_VENDOR_DEC, 385 PCI_PRODUCT_DEC_21554, 386 PCI_VENDOR_ADP2, 387 PCI_PRODUCT_ADP2_PERC_3QC, 388 AAC_HWIF_STRONGARM, 389 0, 390 "Dell PERC 3/QC" 391 }, 392 { 393 PCI_VENDOR_DEC, 394 PCI_PRODUCT_DEC_21554, 395 PCI_VENDOR_HP, 396 PCI_PRODUCT_HP_NETRAID_4M, 397 AAC_HWIF_STRONGARM, 398 0, 399 "HP NetRAID-4M" 400 }, 401 { 0x9005, 402 0x0285, 403 0x108e, 404 0x286, 405 AAC_HWIF_I960RX, 406 0, 407 "SG-XPCIESAS-R-IN" 408 }, 409 }; 410 411 static const struct aac_ident * 412 aac_find_ident(struct pci_attach_args *pa) 413 { 414 const struct aac_ident *m, *mm; 415 u_int32_t subsysid; 416 417 m = aac_ident; 418 mm = aac_ident + (sizeof(aac_ident) / sizeof(aac_ident[0])); 419 420 while (m < mm) { 421 if (m->vendor == PCI_VENDOR(pa->pa_id) && 422 m->device == PCI_PRODUCT(pa->pa_id)) { 423 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, 424 PCI_SUBSYS_ID_REG); 425 if (m->subvendor == PCI_VENDOR(subsysid) && 426 m->subdevice == PCI_PRODUCT(subsysid)) 427 return (m); 428 } 429 m++; 430 } 431 432 return (NULL); 433 } 434 435 static int 436 aac_pci_intr_set(struct aac_softc *sc, int (*hand)(void*), void *arg) 437 { 438 struct aac_pci_softc *pcisc; 439 440 pcisc = (struct aac_pci_softc *) sc; 441 442 pci_intr_disestablish(pcisc->sc_pc, sc->sc_ih); 443 sc->sc_ih = pci_intr_establish(pcisc->sc_pc, pcisc->sc_ih, 444 IPL_BIO, hand, arg); 445 if (sc->sc_ih == NULL) { 446 return ENXIO; 447 } 448 return 0; 449 } 450 451 static int 452 aac_pci_match(struct device *parent, struct cfdata *match, 453 void *aux) 454 { 455 struct pci_attach_args *pa; 456 457 pa = aux; 458 459 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O) 460 return (0); 461 462 return (aac_find_ident(pa) != NULL); 463 } 464 465 static void 466 aac_pci_attach(struct device *parent, struct device *self, void *aux) 467 { 468 struct pci_attach_args *pa; 469 pci_chipset_tag_t pc; 470 struct aac_pci_softc *pcisc; 471 struct aac_softc *sc; 472 u_int16_t command; 473 bus_addr_t membase; 474 bus_size_t memsize; 475 const char *intrstr; 476 int state; 477 const struct aac_ident *m; 478 479 pa = aux; 480 pc = pa->pa_pc; 481 pcisc = (struct aac_pci_softc *)self; 482 pcisc->sc_pc = pc; 483 sc = &pcisc->sc_aac; 484 state = 0; 485 486 aprint_naive(": RAID controller\n"); 487 aprint_normal(": "); 488 489 /* 490 * Verify that the adapter is correctly set up in PCI space. 491 */ 492 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 493 command |= PCI_COMMAND_MASTER_ENABLE; 494 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 495 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 496 AAC_DPRINTF(AAC_D_MISC, ("pci command status reg 0x08x ")); 497 498 if ((command & PCI_COMMAND_MASTER_ENABLE) == 0) { 499 aprint_error("can't enable bus-master feature\n"); 500 goto bail_out; 501 } 502 503 if ((command & PCI_COMMAND_MEM_ENABLE) == 0) { 504 aprint_error("memory window not available\n"); 505 goto bail_out; 506 } 507 508 /* 509 * Map control/status registers. 510 */ 511 if (pci_mapreg_map(pa, PCI_MAPREG_START, 512 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_memt, 513 &sc->sc_memh, &membase, &memsize)) { 514 aprint_error("can't find mem space\n"); 515 goto bail_out; 516 } 517 state++; 518 519 if (pci_intr_map(pa, &pcisc->sc_ih)) { 520 aprint_error("couldn't map interrupt\n"); 521 goto bail_out; 522 } 523 intrstr = pci_intr_string(pc, pcisc->sc_ih); 524 sc->sc_ih = pci_intr_establish(pc, pcisc->sc_ih, IPL_BIO, aac_intr, sc); 525 if (sc->sc_ih == NULL) { 526 aprint_error("couldn't establish interrupt"); 527 if (intrstr != NULL) 528 aprint_normal(" at %s", intrstr); 529 aprint_normal("\n"); 530 goto bail_out; 531 } 532 state++; 533 534 sc->sc_dmat = pa->pa_dmat; 535 536 m = aac_find_ident(pa); 537 aprint_normal("%s\n", m->prodstr); 538 if (intrstr != NULL) 539 aprint_normal_dev(&sc->sc_dv, "interrupting at %s\n", 540 intrstr); 541 542 sc->sc_hwif = m->hwif; 543 sc->sc_quirks = m->quirks; 544 switch (sc->sc_hwif) { 545 case AAC_HWIF_I960RX: 546 AAC_DPRINTF(AAC_D_MISC, 547 ("set hardware up for i960Rx")); 548 sc->sc_if = aac_rx_interface; 549 break; 550 551 case AAC_HWIF_STRONGARM: 552 AAC_DPRINTF(AAC_D_MISC, 553 ("set hardware up for StrongARM")); 554 sc->sc_if = aac_sa_interface; 555 break; 556 557 case AAC_HWIF_RKT: 558 AAC_DPRINTF(AAC_D_MISC, 559 ("set hardware up for MIPS/Rocket")); 560 sc->sc_if = aac_rkt_interface; 561 break; 562 } 563 sc->sc_regsize = memsize; 564 sc->sc_intr_set = aac_pci_intr_set; 565 566 if (!aac_attach(sc)) 567 return; 568 569 bail_out: 570 if (state > 1) 571 pci_intr_disestablish(pc, sc->sc_ih); 572 if (state > 0) 573 bus_space_unmap(sc->sc_memt, sc->sc_memh, memsize); 574 } 575 576 CFATTACH_DECL(aac_pci, sizeof(struct aac_pci_softc), 577 aac_pci_match, aac_pci_attach, NULL, NULL); 578 579 /* 580 * Read the current firmware status word. 581 */ 582 static int 583 aac_sa_get_fwstatus(struct aac_softc *sc) 584 { 585 586 return (AAC_GETREG4(sc, AAC_SA_FWSTATUS)); 587 } 588 589 static int 590 aac_rx_get_fwstatus(struct aac_softc *sc) 591 { 592 593 return (AAC_GETREG4(sc, AAC_RX_FWSTATUS)); 594 } 595 596 static int 597 aac_rkt_get_fwstatus(struct aac_softc *sc) 598 { 599 600 return (AAC_GETREG4(sc, AAC_RKT_FWSTATUS)); 601 } 602 603 /* 604 * Notify the controller of a change in a given queue 605 */ 606 607 static void 608 aac_sa_qnotify(struct aac_softc *sc, int qbit) 609 { 610 611 AAC_SETREG2(sc, AAC_SA_DOORBELL1_SET, qbit); 612 } 613 614 static void 615 aac_rx_qnotify(struct aac_softc *sc, int qbit) 616 { 617 618 AAC_SETREG4(sc, AAC_RX_IDBR, qbit); 619 } 620 621 static void 622 aac_rkt_qnotify(struct aac_softc *sc, int qbit) 623 { 624 625 AAC_SETREG4(sc, AAC_RKT_IDBR, qbit); 626 } 627 628 /* 629 * Get the interrupt reason bits 630 */ 631 static int 632 aac_sa_get_istatus(struct aac_softc *sc) 633 { 634 635 return (AAC_GETREG2(sc, AAC_SA_DOORBELL0)); 636 } 637 638 static int 639 aac_rx_get_istatus(struct aac_softc *sc) 640 { 641 642 return (AAC_GETREG4(sc, AAC_RX_ODBR)); 643 } 644 645 static int 646 aac_rkt_get_istatus(struct aac_softc *sc) 647 { 648 649 return (AAC_GETREG4(sc, AAC_RKT_ODBR)); 650 } 651 652 /* 653 * Clear some interrupt reason bits 654 */ 655 static void 656 aac_sa_clear_istatus(struct aac_softc *sc, int mask) 657 { 658 659 AAC_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask); 660 } 661 662 static void 663 aac_rx_clear_istatus(struct aac_softc *sc, int mask) 664 { 665 666 AAC_SETREG4(sc, AAC_RX_ODBR, mask); 667 } 668 669 static void 670 aac_rkt_clear_istatus(struct aac_softc *sc, int mask) 671 { 672 673 AAC_SETREG4(sc, AAC_RKT_ODBR, mask); 674 } 675 676 /* 677 * Populate the mailbox and set the command word 678 */ 679 static void 680 aac_sa_set_mailbox(struct aac_softc *sc, u_int32_t command, 681 u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, 682 u_int32_t arg3) 683 { 684 685 AAC_SETREG4(sc, AAC_SA_MAILBOX, command); 686 AAC_SETREG4(sc, AAC_SA_MAILBOX + 4, arg0); 687 AAC_SETREG4(sc, AAC_SA_MAILBOX + 8, arg1); 688 AAC_SETREG4(sc, AAC_SA_MAILBOX + 12, arg2); 689 AAC_SETREG4(sc, AAC_SA_MAILBOX + 16, arg3); 690 } 691 692 static void 693 aac_rx_set_mailbox(struct aac_softc *sc, u_int32_t command, 694 u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, 695 u_int32_t arg3) 696 { 697 698 AAC_SETREG4(sc, AAC_RX_MAILBOX, command); 699 AAC_SETREG4(sc, AAC_RX_MAILBOX + 4, arg0); 700 AAC_SETREG4(sc, AAC_RX_MAILBOX + 8, arg1); 701 AAC_SETREG4(sc, AAC_RX_MAILBOX + 12, arg2); 702 AAC_SETREG4(sc, AAC_RX_MAILBOX + 16, arg3); 703 } 704 705 static void 706 aac_rkt_set_mailbox(struct aac_softc *sc, u_int32_t command, 707 u_int32_t arg0, u_int32_t arg1, u_int32_t arg2, 708 u_int32_t arg3) 709 { 710 711 AAC_SETREG4(sc, AAC_RKT_MAILBOX, command); 712 AAC_SETREG4(sc, AAC_RKT_MAILBOX + 4, arg0); 713 AAC_SETREG4(sc, AAC_RKT_MAILBOX + 8, arg1); 714 AAC_SETREG4(sc, AAC_RKT_MAILBOX + 12, arg2); 715 AAC_SETREG4(sc, AAC_RKT_MAILBOX + 16, arg3); 716 } 717 718 /* 719 * Fetch the specified mailbox 720 */ 721 static uint32_t 722 aac_sa_get_mailbox(struct aac_softc *sc, int mb) 723 { 724 725 return (AAC_GETREG4(sc, AAC_SA_MAILBOX + (mb * 4))); 726 } 727 728 static uint32_t 729 aac_rx_get_mailbox(struct aac_softc *sc, int mb) 730 { 731 732 return (AAC_GETREG4(sc, AAC_RX_MAILBOX + (mb * 4))); 733 } 734 735 static uint32_t 736 aac_rkt_get_mailbox(struct aac_softc *sc, int mb) 737 { 738 739 return (AAC_GETREG4(sc, AAC_RKT_MAILBOX + (mb * 4))); 740 } 741 742 /* 743 * Set/clear interrupt masks 744 */ 745 static void 746 aac_sa_set_interrupts(struct aac_softc *sc, int enable) 747 { 748 749 if (enable) 750 AAC_SETREG2((sc), AAC_SA_MASK0_CLEAR, AAC_DB_INTERRUPTS); 751 else 752 AAC_SETREG2((sc), AAC_SA_MASK0_SET, ~0); 753 } 754 755 static void 756 aac_rx_set_interrupts(struct aac_softc *sc, int enable) 757 { 758 759 if (enable) { 760 if (sc->sc_quirks & AAC_QUIRK_NEW_COMM) 761 AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INT_NEW_COMM); 762 else 763 AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INTERRUPTS); 764 } else { 765 AAC_SETREG4(sc, AAC_RX_OIMR, ~0); 766 } 767 } 768 769 static void 770 aac_rkt_set_interrupts(struct aac_softc *sc, int enable) 771 { 772 773 if (enable) { 774 if (sc->sc_quirks & AAC_QUIRK_NEW_COMM) 775 AAC_SETREG4(sc, AAC_RKT_OIMR, ~AAC_DB_INT_NEW_COMM); 776 else 777 AAC_SETREG4(sc, AAC_RKT_OIMR, ~AAC_DB_INTERRUPTS); 778 } else { 779 AAC_SETREG4(sc, AAC_RKT_OIMR, ~0); 780 } 781 } 782 783 /* 784 * New comm. interface: Send command functions 785 */ 786 static int 787 aac_rx_send_command(struct aac_softc *sc, struct aac_ccb *ac) 788 { 789 u_int32_t index, device; 790 791 index = AAC_GETREG4(sc, AAC_RX_IQUE); 792 if (index == 0xffffffffL) 793 index = AAC_GETREG4(sc, AAC_RX_IQUE); 794 if (index == 0xffffffffL) 795 return index; 796 #ifdef notyet 797 aac_enqueue_busy(ac); 798 #endif 799 device = index; 800 AAC_SETREG4(sc, device, 801 htole32((u_int32_t)(ac->ac_fibphys & 0xffffffffUL))); 802 device += 4; 803 if (sizeof(bus_addr_t) > 4) { 804 AAC_SETREG4(sc, device, 805 htole32((u_int32_t)((u_int64_t)ac->ac_fibphys >> 32))); 806 } else { 807 AAC_SETREG4(sc, device, 0); 808 } 809 device += 4; 810 AAC_SETREG4(sc, device, ac->ac_fib->Header.Size); 811 AAC_SETREG4(sc, AAC_RX_IQUE, index); 812 return 0; 813 } 814 815 static int 816 aac_rkt_send_command(struct aac_softc *sc, struct aac_ccb *ac) 817 { 818 u_int32_t index, device; 819 820 index = AAC_GETREG4(sc, AAC_RKT_IQUE); 821 if (index == 0xffffffffL) 822 index = AAC_GETREG4(sc, AAC_RKT_IQUE); 823 if (index == 0xffffffffL) 824 return index; 825 #ifdef notyet 826 aac_enqueue_busy(ac); 827 #endif 828 device = index; 829 AAC_SETREG4(sc, device, 830 htole32((u_int32_t)(ac->ac_fibphys & 0xffffffffUL))); 831 device += 4; 832 if (sizeof(bus_addr_t) > 4) { 833 AAC_SETREG4(sc, device, 834 htole32((u_int32_t)((u_int64_t)ac->ac_fibphys >> 32))); 835 } else { 836 AAC_SETREG4(sc, device, 0); 837 } 838 device += 4; 839 AAC_SETREG4(sc, device, ac->ac_fib->Header.Size); 840 AAC_SETREG4(sc, AAC_RKT_IQUE, index); 841 return 0; 842 } 843 844 /* 845 * New comm. interface: get, set outbound queue index 846 */ 847 static int 848 aac_rx_get_outb_queue(struct aac_softc *sc) 849 { 850 851 return AAC_GETREG4(sc, AAC_RX_OQUE); 852 } 853 854 static int 855 aac_rkt_get_outb_queue(struct aac_softc *sc) 856 { 857 858 return AAC_GETREG4(sc, AAC_RKT_OQUE); 859 } 860 861 static void 862 aac_rx_set_outb_queue(struct aac_softc *sc, int index) 863 { 864 865 AAC_SETREG4(sc, AAC_RX_OQUE, index); 866 } 867 868 static void 869 aac_rkt_set_outb_queue(struct aac_softc *sc, int index) 870 { 871 872 AAC_SETREG4(sc, AAC_RKT_OQUE, index); 873 } 874
Indexes created Wed Oct 01 19:09:53 GMT 2025