acardide.c revision 1.12 1 1.12 thorpej /* $NetBSD: acardide.c,v 1.12 2004/08/19 23:25:35 thorpej Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2001 Izumi Tsutsui.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer * 3. The name of the author may not be used to endorse or promote products
15 1.1 bouyer * derived from this software without specific prior written permission.
16 1.1 bouyer *
17 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.4 tsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 bouyer */
28 1.1 bouyer
29 1.1 bouyer #include <sys/param.h>
30 1.1 bouyer #include <sys/systm.h>
31 1.1 bouyer
32 1.1 bouyer #include <dev/pci/pcivar.h>
33 1.1 bouyer #include <dev/pci/pcidevs.h>
34 1.1 bouyer #include <dev/pci/pciidereg.h>
35 1.1 bouyer #include <dev/pci/pciidevar.h>
36 1.1 bouyer #include <dev/pci/pciide_acard_reg.h>
37 1.1 bouyer
38 1.2 thorpej static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*);
39 1.11 thorpej static void acard_setup_channel(struct ata_channel*);
40 1.2 thorpej #if 0 /* XXX !! */
41 1.2 thorpej static int acard_pci_intr(void *);
42 1.2 thorpej #endif
43 1.1 bouyer
44 1.2 thorpej static int acardide_match(struct device *, struct cfdata *, void *);
45 1.2 thorpej static void acardide_attach(struct device *, struct device *, void *);
46 1.1 bouyer
47 1.1 bouyer CFATTACH_DECL(acardide, sizeof(struct pciide_softc),
48 1.1 bouyer acardide_match, acardide_attach, NULL, NULL);
49 1.1 bouyer
50 1.2 thorpej static const struct pciide_product_desc pciide_acard_products[] = {
51 1.1 bouyer { PCI_PRODUCT_ACARD_ATP850U,
52 1.3 mycroft 0,
53 1.1 bouyer "Acard ATP850U Ultra33 IDE Controller",
54 1.1 bouyer acard_chip_map,
55 1.1 bouyer },
56 1.1 bouyer { PCI_PRODUCT_ACARD_ATP860,
57 1.3 mycroft 0,
58 1.1 bouyer "Acard ATP860 Ultra66 IDE Controller",
59 1.1 bouyer acard_chip_map,
60 1.1 bouyer },
61 1.1 bouyer { PCI_PRODUCT_ACARD_ATP860A,
62 1.3 mycroft 0,
63 1.1 bouyer "Acard ATP860-A Ultra66 IDE Controller",
64 1.1 bouyer acard_chip_map,
65 1.1 bouyer },
66 1.5 tsutsui { PCI_PRODUCT_ACARD_ATP865,
67 1.5 tsutsui 0,
68 1.5 tsutsui "Acard ATP865 Ultra100 IDE Controller",
69 1.5 tsutsui acard_chip_map,
70 1.5 tsutsui },
71 1.5 tsutsui { PCI_PRODUCT_ACARD_ATP865A,
72 1.5 tsutsui 0,
73 1.5 tsutsui "Acard ATP865-A Ultra100 IDE Controller",
74 1.5 tsutsui acard_chip_map,
75 1.5 tsutsui },
76 1.1 bouyer { 0,
77 1.1 bouyer 0,
78 1.1 bouyer NULL,
79 1.1 bouyer NULL
80 1.1 bouyer }
81 1.1 bouyer };
82 1.1 bouyer
83 1.2 thorpej static int
84 1.2 thorpej acardide_match(struct device *parent, struct cfdata *match, void *aux)
85 1.1 bouyer {
86 1.1 bouyer struct pci_attach_args *pa = aux;
87 1.1 bouyer
88 1.1 bouyer if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) {
89 1.1 bouyer if (pciide_lookup_product(pa->pa_id, pciide_acard_products))
90 1.1 bouyer return (2);
91 1.1 bouyer }
92 1.1 bouyer return (0);
93 1.1 bouyer }
94 1.1 bouyer
95 1.2 thorpej static void
96 1.2 thorpej acardide_attach(struct device *parent, struct device *self, void *aux)
97 1.1 bouyer {
98 1.1 bouyer struct pci_attach_args *pa = aux;
99 1.1 bouyer struct pciide_softc *sc = (struct pciide_softc *)self;
100 1.1 bouyer
101 1.1 bouyer pciide_common_attach(sc, pa,
102 1.1 bouyer pciide_lookup_product(pa->pa_id, pciide_acard_products));
103 1.1 bouyer
104 1.1 bouyer }
105 1.1 bouyer
106 1.1 bouyer #define ACARD_IS_850(sc) \
107 1.1 bouyer ((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
108 1.1 bouyer
109 1.2 thorpej static void
110 1.2 thorpej acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
111 1.1 bouyer {
112 1.1 bouyer struct pciide_channel *cp;
113 1.1 bouyer int i;
114 1.1 bouyer pcireg_t interface;
115 1.1 bouyer bus_size_t cmdsize, ctlsize;
116 1.1 bouyer
117 1.1 bouyer if (pciide_chipen(sc, pa) == 0)
118 1.1 bouyer return;
119 1.1 bouyer
120 1.4 tsutsui /*
121 1.1 bouyer * when the chip is in native mode it identifies itself as a
122 1.1 bouyer * 'misc mass storage'. Fake interface in this case.
123 1.1 bouyer */
124 1.1 bouyer if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
125 1.1 bouyer interface = PCI_INTERFACE(pa->pa_class);
126 1.1 bouyer } else {
127 1.1 bouyer interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
128 1.1 bouyer PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
129 1.1 bouyer }
130 1.1 bouyer
131 1.1 bouyer aprint_normal("%s: bus-master DMA support present",
132 1.1 bouyer sc->sc_wdcdev.sc_dev.dv_xname);
133 1.1 bouyer pciide_mapreg_dma(sc, pa);
134 1.1 bouyer aprint_normal("\n");
135 1.10 thorpej sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
136 1.1 bouyer
137 1.1 bouyer if (sc->sc_dma_ok) {
138 1.1 bouyer sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
139 1.1 bouyer sc->sc_wdcdev.irqack = pciide_irqack;
140 1.1 bouyer }
141 1.1 bouyer sc->sc_wdcdev.PIO_cap = 4;
142 1.1 bouyer sc->sc_wdcdev.DMA_cap = 2;
143 1.5 tsutsui switch (sc->sc_pp->ide_product) {
144 1.5 tsutsui case PCI_PRODUCT_ACARD_ATP860:
145 1.5 tsutsui case PCI_PRODUCT_ACARD_ATP860A:
146 1.5 tsutsui sc->sc_wdcdev.UDMA_cap = 4;
147 1.5 tsutsui break;
148 1.5 tsutsui case PCI_PRODUCT_ACARD_ATP865:
149 1.5 tsutsui case PCI_PRODUCT_ACARD_ATP865A:
150 1.5 tsutsui sc->sc_wdcdev.UDMA_cap = 5;
151 1.5 tsutsui break;
152 1.5 tsutsui default:
153 1.5 tsutsui sc->sc_wdcdev.UDMA_cap = 2;
154 1.5 tsutsui break;
155 1.5 tsutsui }
156 1.1 bouyer
157 1.1 bouyer sc->sc_wdcdev.set_modes = acard_setup_channel;
158 1.1 bouyer sc->sc_wdcdev.channels = sc->wdc_chanarray;
159 1.1 bouyer sc->sc_wdcdev.nchannels = 2;
160 1.1 bouyer
161 1.11 thorpej wdc_allocate_regs(&sc->sc_wdcdev);
162 1.11 thorpej
163 1.1 bouyer for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
164 1.1 bouyer cp = &sc->pciide_channels[i];
165 1.1 bouyer if (pciide_chansetup(sc, i, interface) == 0)
166 1.1 bouyer continue;
167 1.1 bouyer pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
168 1.1 bouyer pciide_pci_intr);
169 1.1 bouyer }
170 1.1 bouyer if (!ACARD_IS_850(sc)) {
171 1.1 bouyer u_int32_t reg;
172 1.1 bouyer reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
173 1.1 bouyer reg &= ~ATP860_CTRL_INT;
174 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
175 1.1 bouyer }
176 1.1 bouyer }
177 1.1 bouyer
178 1.2 thorpej static void
179 1.11 thorpej acard_setup_channel(struct ata_channel *chp)
180 1.1 bouyer {
181 1.1 bouyer struct ata_drive_datas *drvp;
182 1.12 thorpej struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
183 1.12 thorpej struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
184 1.8 thorpej struct wdc_softc *wdc = &sc->sc_wdcdev;
185 1.8 thorpej int channel = chp->ch_channel;
186 1.1 bouyer int drive;
187 1.1 bouyer u_int32_t idetime, udma_mode;
188 1.1 bouyer u_int32_t idedma_ctl;
189 1.1 bouyer
190 1.1 bouyer /* setup DMA if needed */
191 1.1 bouyer pciide_channel_dma_setup(cp);
192 1.1 bouyer
193 1.1 bouyer if (ACARD_IS_850(sc)) {
194 1.1 bouyer idetime = 0;
195 1.1 bouyer udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
196 1.1 bouyer udma_mode &= ~ATP850_UDMA_MASK(channel);
197 1.1 bouyer } else {
198 1.1 bouyer idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
199 1.1 bouyer idetime &= ~ATP860_SETTIME_MASK(channel);
200 1.1 bouyer udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
201 1.1 bouyer udma_mode &= ~ATP860_UDMA_MASK(channel);
202 1.1 bouyer
203 1.1 bouyer /* check 80 pins cable */
204 1.1 bouyer if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) ||
205 1.1 bouyer (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
206 1.1 bouyer if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
207 1.8 thorpej & ATP860_CTRL_80P(chp->ch_channel)) {
208 1.1 bouyer if (chp->ch_drive[0].UDMA_mode > 2)
209 1.1 bouyer chp->ch_drive[0].UDMA_mode = 2;
210 1.1 bouyer if (chp->ch_drive[1].UDMA_mode > 2)
211 1.1 bouyer chp->ch_drive[1].UDMA_mode = 2;
212 1.1 bouyer }
213 1.1 bouyer }
214 1.1 bouyer }
215 1.1 bouyer
216 1.1 bouyer idedma_ctl = 0;
217 1.1 bouyer
218 1.1 bouyer /* Per drive settings */
219 1.1 bouyer for (drive = 0; drive < 2; drive++) {
220 1.1 bouyer drvp = &chp->ch_drive[drive];
221 1.1 bouyer /* If no drive, skip */
222 1.1 bouyer if ((drvp->drive_flags & DRIVE) == 0)
223 1.1 bouyer continue;
224 1.1 bouyer /* add timing values, setup DMA if needed */
225 1.8 thorpej if ((wdc->cap & WDC_CAPABILITY_UDMA) &&
226 1.1 bouyer (drvp->drive_flags & DRIVE_UDMA)) {
227 1.1 bouyer /* use Ultra/DMA */
228 1.1 bouyer if (ACARD_IS_850(sc)) {
229 1.1 bouyer idetime |= ATP850_SETTIME(drive,
230 1.1 bouyer acard_act_udma[drvp->UDMA_mode],
231 1.1 bouyer acard_rec_udma[drvp->UDMA_mode]);
232 1.1 bouyer udma_mode |= ATP850_UDMA_MODE(channel, drive,
233 1.1 bouyer acard_udma_conf[drvp->UDMA_mode]);
234 1.1 bouyer } else {
235 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
236 1.1 bouyer acard_act_udma[drvp->UDMA_mode],
237 1.1 bouyer acard_rec_udma[drvp->UDMA_mode]);
238 1.1 bouyer udma_mode |= ATP860_UDMA_MODE(channel, drive,
239 1.1 bouyer acard_udma_conf[drvp->UDMA_mode]);
240 1.1 bouyer }
241 1.1 bouyer idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
242 1.8 thorpej } else if ((wdc->cap & WDC_CAPABILITY_DMA) &&
243 1.1 bouyer (drvp->drive_flags & DRIVE_DMA)) {
244 1.1 bouyer /* use Multiword DMA */
245 1.1 bouyer drvp->drive_flags &= ~DRIVE_UDMA;
246 1.1 bouyer if (ACARD_IS_850(sc)) {
247 1.1 bouyer idetime |= ATP850_SETTIME(drive,
248 1.1 bouyer acard_act_dma[drvp->DMA_mode],
249 1.1 bouyer acard_rec_dma[drvp->DMA_mode]);
250 1.1 bouyer } else {
251 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
252 1.1 bouyer acard_act_dma[drvp->DMA_mode],
253 1.1 bouyer acard_rec_dma[drvp->DMA_mode]);
254 1.1 bouyer }
255 1.1 bouyer idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
256 1.1 bouyer } else {
257 1.1 bouyer /* PIO only */
258 1.1 bouyer drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
259 1.1 bouyer if (ACARD_IS_850(sc)) {
260 1.1 bouyer idetime |= ATP850_SETTIME(drive,
261 1.1 bouyer acard_act_pio[drvp->PIO_mode],
262 1.1 bouyer acard_rec_pio[drvp->PIO_mode]);
263 1.1 bouyer } else {
264 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
265 1.1 bouyer acard_act_pio[drvp->PIO_mode],
266 1.1 bouyer acard_rec_pio[drvp->PIO_mode]);
267 1.1 bouyer }
268 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
269 1.1 bouyer pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
270 1.1 bouyer | ATP8x0_CTRL_EN(channel));
271 1.1 bouyer }
272 1.1 bouyer }
273 1.1 bouyer
274 1.1 bouyer if (idedma_ctl != 0) {
275 1.1 bouyer /* Add software bits in status register */
276 1.6 fvdl bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
277 1.6 fvdl idedma_ctl);
278 1.1 bouyer }
279 1.1 bouyer
280 1.1 bouyer if (ACARD_IS_850(sc)) {
281 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag,
282 1.1 bouyer ATP850_IDETIME(channel), idetime);
283 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
284 1.1 bouyer } else {
285 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
286 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
287 1.1 bouyer }
288 1.1 bouyer }
289 1.1 bouyer
290 1.2 thorpej #if 0 /* XXX !! */
291 1.2 thorpej static int
292 1.2 thorpej acard_pci_intr(void *arg)
293 1.1 bouyer {
294 1.1 bouyer struct pciide_softc *sc = arg;
295 1.1 bouyer struct pciide_channel *cp;
296 1.11 thorpej struct ata_channel *wdc_cp;
297 1.1 bouyer int rv = 0;
298 1.1 bouyer int dmastat, i, crv;
299 1.1 bouyer
300 1.1 bouyer for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
301 1.6 fvdl cp = &sc->pciide_channels[i];
302 1.6 fvdl dmastat = bus_space_read_1(sc->sc_dma_iot,
303 1.6 fvdl cp->dma_iohs[IDEDMA_CTL], 0);
304 1.1 bouyer if ((dmastat & IDEDMA_CTL_INTR) == 0)
305 1.1 bouyer continue;
306 1.11 thorpej wdc_cp = &cp->ata_channel;
307 1.11 thorpej if ((wdc_cp->ch_flags & ATACH_IRQ_WAIT) == 0) {
308 1.1 bouyer (void)wdcintr(wdc_cp);
309 1.6 fvdl bus_space_write_1(sc->sc_dma_iot,
310 1.6 fvdl cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
311 1.1 bouyer continue;
312 1.1 bouyer }
313 1.1 bouyer crv = wdcintr(wdc_cp);
314 1.9 bouyer if (crv == 0) {
315 1.1 bouyer printf("%s:%d: bogus intr\n",
316 1.1 bouyer sc->sc_wdcdev.sc_dev.dv_xname, i);
317 1.9 bouyer bus_space_write_1(sc->sc_dma_iot,
318 1.9 bouyer cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
319 1.9 bouyer } else if (crv == 1)
320 1.1 bouyer rv = 1;
321 1.1 bouyer else if (rv == 0)
322 1.1 bouyer rv = crv;
323 1.1 bouyer }
324 1.1 bouyer return rv;
325 1.1 bouyer }
326 1.2 thorpej #endif
327