acardide.c revision 1.2 1 1.2 thorpej /* $NetBSD: acardide.c,v 1.2 2003/10/11 17:40:15 thorpej Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2001 Izumi Tsutsui.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer * 3. The name of the author may not be used to endorse or promote products
15 1.1 bouyer * derived from this software without specific prior written permission.
16 1.1 bouyer *
17 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 bouyer */
28 1.1 bouyer
29 1.1 bouyer #include <sys/param.h>
30 1.1 bouyer #include <sys/systm.h>
31 1.1 bouyer
32 1.1 bouyer #include <dev/pci/pcivar.h>
33 1.1 bouyer #include <dev/pci/pcidevs.h>
34 1.1 bouyer #include <dev/pci/pciidereg.h>
35 1.1 bouyer #include <dev/pci/pciidevar.h>
36 1.1 bouyer #include <dev/pci/pciide_acard_reg.h>
37 1.1 bouyer
38 1.2 thorpej static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*);
39 1.2 thorpej static void acard_setup_channel(struct channel_softc*);
40 1.2 thorpej #if 0 /* XXX !! */
41 1.2 thorpej static int acard_pci_intr(void *);
42 1.2 thorpej #endif
43 1.1 bouyer
44 1.2 thorpej static int acardide_match(struct device *, struct cfdata *, void *);
45 1.2 thorpej static void acardide_attach(struct device *, struct device *, void *);
46 1.1 bouyer
47 1.1 bouyer CFATTACH_DECL(acardide, sizeof(struct pciide_softc),
48 1.1 bouyer acardide_match, acardide_attach, NULL, NULL);
49 1.1 bouyer
50 1.2 thorpej static const struct pciide_product_desc pciide_acard_products[] = {
51 1.1 bouyer { PCI_PRODUCT_ACARD_ATP850U,
52 1.1 bouyer IDE_PCI_CLASS_OVERRIDE,
53 1.1 bouyer "Acard ATP850U Ultra33 IDE Controller",
54 1.1 bouyer acard_chip_map,
55 1.1 bouyer },
56 1.1 bouyer { PCI_PRODUCT_ACARD_ATP860,
57 1.1 bouyer IDE_PCI_CLASS_OVERRIDE,
58 1.1 bouyer "Acard ATP860 Ultra66 IDE Controller",
59 1.1 bouyer acard_chip_map,
60 1.1 bouyer },
61 1.1 bouyer { PCI_PRODUCT_ACARD_ATP860A,
62 1.1 bouyer IDE_PCI_CLASS_OVERRIDE,
63 1.1 bouyer "Acard ATP860-A Ultra66 IDE Controller",
64 1.1 bouyer acard_chip_map,
65 1.1 bouyer },
66 1.1 bouyer { 0,
67 1.1 bouyer 0,
68 1.1 bouyer NULL,
69 1.1 bouyer NULL
70 1.1 bouyer }
71 1.1 bouyer };
72 1.1 bouyer
73 1.2 thorpej static int
74 1.2 thorpej acardide_match(struct device *parent, struct cfdata *match, void *aux)
75 1.1 bouyer {
76 1.1 bouyer struct pci_attach_args *pa = aux;
77 1.1 bouyer
78 1.1 bouyer if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) {
79 1.1 bouyer if (pciide_lookup_product(pa->pa_id, pciide_acard_products))
80 1.1 bouyer return (2);
81 1.1 bouyer }
82 1.1 bouyer return (0);
83 1.1 bouyer }
84 1.1 bouyer
85 1.2 thorpej static void
86 1.2 thorpej acardide_attach(struct device *parent, struct device *self, void *aux)
87 1.1 bouyer {
88 1.1 bouyer struct pci_attach_args *pa = aux;
89 1.1 bouyer struct pciide_softc *sc = (struct pciide_softc *)self;
90 1.1 bouyer
91 1.1 bouyer pciide_common_attach(sc, pa,
92 1.1 bouyer pciide_lookup_product(pa->pa_id, pciide_acard_products));
93 1.1 bouyer
94 1.1 bouyer }
95 1.1 bouyer
96 1.1 bouyer #define ACARD_IS_850(sc) \
97 1.1 bouyer ((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
98 1.1 bouyer
99 1.2 thorpej static void
100 1.2 thorpej acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
101 1.1 bouyer {
102 1.1 bouyer struct pciide_channel *cp;
103 1.1 bouyer int i;
104 1.1 bouyer pcireg_t interface;
105 1.1 bouyer bus_size_t cmdsize, ctlsize;
106 1.1 bouyer
107 1.1 bouyer if (pciide_chipen(sc, pa) == 0)
108 1.1 bouyer return;
109 1.1 bouyer
110 1.1 bouyer /*
111 1.1 bouyer * when the chip is in native mode it identifies itself as a
112 1.1 bouyer * 'misc mass storage'. Fake interface in this case.
113 1.1 bouyer */
114 1.1 bouyer if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
115 1.1 bouyer interface = PCI_INTERFACE(pa->pa_class);
116 1.1 bouyer } else {
117 1.1 bouyer interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
118 1.1 bouyer PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
119 1.1 bouyer }
120 1.1 bouyer
121 1.1 bouyer aprint_normal("%s: bus-master DMA support present",
122 1.1 bouyer sc->sc_wdcdev.sc_dev.dv_xname);
123 1.1 bouyer pciide_mapreg_dma(sc, pa);
124 1.1 bouyer aprint_normal("\n");
125 1.1 bouyer sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
126 1.1 bouyer WDC_CAPABILITY_MODE;
127 1.1 bouyer
128 1.1 bouyer if (sc->sc_dma_ok) {
129 1.1 bouyer sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
130 1.1 bouyer sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
131 1.1 bouyer sc->sc_wdcdev.irqack = pciide_irqack;
132 1.1 bouyer }
133 1.1 bouyer sc->sc_wdcdev.PIO_cap = 4;
134 1.1 bouyer sc->sc_wdcdev.DMA_cap = 2;
135 1.1 bouyer sc->sc_wdcdev.UDMA_cap = ACARD_IS_850(sc) ? 2 : 4;
136 1.1 bouyer
137 1.1 bouyer sc->sc_wdcdev.set_modes = acard_setup_channel;
138 1.1 bouyer sc->sc_wdcdev.channels = sc->wdc_chanarray;
139 1.1 bouyer sc->sc_wdcdev.nchannels = 2;
140 1.1 bouyer
141 1.1 bouyer for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
142 1.1 bouyer cp = &sc->pciide_channels[i];
143 1.1 bouyer if (pciide_chansetup(sc, i, interface) == 0)
144 1.1 bouyer continue;
145 1.1 bouyer pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
146 1.1 bouyer pciide_pci_intr);
147 1.1 bouyer }
148 1.1 bouyer if (!ACARD_IS_850(sc)) {
149 1.1 bouyer u_int32_t reg;
150 1.1 bouyer reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
151 1.1 bouyer reg &= ~ATP860_CTRL_INT;
152 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
153 1.1 bouyer }
154 1.1 bouyer }
155 1.1 bouyer
156 1.2 thorpej static void
157 1.2 thorpej acard_setup_channel(struct channel_softc *chp)
158 1.1 bouyer {
159 1.1 bouyer struct ata_drive_datas *drvp;
160 1.1 bouyer struct pciide_channel *cp = (struct pciide_channel*)chp;
161 1.1 bouyer struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
162 1.1 bouyer int channel = chp->channel;
163 1.1 bouyer int drive;
164 1.1 bouyer u_int32_t idetime, udma_mode;
165 1.1 bouyer u_int32_t idedma_ctl;
166 1.1 bouyer
167 1.1 bouyer /* setup DMA if needed */
168 1.1 bouyer pciide_channel_dma_setup(cp);
169 1.1 bouyer
170 1.1 bouyer if (ACARD_IS_850(sc)) {
171 1.1 bouyer idetime = 0;
172 1.1 bouyer udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
173 1.1 bouyer udma_mode &= ~ATP850_UDMA_MASK(channel);
174 1.1 bouyer } else {
175 1.1 bouyer idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
176 1.1 bouyer idetime &= ~ATP860_SETTIME_MASK(channel);
177 1.1 bouyer udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
178 1.1 bouyer udma_mode &= ~ATP860_UDMA_MASK(channel);
179 1.1 bouyer
180 1.1 bouyer /* check 80 pins cable */
181 1.1 bouyer if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) ||
182 1.1 bouyer (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
183 1.1 bouyer if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
184 1.1 bouyer & ATP860_CTRL_80P(chp->channel)) {
185 1.1 bouyer if (chp->ch_drive[0].UDMA_mode > 2)
186 1.1 bouyer chp->ch_drive[0].UDMA_mode = 2;
187 1.1 bouyer if (chp->ch_drive[1].UDMA_mode > 2)
188 1.1 bouyer chp->ch_drive[1].UDMA_mode = 2;
189 1.1 bouyer }
190 1.1 bouyer }
191 1.1 bouyer }
192 1.1 bouyer
193 1.1 bouyer idedma_ctl = 0;
194 1.1 bouyer
195 1.1 bouyer /* Per drive settings */
196 1.1 bouyer for (drive = 0; drive < 2; drive++) {
197 1.1 bouyer drvp = &chp->ch_drive[drive];
198 1.1 bouyer /* If no drive, skip */
199 1.1 bouyer if ((drvp->drive_flags & DRIVE) == 0)
200 1.1 bouyer continue;
201 1.1 bouyer /* add timing values, setup DMA if needed */
202 1.1 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
203 1.1 bouyer (drvp->drive_flags & DRIVE_UDMA)) {
204 1.1 bouyer /* use Ultra/DMA */
205 1.1 bouyer if (ACARD_IS_850(sc)) {
206 1.1 bouyer idetime |= ATP850_SETTIME(drive,
207 1.1 bouyer acard_act_udma[drvp->UDMA_mode],
208 1.1 bouyer acard_rec_udma[drvp->UDMA_mode]);
209 1.1 bouyer udma_mode |= ATP850_UDMA_MODE(channel, drive,
210 1.1 bouyer acard_udma_conf[drvp->UDMA_mode]);
211 1.1 bouyer } else {
212 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
213 1.1 bouyer acard_act_udma[drvp->UDMA_mode],
214 1.1 bouyer acard_rec_udma[drvp->UDMA_mode]);
215 1.1 bouyer udma_mode |= ATP860_UDMA_MODE(channel, drive,
216 1.1 bouyer acard_udma_conf[drvp->UDMA_mode]);
217 1.1 bouyer }
218 1.1 bouyer idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
219 1.1 bouyer } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) &&
220 1.1 bouyer (drvp->drive_flags & DRIVE_DMA)) {
221 1.1 bouyer /* use Multiword DMA */
222 1.1 bouyer drvp->drive_flags &= ~DRIVE_UDMA;
223 1.1 bouyer if (ACARD_IS_850(sc)) {
224 1.1 bouyer idetime |= ATP850_SETTIME(drive,
225 1.1 bouyer acard_act_dma[drvp->DMA_mode],
226 1.1 bouyer acard_rec_dma[drvp->DMA_mode]);
227 1.1 bouyer } else {
228 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
229 1.1 bouyer acard_act_dma[drvp->DMA_mode],
230 1.1 bouyer acard_rec_dma[drvp->DMA_mode]);
231 1.1 bouyer }
232 1.1 bouyer idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
233 1.1 bouyer } else {
234 1.1 bouyer /* PIO only */
235 1.1 bouyer drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
236 1.1 bouyer if (ACARD_IS_850(sc)) {
237 1.1 bouyer idetime |= ATP850_SETTIME(drive,
238 1.1 bouyer acard_act_pio[drvp->PIO_mode],
239 1.1 bouyer acard_rec_pio[drvp->PIO_mode]);
240 1.1 bouyer } else {
241 1.1 bouyer idetime |= ATP860_SETTIME(channel, drive,
242 1.1 bouyer acard_act_pio[drvp->PIO_mode],
243 1.1 bouyer acard_rec_pio[drvp->PIO_mode]);
244 1.1 bouyer }
245 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
246 1.1 bouyer pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
247 1.1 bouyer | ATP8x0_CTRL_EN(channel));
248 1.1 bouyer }
249 1.1 bouyer }
250 1.1 bouyer
251 1.1 bouyer if (idedma_ctl != 0) {
252 1.1 bouyer /* Add software bits in status register */
253 1.1 bouyer bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
254 1.1 bouyer IDEDMA_CTL + IDEDMA_SCH_OFFSET * channel, idedma_ctl);
255 1.1 bouyer }
256 1.1 bouyer
257 1.1 bouyer if (ACARD_IS_850(sc)) {
258 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag,
259 1.1 bouyer ATP850_IDETIME(channel), idetime);
260 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
261 1.1 bouyer } else {
262 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
263 1.1 bouyer pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
264 1.1 bouyer }
265 1.1 bouyer }
266 1.1 bouyer
267 1.2 thorpej #if 0 /* XXX !! */
268 1.2 thorpej static int
269 1.2 thorpej acard_pci_intr(void *arg)
270 1.1 bouyer {
271 1.1 bouyer struct pciide_softc *sc = arg;
272 1.1 bouyer struct pciide_channel *cp;
273 1.1 bouyer struct channel_softc *wdc_cp;
274 1.1 bouyer int rv = 0;
275 1.1 bouyer int dmastat, i, crv;
276 1.1 bouyer
277 1.1 bouyer for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
278 1.1 bouyer dmastat = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
279 1.1 bouyer IDEDMA_CTL + IDEDMA_SCH_OFFSET * i);
280 1.1 bouyer if ((dmastat & IDEDMA_CTL_INTR) == 0)
281 1.1 bouyer continue;
282 1.1 bouyer cp = &sc->pciide_channels[i];
283 1.1 bouyer wdc_cp = &cp->wdc_channel;
284 1.1 bouyer if ((wdc_cp->ch_flags & WDCF_IRQ_WAIT) == 0) {
285 1.1 bouyer (void)wdcintr(wdc_cp);
286 1.1 bouyer bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
287 1.1 bouyer IDEDMA_CTL + IDEDMA_SCH_OFFSET * i, dmastat);
288 1.1 bouyer continue;
289 1.1 bouyer }
290 1.1 bouyer crv = wdcintr(wdc_cp);
291 1.1 bouyer if (crv == 0)
292 1.1 bouyer printf("%s:%d: bogus intr\n",
293 1.1 bouyer sc->sc_wdcdev.sc_dev.dv_xname, i);
294 1.1 bouyer else if (crv == 1)
295 1.1 bouyer rv = 1;
296 1.1 bouyer else if (rv == 0)
297 1.1 bouyer rv = crv;
298 1.1 bouyer }
299 1.1 bouyer return rv;
300 1.1 bouyer }
301 1.2 thorpej #endif
302