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acardide.c revision 1.21.40.2
      1  1.21.40.1      mjf /*	$NetBSD: acardide.c,v 1.21.40.2 2008/06/02 13:23:36 mjf Exp $	*/
      2        1.1   bouyer 
      3  1.21.40.2      mjf /*-
      4  1.21.40.2      mjf  * Copyright (c) 2001 Izumi Tsutsui.  All rights reserved.
      5        1.1   bouyer  *
      6        1.1   bouyer  * Redistribution and use in source and binary forms, with or without
      7        1.1   bouyer  * modification, are permitted provided that the following conditions
      8        1.1   bouyer  * are met:
      9        1.1   bouyer  * 1. Redistributions of source code must retain the above copyright
     10        1.1   bouyer  *    notice, this list of conditions and the following disclaimer.
     11        1.1   bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12        1.1   bouyer  *    notice, this list of conditions and the following disclaimer in the
     13        1.1   bouyer  *    documentation and/or other materials provided with the distribution.
     14        1.1   bouyer  *
     15        1.1   bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16        1.1   bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17        1.1   bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18        1.4  tsutsui  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19        1.1   bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20        1.1   bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21        1.1   bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22        1.1   bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23        1.1   bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24        1.1   bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25        1.1   bouyer  */
     26        1.1   bouyer 
     27       1.16    lukem #include <sys/cdefs.h>
     28  1.21.40.1      mjf __KERNEL_RCSID(0, "$NetBSD: acardide.c,v 1.21.40.2 2008/06/02 13:23:36 mjf Exp $");
     29       1.16    lukem 
     30        1.1   bouyer #include <sys/param.h>
     31        1.1   bouyer #include <sys/systm.h>
     32        1.1   bouyer 
     33        1.1   bouyer #include <dev/pci/pcivar.h>
     34        1.1   bouyer #include <dev/pci/pcidevs.h>
     35        1.1   bouyer #include <dev/pci/pciidereg.h>
     36        1.1   bouyer #include <dev/pci/pciidevar.h>
     37        1.1   bouyer #include <dev/pci/pciide_acard_reg.h>
     38        1.1   bouyer 
     39        1.2  thorpej static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*);
     40       1.11  thorpej static void acard_setup_channel(struct ata_channel*);
     41        1.2  thorpej #if 0 /* XXX !! */
     42        1.2  thorpej static int  acard_pci_intr(void *);
     43        1.2  thorpej #endif
     44        1.1   bouyer 
     45  1.21.40.1      mjf static int  acardide_match(device_t, cfdata_t, void *);
     46  1.21.40.1      mjf static void acardide_attach(device_t, device_t, void *);
     47        1.1   bouyer 
     48  1.21.40.1      mjf CFATTACH_DECL_NEW(acardide, sizeof(struct pciide_softc),
     49        1.1   bouyer     acardide_match, acardide_attach, NULL, NULL);
     50        1.1   bouyer 
     51        1.2  thorpej static const struct pciide_product_desc pciide_acard_products[] =  {
     52        1.1   bouyer 	{ PCI_PRODUCT_ACARD_ATP850U,
     53        1.3  mycroft 	  0,
     54        1.1   bouyer 	  "Acard ATP850U Ultra33 IDE Controller",
     55        1.1   bouyer 	  acard_chip_map,
     56        1.1   bouyer 	},
     57        1.1   bouyer 	{ PCI_PRODUCT_ACARD_ATP860,
     58        1.3  mycroft 	  0,
     59        1.1   bouyer 	  "Acard ATP860 Ultra66 IDE Controller",
     60        1.1   bouyer 	  acard_chip_map,
     61        1.1   bouyer 	},
     62        1.1   bouyer 	{ PCI_PRODUCT_ACARD_ATP860A,
     63        1.3  mycroft 	  0,
     64        1.1   bouyer 	  "Acard ATP860-A Ultra66 IDE Controller",
     65        1.1   bouyer 	  acard_chip_map,
     66        1.1   bouyer 	},
     67        1.5  tsutsui 	{ PCI_PRODUCT_ACARD_ATP865,
     68        1.5  tsutsui 	  0,
     69       1.17  tsutsui 	  "Acard ATP865 Ultra133 IDE Controller",
     70        1.5  tsutsui 	  acard_chip_map,
     71        1.5  tsutsui 	},
     72        1.5  tsutsui 	{ PCI_PRODUCT_ACARD_ATP865A,
     73        1.5  tsutsui 	  0,
     74       1.17  tsutsui 	  "Acard ATP865-A Ultra133 IDE Controller",
     75        1.5  tsutsui 	  acard_chip_map,
     76        1.5  tsutsui 	},
     77        1.1   bouyer 	{ 0,
     78        1.1   bouyer 	  0,
     79        1.1   bouyer 	  NULL,
     80        1.1   bouyer 	  NULL
     81        1.1   bouyer 	}
     82        1.1   bouyer };
     83        1.1   bouyer 
     84        1.2  thorpej static int
     85  1.21.40.1      mjf acardide_match(device_t parent, cfdata_t match, void *aux)
     86        1.1   bouyer {
     87        1.1   bouyer 	struct pci_attach_args *pa = aux;
     88        1.1   bouyer 
     89        1.1   bouyer 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) {
     90        1.1   bouyer 		if (pciide_lookup_product(pa->pa_id, pciide_acard_products))
     91        1.1   bouyer 			return (2);
     92        1.1   bouyer 	}
     93        1.1   bouyer 	return (0);
     94        1.1   bouyer }
     95        1.1   bouyer 
     96        1.2  thorpej static void
     97  1.21.40.1      mjf acardide_attach(device_t parent, device_t self, void *aux)
     98        1.1   bouyer {
     99        1.1   bouyer 	struct pci_attach_args *pa = aux;
    100  1.21.40.1      mjf 	struct pciide_softc *sc = device_private(self);
    101  1.21.40.1      mjf 
    102  1.21.40.1      mjf 	sc->sc_wdcdev.sc_atac.atac_dev = self;
    103        1.1   bouyer 
    104        1.1   bouyer 	pciide_common_attach(sc, pa,
    105        1.1   bouyer 	    pciide_lookup_product(pa->pa_id, pciide_acard_products));
    106        1.1   bouyer 
    107        1.1   bouyer }
    108        1.1   bouyer 
    109        1.1   bouyer #define	ACARD_IS_850(sc)						\
    110        1.1   bouyer 	((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
    111        1.1   bouyer 
    112        1.2  thorpej static void
    113        1.2  thorpej acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
    114        1.1   bouyer {
    115        1.1   bouyer 	struct pciide_channel *cp;
    116        1.1   bouyer 	int i;
    117        1.1   bouyer 	pcireg_t interface;
    118        1.1   bouyer 	bus_size_t cmdsize, ctlsize;
    119        1.1   bouyer 
    120        1.1   bouyer 	if (pciide_chipen(sc, pa) == 0)
    121        1.1   bouyer 		return;
    122        1.1   bouyer 
    123        1.4  tsutsui 	/*
    124        1.1   bouyer 	 * when the chip is in native mode it identifies itself as a
    125        1.1   bouyer 	 * 'misc mass storage'. Fake interface in this case.
    126        1.1   bouyer 	 */
    127        1.1   bouyer 	if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
    128        1.1   bouyer 		interface = PCI_INTERFACE(pa->pa_class);
    129        1.1   bouyer 	} else {
    130        1.1   bouyer 		interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
    131        1.1   bouyer 		    PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
    132        1.1   bouyer 	}
    133        1.1   bouyer 
    134  1.21.40.1      mjf 	aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
    135  1.21.40.1      mjf 	    "bus-master DMA support present");
    136        1.1   bouyer 	pciide_mapreg_dma(sc, pa);
    137       1.21       ad 	aprint_verbose("\n");
    138       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
    139        1.1   bouyer 
    140        1.1   bouyer 	if (sc->sc_dma_ok) {
    141       1.13  thorpej 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    142        1.1   bouyer 		sc->sc_wdcdev.irqack = pciide_irqack;
    143        1.1   bouyer 	}
    144       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    145       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    146        1.5  tsutsui 	switch (sc->sc_pp->ide_product) {
    147        1.5  tsutsui 	case PCI_PRODUCT_ACARD_ATP860:
    148        1.5  tsutsui 	case PCI_PRODUCT_ACARD_ATP860A:
    149       1.13  thorpej 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 4;
    150        1.5  tsutsui 		break;
    151        1.5  tsutsui 	case PCI_PRODUCT_ACARD_ATP865:
    152        1.5  tsutsui 	case PCI_PRODUCT_ACARD_ATP865A:
    153       1.15  tsutsui 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
    154        1.5  tsutsui 		break;
    155        1.5  tsutsui 	default:
    156       1.13  thorpej 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
    157        1.5  tsutsui 		break;
    158        1.5  tsutsui 	}
    159        1.1   bouyer 
    160       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_set_modes = acard_setup_channel;
    161       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
    162       1.13  thorpej 	sc->sc_wdcdev.sc_atac.atac_nchannels = 2;
    163        1.1   bouyer 
    164       1.11  thorpej 	wdc_allocate_regs(&sc->sc_wdcdev);
    165       1.11  thorpej 
    166       1.13  thorpej 	for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
    167        1.1   bouyer 		cp = &sc->pciide_channels[i];
    168        1.1   bouyer 		if (pciide_chansetup(sc, i, interface) == 0)
    169        1.1   bouyer 			continue;
    170        1.1   bouyer 		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
    171        1.1   bouyer 		    pciide_pci_intr);
    172        1.1   bouyer 	}
    173        1.1   bouyer 	if (!ACARD_IS_850(sc)) {
    174        1.1   bouyer 		u_int32_t reg;
    175        1.1   bouyer 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
    176        1.1   bouyer 		reg &= ~ATP860_CTRL_INT;
    177        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
    178        1.1   bouyer 	}
    179        1.1   bouyer }
    180        1.1   bouyer 
    181        1.2  thorpej static void
    182       1.11  thorpej acard_setup_channel(struct ata_channel *chp)
    183        1.1   bouyer {
    184        1.1   bouyer 	struct ata_drive_datas *drvp;
    185       1.13  thorpej 	struct atac_softc *atac = chp->ch_atac;
    186       1.12  thorpej 	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
    187       1.12  thorpej 	struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
    188        1.8  thorpej 	int channel = chp->ch_channel;
    189       1.14  thorpej 	int drive, s;
    190        1.1   bouyer 	u_int32_t idetime, udma_mode;
    191        1.1   bouyer 	u_int32_t idedma_ctl;
    192        1.1   bouyer 
    193        1.1   bouyer 	/* setup DMA if needed */
    194        1.1   bouyer 	pciide_channel_dma_setup(cp);
    195        1.1   bouyer 
    196        1.1   bouyer 	if (ACARD_IS_850(sc)) {
    197        1.1   bouyer 		idetime = 0;
    198        1.1   bouyer 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
    199        1.1   bouyer 		udma_mode &= ~ATP850_UDMA_MASK(channel);
    200        1.1   bouyer 	} else {
    201        1.1   bouyer 		idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
    202        1.1   bouyer 		idetime &= ~ATP860_SETTIME_MASK(channel);
    203        1.1   bouyer 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
    204        1.1   bouyer 		udma_mode &= ~ATP860_UDMA_MASK(channel);
    205        1.1   bouyer 
    206        1.1   bouyer 		/* check 80 pins cable */
    207        1.1   bouyer 		if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) ||
    208        1.1   bouyer 		    (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
    209        1.1   bouyer 			if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
    210        1.8  thorpej 			    & ATP860_CTRL_80P(chp->ch_channel)) {
    211        1.1   bouyer 				if (chp->ch_drive[0].UDMA_mode > 2)
    212        1.1   bouyer 					chp->ch_drive[0].UDMA_mode = 2;
    213        1.1   bouyer 				if (chp->ch_drive[1].UDMA_mode > 2)
    214        1.1   bouyer 					chp->ch_drive[1].UDMA_mode = 2;
    215        1.1   bouyer 			}
    216        1.1   bouyer 		}
    217        1.1   bouyer 	}
    218        1.1   bouyer 
    219        1.1   bouyer 	idedma_ctl = 0;
    220        1.1   bouyer 
    221        1.1   bouyer 	/* Per drive settings */
    222        1.1   bouyer 	for (drive = 0; drive < 2; drive++) {
    223        1.1   bouyer 		drvp = &chp->ch_drive[drive];
    224        1.1   bouyer 		/* If no drive, skip */
    225        1.1   bouyer 		if ((drvp->drive_flags & DRIVE) == 0)
    226        1.1   bouyer 			continue;
    227        1.1   bouyer 		/* add timing values, setup DMA if needed */
    228       1.13  thorpej 		if ((atac->atac_cap & ATAC_CAP_UDMA) &&
    229        1.1   bouyer 		    (drvp->drive_flags & DRIVE_UDMA)) {
    230        1.1   bouyer 			/* use Ultra/DMA */
    231        1.1   bouyer 			if (ACARD_IS_850(sc)) {
    232        1.1   bouyer 				idetime |= ATP850_SETTIME(drive,
    233        1.1   bouyer 				    acard_act_udma[drvp->UDMA_mode],
    234        1.1   bouyer 				    acard_rec_udma[drvp->UDMA_mode]);
    235        1.1   bouyer 				udma_mode |= ATP850_UDMA_MODE(channel, drive,
    236        1.1   bouyer 				    acard_udma_conf[drvp->UDMA_mode]);
    237        1.1   bouyer 			} else {
    238        1.1   bouyer 				idetime |= ATP860_SETTIME(channel, drive,
    239        1.1   bouyer 				    acard_act_udma[drvp->UDMA_mode],
    240        1.1   bouyer 				    acard_rec_udma[drvp->UDMA_mode]);
    241        1.1   bouyer 				udma_mode |= ATP860_UDMA_MODE(channel, drive,
    242        1.1   bouyer 				    acard_udma_conf[drvp->UDMA_mode]);
    243        1.1   bouyer 			}
    244        1.1   bouyer 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
    245       1.13  thorpej 		} else if ((atac->atac_cap & ATAC_CAP_DMA) &&
    246        1.1   bouyer 		    (drvp->drive_flags & DRIVE_DMA)) {
    247        1.1   bouyer 			/* use Multiword DMA */
    248       1.14  thorpej 			s = splbio();
    249        1.1   bouyer 			drvp->drive_flags &= ~DRIVE_UDMA;
    250       1.14  thorpej 			splx(s);
    251        1.1   bouyer 			if (ACARD_IS_850(sc)) {
    252        1.1   bouyer 				idetime |= ATP850_SETTIME(drive,
    253        1.1   bouyer 				    acard_act_dma[drvp->DMA_mode],
    254        1.1   bouyer 				    acard_rec_dma[drvp->DMA_mode]);
    255        1.1   bouyer 			} else {
    256        1.1   bouyer 				idetime |= ATP860_SETTIME(channel, drive,
    257        1.1   bouyer 				    acard_act_dma[drvp->DMA_mode],
    258        1.1   bouyer 				    acard_rec_dma[drvp->DMA_mode]);
    259        1.1   bouyer 			}
    260        1.1   bouyer 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
    261        1.1   bouyer 		} else {
    262        1.1   bouyer 			/* PIO only */
    263       1.14  thorpej 			s = splbio();
    264        1.1   bouyer 			drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
    265       1.14  thorpej 			splx(s);
    266        1.1   bouyer 			if (ACARD_IS_850(sc)) {
    267        1.1   bouyer 				idetime |= ATP850_SETTIME(drive,
    268        1.1   bouyer 				    acard_act_pio[drvp->PIO_mode],
    269        1.1   bouyer 				    acard_rec_pio[drvp->PIO_mode]);
    270        1.1   bouyer 			} else {
    271        1.1   bouyer 				idetime |= ATP860_SETTIME(channel, drive,
    272        1.1   bouyer 				    acard_act_pio[drvp->PIO_mode],
    273        1.1   bouyer 				    acard_rec_pio[drvp->PIO_mode]);
    274        1.1   bouyer 			}
    275        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
    276        1.1   bouyer 		    pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
    277        1.1   bouyer 		    | ATP8x0_CTRL_EN(channel));
    278        1.1   bouyer 		}
    279        1.1   bouyer 	}
    280        1.1   bouyer 
    281        1.1   bouyer 	if (idedma_ctl != 0) {
    282        1.1   bouyer 		/* Add software bits in status register */
    283        1.6     fvdl 		bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
    284        1.6     fvdl 		    idedma_ctl);
    285        1.1   bouyer 	}
    286        1.1   bouyer 
    287        1.1   bouyer 	if (ACARD_IS_850(sc)) {
    288        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag,
    289        1.1   bouyer 		    ATP850_IDETIME(channel), idetime);
    290        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
    291        1.1   bouyer 	} else {
    292        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
    293        1.1   bouyer 		pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
    294        1.1   bouyer 	}
    295        1.1   bouyer }
    296        1.1   bouyer 
    297        1.2  thorpej #if 0 /* XXX !! */
    298        1.2  thorpej static int
    299        1.2  thorpej acard_pci_intr(void *arg)
    300        1.1   bouyer {
    301        1.1   bouyer 	struct pciide_softc *sc = arg;
    302        1.1   bouyer 	struct pciide_channel *cp;
    303       1.11  thorpej 	struct ata_channel *wdc_cp;
    304        1.1   bouyer 	int rv = 0;
    305        1.1   bouyer 	int dmastat, i, crv;
    306        1.1   bouyer 
    307       1.13  thorpej 	for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
    308        1.6     fvdl 		cp = &sc->pciide_channels[i];
    309        1.6     fvdl 		dmastat = bus_space_read_1(sc->sc_dma_iot,
    310        1.6     fvdl 		    cp->dma_iohs[IDEDMA_CTL], 0);
    311        1.1   bouyer 		if ((dmastat & IDEDMA_CTL_INTR) == 0)
    312        1.1   bouyer 			continue;
    313       1.11  thorpej 		wdc_cp = &cp->ata_channel;
    314       1.11  thorpej 		if ((wdc_cp->ch_flags & ATACH_IRQ_WAIT) == 0) {
    315        1.1   bouyer 			(void)wdcintr(wdc_cp);
    316        1.6     fvdl 			bus_space_write_1(sc->sc_dma_iot,
    317        1.6     fvdl 			    cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
    318        1.1   bouyer 			continue;
    319        1.1   bouyer 		}
    320        1.1   bouyer 		crv = wdcintr(wdc_cp);
    321        1.9   bouyer 		if (crv == 0) {
    322        1.1   bouyer 			printf("%s:%d: bogus intr\n",
    323  1.21.40.1      mjf 			    device_xname(sc->sc_wdcdev.sc_atac.atac_dev), i);
    324        1.9   bouyer 			bus_space_write_1(sc->sc_dma_iot,
    325        1.9   bouyer 			    cp->dma_iohs[IDEDMA_CTL], 0, dmastat);
    326        1.9   bouyer 		} else if (crv == 1)
    327        1.1   bouyer 			rv = 1;
    328        1.1   bouyer 		else if (rv == 0)
    329        1.1   bouyer 			rv = crv;
    330        1.1   bouyer 	}
    331        1.1   bouyer 	return rv;
    332        1.1   bouyer }
    333        1.2  thorpej #endif
    334