acardide.c revision 1.2
1 /* $NetBSD: acardide.c,v 1.2 2003/10/11 17:40:15 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Izumi Tsutsui. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 32 #include <dev/pci/pcivar.h> 33 #include <dev/pci/pcidevs.h> 34 #include <dev/pci/pciidereg.h> 35 #include <dev/pci/pciidevar.h> 36 #include <dev/pci/pciide_acard_reg.h> 37 38 static void acard_chip_map(struct pciide_softc*, struct pci_attach_args*); 39 static void acard_setup_channel(struct channel_softc*); 40 #if 0 /* XXX !! */ 41 static int acard_pci_intr(void *); 42 #endif 43 44 static int acardide_match(struct device *, struct cfdata *, void *); 45 static void acardide_attach(struct device *, struct device *, void *); 46 47 CFATTACH_DECL(acardide, sizeof(struct pciide_softc), 48 acardide_match, acardide_attach, NULL, NULL); 49 50 static const struct pciide_product_desc pciide_acard_products[] = { 51 { PCI_PRODUCT_ACARD_ATP850U, 52 IDE_PCI_CLASS_OVERRIDE, 53 "Acard ATP850U Ultra33 IDE Controller", 54 acard_chip_map, 55 }, 56 { PCI_PRODUCT_ACARD_ATP860, 57 IDE_PCI_CLASS_OVERRIDE, 58 "Acard ATP860 Ultra66 IDE Controller", 59 acard_chip_map, 60 }, 61 { PCI_PRODUCT_ACARD_ATP860A, 62 IDE_PCI_CLASS_OVERRIDE, 63 "Acard ATP860-A Ultra66 IDE Controller", 64 acard_chip_map, 65 }, 66 { 0, 67 0, 68 NULL, 69 NULL 70 } 71 }; 72 73 static int 74 acardide_match(struct device *parent, struct cfdata *match, void *aux) 75 { 76 struct pci_attach_args *pa = aux; 77 78 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ACARD) { 79 if (pciide_lookup_product(pa->pa_id, pciide_acard_products)) 80 return (2); 81 } 82 return (0); 83 } 84 85 static void 86 acardide_attach(struct device *parent, struct device *self, void *aux) 87 { 88 struct pci_attach_args *pa = aux; 89 struct pciide_softc *sc = (struct pciide_softc *)self; 90 91 pciide_common_attach(sc, pa, 92 pciide_lookup_product(pa->pa_id, pciide_acard_products)); 93 94 } 95 96 #define ACARD_IS_850(sc) \ 97 ((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U) 98 99 static void 100 acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 101 { 102 struct pciide_channel *cp; 103 int i; 104 pcireg_t interface; 105 bus_size_t cmdsize, ctlsize; 106 107 if (pciide_chipen(sc, pa) == 0) 108 return; 109 110 /* 111 * when the chip is in native mode it identifies itself as a 112 * 'misc mass storage'. Fake interface in this case. 113 */ 114 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) { 115 interface = PCI_INTERFACE(pa->pa_class); 116 } else { 117 interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | 118 PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 119 } 120 121 aprint_normal("%s: bus-master DMA support present", 122 sc->sc_wdcdev.sc_dev.dv_xname); 123 pciide_mapreg_dma(sc, pa); 124 aprint_normal("\n"); 125 sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 | 126 WDC_CAPABILITY_MODE; 127 128 if (sc->sc_dma_ok) { 129 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA; 130 sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK; 131 sc->sc_wdcdev.irqack = pciide_irqack; 132 } 133 sc->sc_wdcdev.PIO_cap = 4; 134 sc->sc_wdcdev.DMA_cap = 2; 135 sc->sc_wdcdev.UDMA_cap = ACARD_IS_850(sc) ? 2 : 4; 136 137 sc->sc_wdcdev.set_modes = acard_setup_channel; 138 sc->sc_wdcdev.channels = sc->wdc_chanarray; 139 sc->sc_wdcdev.nchannels = 2; 140 141 for (i = 0; i < sc->sc_wdcdev.nchannels; i++) { 142 cp = &sc->pciide_channels[i]; 143 if (pciide_chansetup(sc, i, interface) == 0) 144 continue; 145 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 146 pciide_pci_intr); 147 } 148 if (!ACARD_IS_850(sc)) { 149 u_int32_t reg; 150 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL); 151 reg &= ~ATP860_CTRL_INT; 152 pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg); 153 } 154 } 155 156 static void 157 acard_setup_channel(struct channel_softc *chp) 158 { 159 struct ata_drive_datas *drvp; 160 struct pciide_channel *cp = (struct pciide_channel*)chp; 161 struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc; 162 int channel = chp->channel; 163 int drive; 164 u_int32_t idetime, udma_mode; 165 u_int32_t idedma_ctl; 166 167 /* setup DMA if needed */ 168 pciide_channel_dma_setup(cp); 169 170 if (ACARD_IS_850(sc)) { 171 idetime = 0; 172 udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA); 173 udma_mode &= ~ATP850_UDMA_MASK(channel); 174 } else { 175 idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME); 176 idetime &= ~ATP860_SETTIME_MASK(channel); 177 udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA); 178 udma_mode &= ~ATP860_UDMA_MASK(channel); 179 180 /* check 80 pins cable */ 181 if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) || 182 (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) { 183 if (pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL) 184 & ATP860_CTRL_80P(chp->channel)) { 185 if (chp->ch_drive[0].UDMA_mode > 2) 186 chp->ch_drive[0].UDMA_mode = 2; 187 if (chp->ch_drive[1].UDMA_mode > 2) 188 chp->ch_drive[1].UDMA_mode = 2; 189 } 190 } 191 } 192 193 idedma_ctl = 0; 194 195 /* Per drive settings */ 196 for (drive = 0; drive < 2; drive++) { 197 drvp = &chp->ch_drive[drive]; 198 /* If no drive, skip */ 199 if ((drvp->drive_flags & DRIVE) == 0) 200 continue; 201 /* add timing values, setup DMA if needed */ 202 if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) && 203 (drvp->drive_flags & DRIVE_UDMA)) { 204 /* use Ultra/DMA */ 205 if (ACARD_IS_850(sc)) { 206 idetime |= ATP850_SETTIME(drive, 207 acard_act_udma[drvp->UDMA_mode], 208 acard_rec_udma[drvp->UDMA_mode]); 209 udma_mode |= ATP850_UDMA_MODE(channel, drive, 210 acard_udma_conf[drvp->UDMA_mode]); 211 } else { 212 idetime |= ATP860_SETTIME(channel, drive, 213 acard_act_udma[drvp->UDMA_mode], 214 acard_rec_udma[drvp->UDMA_mode]); 215 udma_mode |= ATP860_UDMA_MODE(channel, drive, 216 acard_udma_conf[drvp->UDMA_mode]); 217 } 218 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 219 } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) && 220 (drvp->drive_flags & DRIVE_DMA)) { 221 /* use Multiword DMA */ 222 drvp->drive_flags &= ~DRIVE_UDMA; 223 if (ACARD_IS_850(sc)) { 224 idetime |= ATP850_SETTIME(drive, 225 acard_act_dma[drvp->DMA_mode], 226 acard_rec_dma[drvp->DMA_mode]); 227 } else { 228 idetime |= ATP860_SETTIME(channel, drive, 229 acard_act_dma[drvp->DMA_mode], 230 acard_rec_dma[drvp->DMA_mode]); 231 } 232 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 233 } else { 234 /* PIO only */ 235 drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA); 236 if (ACARD_IS_850(sc)) { 237 idetime |= ATP850_SETTIME(drive, 238 acard_act_pio[drvp->PIO_mode], 239 acard_rec_pio[drvp->PIO_mode]); 240 } else { 241 idetime |= ATP860_SETTIME(channel, drive, 242 acard_act_pio[drvp->PIO_mode], 243 acard_rec_pio[drvp->PIO_mode]); 244 } 245 pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, 246 pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL) 247 | ATP8x0_CTRL_EN(channel)); 248 } 249 } 250 251 if (idedma_ctl != 0) { 252 /* Add software bits in status register */ 253 bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, 254 IDEDMA_CTL + IDEDMA_SCH_OFFSET * channel, idedma_ctl); 255 } 256 257 if (ACARD_IS_850(sc)) { 258 pci_conf_write(sc->sc_pc, sc->sc_tag, 259 ATP850_IDETIME(channel), idetime); 260 pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode); 261 } else { 262 pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime); 263 pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode); 264 } 265 } 266 267 #if 0 /* XXX !! */ 268 static int 269 acard_pci_intr(void *arg) 270 { 271 struct pciide_softc *sc = arg; 272 struct pciide_channel *cp; 273 struct channel_softc *wdc_cp; 274 int rv = 0; 275 int dmastat, i, crv; 276 277 for (i = 0; i < sc->sc_wdcdev.nchannels; i++) { 278 dmastat = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, 279 IDEDMA_CTL + IDEDMA_SCH_OFFSET * i); 280 if ((dmastat & IDEDMA_CTL_INTR) == 0) 281 continue; 282 cp = &sc->pciide_channels[i]; 283 wdc_cp = &cp->wdc_channel; 284 if ((wdc_cp->ch_flags & WDCF_IRQ_WAIT) == 0) { 285 (void)wdcintr(wdc_cp); 286 bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, 287 IDEDMA_CTL + IDEDMA_SCH_OFFSET * i, dmastat); 288 continue; 289 } 290 crv = wdcintr(wdc_cp); 291 if (crv == 0) 292 printf("%s:%d: bogus intr\n", 293 sc->sc_wdcdev.sc_dev.dv_xname, i); 294 else if (crv == 1) 295 rv = 1; 296 else if (rv == 0) 297 rv = crv; 298 } 299 return rv; 300 } 301 #endif 302
Indexes created Mon Sep 22 05:09:51 GMT 2025