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adv_pci.c revision 1.26.12.2
      1  1.26.12.2      yamt /*	$NetBSD: adv_pci.c,v 1.26.12.2 2014/05/22 11:40:24 yamt Exp $	*/
      2        1.2     dante 
      3        1.1     dante /*
      4        1.1     dante  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
      5       1.16     perry  *
      6        1.1     dante  * Author: Baldassare Dante Profeta <dante (at) mclink.it>
      7       1.16     perry  *
      8        1.1     dante  * Redistribution and use in source and binary forms, with or without
      9        1.3     dante  * modification, are permitted provided that the following conditions
     10        1.3     dante  * are met:
     11        1.3     dante  * 1. Redistributions of source code must retain the above copyright
     12        1.3     dante  *    notice, this list of conditions and the following disclaimer.
     13        1.3     dante  * 2. Redistributions in binary form must reproduce the above copyright
     14        1.3     dante  *    notice, this list of conditions and the following disclaimer in the
     15        1.3     dante  *    documentation and/or other materials provided with the distribution.
     16        1.4     dante  *
     17        1.1     dante  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     18        1.4     dante  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     19        1.4     dante  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     20        1.4     dante  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     21        1.4     dante  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     22        1.4     dante  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     23        1.4     dante  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     24        1.4     dante  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     25        1.4     dante  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     26        1.4     dante  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     27        1.4     dante  * POSSIBILITY OF SUCH DAMAGE.
     28        1.1     dante  */
     29        1.1     dante /*
     30        1.1     dante  * Device probe and attach routines for the following
     31        1.1     dante  * Advanced Systems Inc. SCSI controllers:
     32        1.1     dante  *
     33        1.1     dante  *    Connectivity Products:
     34        1.1     dante  *      ABP920 - Bus-Master PCI (16 CDB)
     35        1.5     dante  *      ABP930 - Bus-Master PCI (16 CDB)		(Footnote 1)
     36        1.1     dante  *      ABP930U - Bus-Master PCI Ultra (16 CDB)
     37        1.1     dante  *      ABP930UA - Bus-Master PCI Ultra (16 CDB)
     38        1.5     dante  *      ABP960 - Bus-Master PCI MAC/PC (16 CDB)		(Footnote 2)
     39        1.5     dante  *      ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB)	(Footnote 2)
     40        1.1     dante  *
     41        1.1     dante  *   Single Channel Products:
     42        1.1     dante  *      ABP940 - Bus-Master PCI (240 CDB)
     43        1.1     dante  *      ABP940U - Bus-Master PCI Ultra (240 CDB)
     44        1.1     dante  *      ABP970 - Bus-Master PCI MAC/PC (240 CDB)
     45        1.1     dante  *      ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
     46        1.1     dante  *      ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB)
     47        1.1     dante  *
     48        1.1     dante  *   Multi Channel Products:
     49        1.1     dante  *      ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
     50        1.1     dante  *      ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel)
     51        1.1     dante  *      ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel)
     52        1.1     dante  *
     53        1.1     dante  *   Footnotes:
     54        1.5     dante  *     1. This board has been sold by SIIG as the Fast SCSI Pro PCI.
     55        1.5     dante  *     2. This board has been sold by Iomega as a Jaz Jet PCI adapter.
     56        1.1     dante  */
     57        1.9     lukem 
     58        1.9     lukem #include <sys/cdefs.h>
     59  1.26.12.2      yamt __KERNEL_RCSID(0, "$NetBSD: adv_pci.c,v 1.26.12.2 2014/05/22 11:40:24 yamt Exp $");
     60        1.1     dante 
     61        1.1     dante #include <sys/param.h>
     62        1.1     dante #include <sys/systm.h>
     63        1.1     dante #include <sys/malloc.h>
     64        1.1     dante #include <sys/kernel.h>
     65        1.1     dante #include <sys/queue.h>
     66        1.1     dante #include <sys/device.h>
     67        1.1     dante 
     68       1.21        ad #include <sys/bus.h>
     69       1.21        ad #include <sys/intr.h>
     70        1.1     dante 
     71        1.1     dante #include <dev/scsipi/scsi_all.h>
     72        1.1     dante #include <dev/scsipi/scsipi_all.h>
     73        1.1     dante #include <dev/scsipi/scsiconf.h>
     74        1.1     dante 
     75        1.1     dante #include <dev/pci/pcireg.h>
     76        1.1     dante #include <dev/pci/pcivar.h>
     77        1.1     dante #include <dev/pci/pcidevs.h>
     78        1.1     dante 
     79        1.6     dante #include <dev/ic/advlib.h>
     80        1.1     dante #include <dev/ic/adv.h>
     81        1.1     dante 
     82        1.1     dante /******************************************************************************/
     83        1.1     dante 
     84        1.1     dante #define PCI_BASEADR_IO        0x10
     85        1.1     dante 
     86        1.1     dante /******************************************************************************/
     87        1.1     dante /*
     88        1.1     dante  * Check the slots looking for a board we recognise
     89        1.1     dante  * If we find one, note it's address (slot) and call
     90        1.1     dante  * the actual probe routine to check it out.
     91        1.1     dante  */
     92       1.17   thorpej static int
     93       1.25    cegger adv_pci_match(device_t parent, cfdata_t match, void *aux)
     94        1.1     dante {
     95        1.1     dante 	struct pci_attach_args *pa = aux;
     96        1.1     dante 
     97        1.1     dante 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
     98        1.1     dante 		switch (PCI_PRODUCT(pa->pa_id)) {
     99        1.1     dante 		case PCI_PRODUCT_ADVSYS_1200A:
    100        1.1     dante 		case PCI_PRODUCT_ADVSYS_1200B:
    101        1.1     dante 		case PCI_PRODUCT_ADVSYS_ULTRA:
    102        1.1     dante 			return (1);
    103        1.1     dante 		}
    104        1.1     dante 
    105        1.1     dante 	return 0;
    106        1.1     dante }
    107        1.1     dante 
    108       1.17   thorpej static void
    109       1.25    cegger adv_pci_attach(device_t parent, device_t self, void *aux)
    110        1.1     dante {
    111        1.1     dante 	struct pci_attach_args *pa = aux;
    112  1.26.12.1      yamt 	ASC_SOFTC      *sc = device_private(self);
    113        1.1     dante 	bus_space_tag_t iot;
    114        1.1     dante 	bus_space_handle_t ioh;
    115        1.1     dante 	pci_intr_handle_t ih;
    116        1.1     dante 	pci_chipset_tag_t pc = pa->pa_pc;
    117        1.1     dante 	u_int32_t       command;
    118        1.1     dante 	const char     *intrstr;
    119  1.26.12.2      yamt 	char intrbuf[PCI_INTRSTR_LEN];
    120        1.1     dante 
    121       1.14   thorpej 	aprint_naive(": SCSI controller\n");
    122        1.1     dante 
    123  1.26.12.1      yamt 	sc->sc_dev = self;
    124        1.1     dante 	sc->sc_flags = 0x0;
    125        1.1     dante 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
    126        1.1     dante 		switch (PCI_PRODUCT(pa->pa_id)) {
    127        1.1     dante 		case PCI_PRODUCT_ADVSYS_1200A:
    128       1.14   thorpej 			aprint_normal(": AdvanSys ASC1200A SCSI adapter\n");
    129        1.1     dante 			break;
    130        1.1     dante 
    131        1.1     dante 		case PCI_PRODUCT_ADVSYS_1200B:
    132       1.14   thorpej 			aprint_normal(": AdvanSys ASC1200B SCSI adapter\n");
    133        1.1     dante 			break;
    134        1.1     dante 
    135        1.1     dante 		case PCI_PRODUCT_ADVSYS_ULTRA:
    136        1.1     dante 			switch (PCI_REVISION(pa->pa_class)) {
    137        1.1     dante 			case ASC_PCI_REVISION_3050:
    138       1.14   thorpej 				aprint_normal(
    139       1.14   thorpej 				    ": AdvanSys ABP-9xxUA SCSI adapter\n");
    140        1.1     dante 				break;
    141        1.1     dante 
    142        1.1     dante 			case ASC_PCI_REVISION_3150:
    143       1.14   thorpej 				aprint_normal(
    144       1.14   thorpej 				    ": AdvanSys ABP-9xxU SCSI adapter\n");
    145        1.1     dante 				break;
    146        1.1     dante 			}
    147        1.1     dante 			break;
    148        1.1     dante 
    149        1.1     dante 		default:
    150       1.14   thorpej 			aprint_error(": unknown model!\n");
    151        1.1     dante 			return;
    152        1.1     dante 		}
    153        1.1     dante 
    154        1.1     dante 
    155        1.1     dante 	/*
    156        1.1     dante 	 * Make sure IO/MEM/MASTER are enabled
    157        1.1     dante 	 */
    158        1.1     dante 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    159        1.1     dante 	if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    160        1.1     dante 			PCI_COMMAND_MASTER_ENABLE)) !=
    161        1.1     dante 	    (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    162        1.1     dante 	     PCI_COMMAND_MASTER_ENABLE)) {
    163        1.1     dante 		pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
    164        1.1     dante 		 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    165        1.1     dante 			    PCI_COMMAND_MASTER_ENABLE));
    166        1.1     dante 	}
    167        1.1     dante 	/*
    168        1.1     dante 	 * Latency timer settings.
    169        1.1     dante 	 */
    170        1.1     dante 	{
    171        1.1     dante 		u_int32_t       bhlcr;
    172        1.1     dante 
    173        1.1     dante 		bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
    174        1.1     dante 
    175        1.1     dante 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A ||
    176        1.1     dante 		    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) {
    177        1.1     dante 			bhlcr &= 0xFFFF00FFul;
    178        1.4     dante 			pci_conf_write(pa->pa_pc, pa->pa_tag,
    179        1.4     dante 					PCI_BHLC_REG, bhlcr);
    180        1.7     dante 		} else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA)
    181        1.7     dante 			    && (PCI_LATTIMER(bhlcr) < 0x20)) {
    182        1.1     dante 			bhlcr &= 0xFFFF00FFul;
    183        1.1     dante 			bhlcr |= 0x00002000ul;
    184        1.4     dante 			pci_conf_write(pa->pa_pc, pa->pa_tag,
    185        1.4     dante 					PCI_BHLC_REG, bhlcr);
    186        1.1     dante 		}
    187        1.1     dante 	}
    188        1.1     dante 
    189        1.1     dante 
    190        1.1     dante 	/*
    191        1.1     dante 	 * Map Device Registers for I/O
    192        1.1     dante 	 */
    193        1.1     dante 	if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0,
    194        1.1     dante 			&iot, &ioh, NULL, NULL)) {
    195  1.26.12.1      yamt 		aprint_error_dev(sc->sc_dev, "unable to map device registers\n");
    196        1.1     dante 		return;
    197        1.1     dante 	}
    198        1.7     dante 
    199        1.7     dante 	ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT);
    200        1.7     dante 	ASC_SET_CHIP_STATUS(iot, ioh, 0);
    201        1.7     dante 
    202        1.1     dante 	sc->sc_iot = iot;
    203        1.1     dante 	sc->sc_ioh = ioh;
    204        1.1     dante 	sc->sc_dmat = pa->pa_dmat;
    205        1.1     dante 	sc->pci_device_id = pa->pa_id;
    206        1.1     dante 	sc->bus_type = ASC_IS_PCI;
    207        1.7     dante 	sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh);
    208        1.1     dante 
    209        1.1     dante 	/*
    210        1.1     dante 	 * Initialize the board
    211        1.1     dante 	 */
    212        1.1     dante 	if (adv_init(sc))
    213        1.1     dante 		panic("adv_pci_attach: adv_init failed");
    214        1.1     dante 
    215        1.1     dante 	/*
    216        1.1     dante 	 * Map Interrupt line
    217        1.1     dante 	 */
    218        1.8  sommerfe 	if (pci_intr_map(pa, &ih)) {
    219  1.26.12.1      yamt 		aprint_error_dev(sc->sc_dev, "couldn't map interrupt\n");
    220        1.1     dante 		return;
    221        1.1     dante 	}
    222  1.26.12.2      yamt 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
    223        1.1     dante 
    224        1.1     dante 	/*
    225        1.1     dante 	 * Establish Interrupt handler
    226        1.1     dante 	 */
    227        1.1     dante 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc);
    228        1.1     dante 	if (sc->sc_ih == NULL) {
    229  1.26.12.1      yamt 		aprint_error_dev(sc->sc_dev, "couldn't establish interrupt");
    230        1.1     dante 		if (intrstr != NULL)
    231       1.26     njoly 			aprint_error(" at %s", intrstr);
    232       1.26     njoly 		aprint_error("\n");
    233        1.1     dante 		return;
    234        1.1     dante 	}
    235  1.26.12.1      yamt 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
    236        1.1     dante 
    237        1.1     dante 	/*
    238        1.1     dante 	 * Attach all the sub-devices we can find
    239        1.1     dante 	 */
    240        1.1     dante 	adv_attach(sc);
    241        1.1     dante }
    242       1.17   thorpej 
    243  1.26.12.1      yamt CFATTACH_DECL_NEW(adv_pci, sizeof(ASC_SOFTC),
    244       1.17   thorpej     adv_pci_match, adv_pci_attach, NULL, NULL);
    245