adv_pci.c revision 1.2
1 /* $NetBSD: adv_pci.c,v 1.2 1998/08/29 13:44:49 dante Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * Author: Baldassare Dante Profeta <dante (at) mclink.it> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are 10 * met: 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 2. 12 * Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 3. All advertising 15 * materials mentioning features or use of this software must display the 16 * following acknowledgement: This product includes software developed by the 17 * NetBSD Foundation, Inc. and its contributors. 4. Neither the name of The 18 * NetBSD Foundation nor the names of its contributors may be used to endorse 19 * or promote products derived from this software without specific prior 20 * written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR 26 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 27 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 /* 35 * Device probe and attach routines for the following 36 * Advanced Systems Inc. SCSI controllers: 37 * 38 * Connectivity Products: 39 * ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1) 40 * ABP5140 - Bus-Master ISA PnP (16 CDB) (Footnote 1, 3) 41 * ABP5142 - Bus-Master ISA PnP with floppy (16 CDB) (Footnote 4) 42 * ABP920 - Bus-Master PCI (16 CDB) 43 * ABP930 - Bus-Master PCI (16 CDB) (Footnote 5) 44 * ABP930U - Bus-Master PCI Ultra (16 CDB) 45 * ABP930UA - Bus-Master PCI Ultra (16 CDB) 46 * ABP960 - Bus-Master PCI MAC/PC (16 CDB) (Footnote 2) 47 * ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) (Footnote 2) 48 * 49 * Single Channel Products: 50 * ABP542 - Bus-Master ISA with floppy (240 CDB) 51 * ABP742 - Bus-Master EISA (240 CDB) 52 * ABP842 - Bus-Master VL (240 CDB) 53 * ABP940 - Bus-Master PCI (240 CDB) 54 * ABP940U - Bus-Master PCI Ultra (240 CDB) 55 * ABP970 - Bus-Master PCI MAC/PC (240 CDB) 56 * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB) 57 * ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB) 58 * 59 * Multi Channel Products: 60 * ABP752 - Dual Channel Bus-Master EISA (240 CDB Per Channel) 61 * ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) 62 * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel) 63 * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel) 64 * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel) 65 * 66 * Footnotes: 67 * 1. This board has been shipped by HP with the 4020i CD-R drive. 68 * The board has no BIOS so it cannot control a boot device, but 69 * it can control any secondary SCSI device. 70 * 2. This board has been sold by Iomega as a Jaz Jet PCI adapter. 71 * 3. This board has been sold by SIIG as the i540 SpeedMaster. 72 * 4. This board has been sold by SIIG as the i542 SpeedMaster. 73 * 5. This board has been sold by SIIG as the Fast SCSI Pro PCI. 74 * 75 */ 76 77 #include <sys/types.h> 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/malloc.h> 81 #include <sys/kernel.h> 82 #include <sys/queue.h> 83 #include <sys/device.h> 84 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/scsipi/scsi_all.h> 89 #include <dev/scsipi/scsipi_all.h> 90 #include <dev/scsipi/scsiconf.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 96 #include <dev/ic/adv.h> 97 #include <dev/ic/advlib.h> 98 99 /******************************************************************************/ 100 101 #define PCI_BASEADR_IO 0x10 102 103 /******************************************************************************/ 104 105 #ifdef __BROKEN_INDIRECT_CONFIG 106 int adv_pci_probe __P((struct device *, void *, void *)); 107 #else 108 int adv_pci_probe __P((struct device *, struct cfdata *, void *)); 109 #endif 110 void adv_pci_attach __P((struct device *, struct device *, void *)); 111 112 struct cfattach adv_pci_ca = 113 { 114 sizeof(ASC_SOFTC), adv_pci_probe, adv_pci_attach 115 }; 116 117 /******************************************************************************/ 118 /* 119 * Check the slots looking for a board we recognise 120 * If we find one, note it's address (slot) and call 121 * the actual probe routine to check it out. 122 */ 123 #ifdef __BROKEN_INDIRECT_CONFIG 124 int 125 adv_pci_probe(struct device * parent, void *match, void *aux) 126 #else 127 int 128 adv_pci_probe(struct device * parent, struct cfdata * match, void *aux) 129 #endif 130 { 131 struct pci_attach_args *pa = aux; 132 133 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 134 switch (PCI_PRODUCT(pa->pa_id)) { 135 case PCI_PRODUCT_ADVSYS_1200A: 136 case PCI_PRODUCT_ADVSYS_1200B: 137 case PCI_PRODUCT_ADVSYS_ULTRA: 138 return (1); 139 case PCI_PRODUCT_ADVSYS_2300: 140 return (0); 141 } 142 143 return 0; 144 } 145 146 147 void 148 adv_pci_attach(struct device * parent, struct device * self, void *aux) 149 { 150 struct pci_attach_args *pa = aux; 151 ASC_SOFTC *sc = (void *) self; 152 bus_space_tag_t iot; 153 bus_space_handle_t ioh; 154 pci_intr_handle_t ih; 155 pci_chipset_tag_t pc = pa->pa_pc; 156 u_int32_t command; 157 const char *intrstr; 158 159 160 sc->sc_flags = 0x0; 161 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS) 162 switch (PCI_PRODUCT(pa->pa_id)) { 163 case PCI_PRODUCT_ADVSYS_1200A: 164 printf(": AdvanSys ASC1200A SCSI\n"); 165 break; 166 167 case PCI_PRODUCT_ADVSYS_1200B: 168 printf(": AdvanSys ASC1200B SCSI\n"); 169 break; 170 171 case PCI_PRODUCT_ADVSYS_ULTRA: 172 switch (PCI_REVISION(pa->pa_class)) { 173 case ASC_PCI_REVISION_3050: 174 printf(": AdvanSys ASC3150 Ultra SCSI\n"); 175 break; 176 177 case ASC_PCI_REVISION_3150: 178 printf(": AdvanSys ASC3050 Ultra SCSI\n"); 179 break; 180 } 181 break; 182 183 case PCI_PRODUCT_ADVSYS_2300: 184 sc->sc_flags |= ASC_WIDE_BOARD; 185 printf("adv_pci_attach: Wide boards are not" 186 " supported yet"); 187 break; 188 189 default: 190 printf(": unknown model!\n"); 191 return; 192 } 193 194 195 /* 196 * Make sure IO/MEM/MASTER are enabled 197 */ 198 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 199 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 200 PCI_COMMAND_MASTER_ENABLE)) != 201 (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 202 PCI_COMMAND_MASTER_ENABLE)) { 203 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 204 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 205 PCI_COMMAND_MASTER_ENABLE)); 206 } 207 /* 208 * Latency timer settings. 209 */ 210 { 211 u_int32_t bhlcr; 212 213 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG); 214 215 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A || 216 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) { 217 bhlcr &= 0xFFFF00FFul; 218 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, bhlcr); 219 } else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA) && 220 (PCI_LATTIMER(bhlcr) < 0x20)) { 221 bhlcr &= 0xFFFF00FFul; 222 bhlcr |= 0x00002000ul; 223 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, bhlcr); 224 } 225 } 226 227 228 /* 229 * Map Device Registers for I/O 230 */ 231 if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0, 232 &iot, &ioh, NULL, NULL)) { 233 printf("%s: unable to map device registers\n", 234 sc->sc_dev.dv_xname); 235 return; 236 } 237 sc->sc_iot = iot; 238 sc->sc_ioh = ioh; 239 sc->sc_dmat = pa->pa_dmat; 240 sc->pci_device_id = pa->pa_id; 241 sc->bus_type = ASC_IS_PCI; 242 243 /* 244 * Initialize the board 245 */ 246 if (adv_init(sc)) 247 panic("adv_pci_attach: adv_init failed"); 248 249 /* 250 * Map Interrupt line 251 */ 252 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 253 pa->pa_intrline, &ih)) { 254 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 255 return; 256 } 257 intrstr = pci_intr_string(pc, ih); 258 259 /* 260 * Establish Interrupt handler 261 */ 262 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc); 263 if (sc->sc_ih == NULL) { 264 printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname); 265 if (intrstr != NULL) 266 printf(" at %s", intrstr); 267 printf("\n"); 268 return; 269 } 270 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 271 272 /* 273 * Attach all the sub-devices we can find 274 */ 275 adv_attach(sc); 276 } 277 /******************************************************************************/ 278
Indexes created Mon Sep 22 05:09:51 GMT 2025