adv_pci.c revision 1.21 1 /* $NetBSD: adv_pci.c,v 1.21 2007/10/19 12:00:38 ad Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
5 *
6 * Author: Baldassare Dante Profeta <dante (at) mclink.it>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36 /*
37 * Device probe and attach routines for the following
38 * Advanced Systems Inc. SCSI controllers:
39 *
40 * Connectivity Products:
41 * ABP920 - Bus-Master PCI (16 CDB)
42 * ABP930 - Bus-Master PCI (16 CDB) (Footnote 1)
43 * ABP930U - Bus-Master PCI Ultra (16 CDB)
44 * ABP930UA - Bus-Master PCI Ultra (16 CDB)
45 * ABP960 - Bus-Master PCI MAC/PC (16 CDB) (Footnote 2)
46 * ABP960U - Bus-Master PCI MAC/PC Ultra (16 CDB) (Footnote 2)
47 *
48 * Single Channel Products:
49 * ABP940 - Bus-Master PCI (240 CDB)
50 * ABP940U - Bus-Master PCI Ultra (240 CDB)
51 * ABP970 - Bus-Master PCI MAC/PC (240 CDB)
52 * ABP970U - Bus-Master PCI MAC/PC Ultra (240 CDB)
53 * ABP940UW - Bus-Master PCI Ultra-Wide (240 CDB)
54 *
55 * Multi Channel Products:
56 * ABP950 - Dual Channel Bus-Master PCI (240 CDB Per Channel)
57 * ABP980 - Four Channel Bus-Master PCI (240 CDB Per Channel)
58 * ABP980U - Four Channel Bus-Master PCI Ultra (240 CDB Per Channel)
59 *
60 * Footnotes:
61 * 1. This board has been sold by SIIG as the Fast SCSI Pro PCI.
62 * 2. This board has been sold by Iomega as a Jaz Jet PCI adapter.
63 */
64
65 #include <sys/cdefs.h>
66 __KERNEL_RCSID(0, "$NetBSD: adv_pci.c,v 1.21 2007/10/19 12:00:38 ad Exp $");
67
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/malloc.h>
71 #include <sys/kernel.h>
72 #include <sys/queue.h>
73 #include <sys/device.h>
74
75 #include <sys/bus.h>
76 #include <sys/intr.h>
77
78 #include <dev/scsipi/scsi_all.h>
79 #include <dev/scsipi/scsipi_all.h>
80 #include <dev/scsipi/scsiconf.h>
81
82 #include <dev/pci/pcireg.h>
83 #include <dev/pci/pcivar.h>
84 #include <dev/pci/pcidevs.h>
85
86 #include <dev/ic/advlib.h>
87 #include <dev/ic/adv.h>
88
89 /******************************************************************************/
90
91 #define PCI_BASEADR_IO 0x10
92
93 /******************************************************************************/
94 /*
95 * Check the slots looking for a board we recognise
96 * If we find one, note it's address (slot) and call
97 * the actual probe routine to check it out.
98 */
99 static int
100 adv_pci_match(struct device *parent, struct cfdata *match,
101 void *aux)
102 {
103 struct pci_attach_args *pa = aux;
104
105 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
106 switch (PCI_PRODUCT(pa->pa_id)) {
107 case PCI_PRODUCT_ADVSYS_1200A:
108 case PCI_PRODUCT_ADVSYS_1200B:
109 case PCI_PRODUCT_ADVSYS_ULTRA:
110 return (1);
111 }
112
113 return 0;
114 }
115
116 static void
117 adv_pci_attach(struct device *parent, struct device *self, void *aux)
118 {
119 struct pci_attach_args *pa = aux;
120 ASC_SOFTC *sc = (void *) self;
121 bus_space_tag_t iot;
122 bus_space_handle_t ioh;
123 pci_intr_handle_t ih;
124 pci_chipset_tag_t pc = pa->pa_pc;
125 u_int32_t command;
126 const char *intrstr;
127
128 aprint_naive(": SCSI controller\n");
129
130 sc->sc_flags = 0x0;
131 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADVSYS)
132 switch (PCI_PRODUCT(pa->pa_id)) {
133 case PCI_PRODUCT_ADVSYS_1200A:
134 aprint_normal(": AdvanSys ASC1200A SCSI adapter\n");
135 break;
136
137 case PCI_PRODUCT_ADVSYS_1200B:
138 aprint_normal(": AdvanSys ASC1200B SCSI adapter\n");
139 break;
140
141 case PCI_PRODUCT_ADVSYS_ULTRA:
142 switch (PCI_REVISION(pa->pa_class)) {
143 case ASC_PCI_REVISION_3050:
144 aprint_normal(
145 ": AdvanSys ABP-9xxUA SCSI adapter\n");
146 break;
147
148 case ASC_PCI_REVISION_3150:
149 aprint_normal(
150 ": AdvanSys ABP-9xxU SCSI adapter\n");
151 break;
152 }
153 break;
154
155 default:
156 aprint_error(": unknown model!\n");
157 return;
158 }
159
160
161 /*
162 * Make sure IO/MEM/MASTER are enabled
163 */
164 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
165 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
166 PCI_COMMAND_MASTER_ENABLE)) !=
167 (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
168 PCI_COMMAND_MASTER_ENABLE)) {
169 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
170 command | (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
171 PCI_COMMAND_MASTER_ENABLE));
172 }
173 /*
174 * Latency timer settings.
175 */
176 {
177 u_int32_t bhlcr;
178
179 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
180
181 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200A ||
182 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_1200B) {
183 bhlcr &= 0xFFFF00FFul;
184 pci_conf_write(pa->pa_pc, pa->pa_tag,
185 PCI_BHLC_REG, bhlcr);
186 } else if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ADVSYS_ULTRA)
187 && (PCI_LATTIMER(bhlcr) < 0x20)) {
188 bhlcr &= 0xFFFF00FFul;
189 bhlcr |= 0x00002000ul;
190 pci_conf_write(pa->pa_pc, pa->pa_tag,
191 PCI_BHLC_REG, bhlcr);
192 }
193 }
194
195
196 /*
197 * Map Device Registers for I/O
198 */
199 if (pci_mapreg_map(pa, PCI_BASEADR_IO, PCI_MAPREG_TYPE_IO, 0,
200 &iot, &ioh, NULL, NULL)) {
201 aprint_error("%s: unable to map device registers\n",
202 sc->sc_dev.dv_xname);
203 return;
204 }
205
206 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT);
207 ASC_SET_CHIP_STATUS(iot, ioh, 0);
208
209 sc->sc_iot = iot;
210 sc->sc_ioh = ioh;
211 sc->sc_dmat = pa->pa_dmat;
212 sc->pci_device_id = pa->pa_id;
213 sc->bus_type = ASC_IS_PCI;
214 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh);
215
216 /*
217 * Initialize the board
218 */
219 if (adv_init(sc))
220 panic("adv_pci_attach: adv_init failed");
221
222 /*
223 * Map Interrupt line
224 */
225 if (pci_intr_map(pa, &ih)) {
226 aprint_error("%s: couldn't map interrupt\n",
227 sc->sc_dev.dv_xname);
228 return;
229 }
230 intrstr = pci_intr_string(pc, ih);
231
232 /*
233 * Establish Interrupt handler
234 */
235 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc);
236 if (sc->sc_ih == NULL) {
237 aprint_error("%s: couldn't establish interrupt",
238 sc->sc_dev.dv_xname);
239 if (intrstr != NULL)
240 aprint_normal(" at %s", intrstr);
241 aprint_normal("\n");
242 return;
243 }
244 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
245
246 /*
247 * Attach all the sub-devices we can find
248 */
249 adv_attach(sc);
250 }
251
252 CFATTACH_DECL(adv_pci, sizeof(ASC_SOFTC),
253 adv_pci_match, adv_pci_attach, NULL, NULL);
254